Minki/linux
1
0
Fork 1
mirror of https://github.com/torvalds/linux.git synced 2024-09-25 01:13:04 +00:00
Code Issues Packages Projects Releases Wiki Activity

drm/i915/icl: Power down unused DSI lanes

Browse Source 
To save power, unused lanes should be powered
down using the bitfield of PORT_CL_DW10.

v2: Review comments from Jani N
    - Put default label next to case 4
    - Include the shifts in the macros

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1530798591-2077-7-git-send-email-madhav.chauhan@intel.com
This commit is contained in:
Madhav Chauhan 2018-07-05 19:19:37 +05:30 committed by Jani Nikula
parent 166869b390
commit 45f09f7adc
1 changed files with 40 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

40
drivers/gpu/drm/i915/icl_dsi.c
View File

@ -74,6 +74,43 @@ static void gen11_dsi_enable_io_power(struct intel_encoder *encoder)
}
}
static void gen11_dsi_power_up_lanes(struct intel_encoder *encoder)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
enum port port;
u32 tmp;
u32 lane_mask;
switch (intel_dsi->lane_count) {
case 1:
lane_mask = PWR_DOWN_LN_3_1_0;
break;
case 2:
lane_mask = PWR_DOWN_LN_3_1;
break;
case 3:
lane_mask = PWR_DOWN_LN_3;
break;
case 4:
default:
lane_mask = PWR_UP_ALL_LANES;
break;
}
for_each_dsi_port(port, intel_dsi->ports) {
tmp = I915_READ(ICL_PORT_CL_DW10(port));
tmp &= ~PWR_DOWN_LN_MASK;
I915_WRITE(ICL_PORT_CL_DW10(port), tmp | lane_mask);
}
}
static void gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder)
{
/* step 4a: power up all lanes of the DDI used by DSI */
gen11_dsi_power_up_lanes(encoder);
}
static void __attribute__((unused))
gen11_dsi_pre_enable(struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
@ -84,4 +121,7 @@ gen11_dsi_pre_enable(struct intel_encoder *encoder,
/* step3: enable DSI PLL */
gen11_dsi_program_esc_clk_div(encoder);
/* step4: enable DSI port and DPHY */
gen11_dsi_enable_port_and_phy(encoder);
}