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PCI: endpoint: Add the function number as argument to EPC ops
This patch updates the prototype of most handlers from 'struct pci_epc_ops' so the EPC library can now support multi-function devices. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@free-electrons.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
This commit is contained in:
Cyrille Pitchen
Lorenzo Pieralisi
parent
1b79c52844
commit
4494738de0
@ -39,7 +39,7 @@ static void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar)
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dw_pcie_writel_dbi(pci, reg, 0x0);
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}
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static int dw_pcie_ep_write_header(struct pci_epc *epc,
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static int dw_pcie_ep_write_header(struct pci_epc *epc, u8 func_no,
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struct pci_epf_header *hdr)
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{
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struct dw_pcie_ep *ep = epc_get_drvdata(epc);
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@ -112,7 +112,8 @@ static int dw_pcie_ep_outbound_atu(struct dw_pcie_ep *ep, phys_addr_t phys_addr,
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return 0;
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}
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static void dw_pcie_ep_clear_bar(struct pci_epc *epc, enum pci_barno bar)
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static void dw_pcie_ep_clear_bar(struct pci_epc *epc, u8 func_no,
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enum pci_barno bar)
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{
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struct dw_pcie_ep *ep = epc_get_drvdata(epc);
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struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
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@ -124,7 +125,8 @@ static void dw_pcie_ep_clear_bar(struct pci_epc *epc, enum pci_barno bar)
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clear_bit(atu_index, &ep->ib_window_map);
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}
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static int dw_pcie_ep_set_bar(struct pci_epc *epc, enum pci_barno bar,
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static int dw_pcie_ep_set_bar(struct pci_epc *epc, u8 func_no,
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enum pci_barno bar,
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dma_addr_t bar_phys, size_t size, int flags)
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{
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int ret;
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@ -163,7 +165,8 @@ static int dw_pcie_find_index(struct dw_pcie_ep *ep, phys_addr_t addr,
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return -EINVAL;
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}
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static void dw_pcie_ep_unmap_addr(struct pci_epc *epc, phys_addr_t addr)
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static void dw_pcie_ep_unmap_addr(struct pci_epc *epc, u8 func_no,
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phys_addr_t addr)
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{
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int ret;
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u32 atu_index;
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@ -178,7 +181,8 @@ static void dw_pcie_ep_unmap_addr(struct pci_epc *epc, phys_addr_t addr)
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clear_bit(atu_index, &ep->ob_window_map);
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}
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static int dw_pcie_ep_map_addr(struct pci_epc *epc, phys_addr_t addr,
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static int dw_pcie_ep_map_addr(struct pci_epc *epc, u8 func_no,
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phys_addr_t addr,
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u64 pci_addr, size_t size)
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{
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int ret;
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@ -194,7 +198,7 @@ static int dw_pcie_ep_map_addr(struct pci_epc *epc, phys_addr_t addr,
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return 0;
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}
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static int dw_pcie_ep_get_msi(struct pci_epc *epc)
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static int dw_pcie_ep_get_msi(struct pci_epc *epc, u8 func_no)
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{
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int val;
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u32 lower_addr;
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@ -214,7 +218,7 @@ static int dw_pcie_ep_get_msi(struct pci_epc *epc)
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return val;
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}
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static int dw_pcie_ep_set_msi(struct pci_epc *epc, u8 encode_int)
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static int dw_pcie_ep_set_msi(struct pci_epc *epc, u8 func_no, u8 encode_int)
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{
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int val;
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struct dw_pcie_ep *ep = epc_get_drvdata(epc);
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@ -226,7 +230,7 @@ static int dw_pcie_ep_set_msi(struct pci_epc *epc, u8 encode_int)
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return 0;
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}
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static int dw_pcie_ep_raise_irq(struct pci_epc *epc,
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static int dw_pcie_ep_raise_irq(struct pci_epc *epc, u8 func_no,
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enum pci_epc_irq_type type, u8 interrupt_num)
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{
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struct dw_pcie_ep *ep = epc_get_drvdata(epc);
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@ -104,7 +104,8 @@ static int pci_epf_test_copy(struct pci_epf_test *epf_test)
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goto err;
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}
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ret = pci_epc_map_addr(epc, src_phys_addr, reg->src_addr, reg->size);
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ret = pci_epc_map_addr(epc, epf->func_no, src_phys_addr, reg->src_addr,
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reg->size);
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if (ret) {
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dev_err(dev, "failed to map source address\n");
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reg->status = STATUS_SRC_ADDR_INVALID;
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@ -119,7 +120,8 @@ static int pci_epf_test_copy(struct pci_epf_test *epf_test)
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goto err_src_map_addr;
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}
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ret = pci_epc_map_addr(epc, dst_phys_addr, reg->dst_addr, reg->size);
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ret = pci_epc_map_addr(epc, epf->func_no, dst_phys_addr, reg->dst_addr,
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reg->size);
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if (ret) {
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dev_err(dev, "failed to map destination address\n");
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reg->status = STATUS_DST_ADDR_INVALID;
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@ -128,13 +130,13 @@ static int pci_epf_test_copy(struct pci_epf_test *epf_test)
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memcpy(dst_addr, src_addr, reg->size);
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pci_epc_unmap_addr(epc, dst_phys_addr);
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pci_epc_unmap_addr(epc, epf->func_no, dst_phys_addr);
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err_dst_addr:
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pci_epc_mem_free_addr(epc, dst_phys_addr, dst_addr, reg->size);
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err_src_map_addr:
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pci_epc_unmap_addr(epc, src_phys_addr);
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pci_epc_unmap_addr(epc, epf->func_no, src_phys_addr);
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err_src_addr:
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pci_epc_mem_free_addr(epc, src_phys_addr, src_addr, reg->size);
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@ -164,7 +166,8 @@ static int pci_epf_test_read(struct pci_epf_test *epf_test)
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goto err;
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}
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ret = pci_epc_map_addr(epc, phys_addr, reg->src_addr, reg->size);
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ret = pci_epc_map_addr(epc, epf->func_no, phys_addr, reg->src_addr,
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reg->size);
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if (ret) {
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dev_err(dev, "failed to map address\n");
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reg->status = STATUS_SRC_ADDR_INVALID;
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@ -186,7 +189,7 @@ static int pci_epf_test_read(struct pci_epf_test *epf_test)
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kfree(buf);
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err_map_addr:
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pci_epc_unmap_addr(epc, phys_addr);
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pci_epc_unmap_addr(epc, epf->func_no, phys_addr);
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err_addr:
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pci_epc_mem_free_addr(epc, phys_addr, src_addr, reg->size);
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@ -215,7 +218,8 @@ static int pci_epf_test_write(struct pci_epf_test *epf_test)
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goto err;
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}
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ret = pci_epc_map_addr(epc, phys_addr, reg->dst_addr, reg->size);
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ret = pci_epc_map_addr(epc, epf->func_no, phys_addr, reg->dst_addr,
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reg->size);
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if (ret) {
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dev_err(dev, "failed to map address\n");
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reg->status = STATUS_DST_ADDR_INVALID;
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@ -242,7 +246,7 @@ static int pci_epf_test_write(struct pci_epf_test *epf_test)
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kfree(buf);
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err_map_addr:
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pci_epc_unmap_addr(epc, phys_addr);
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pci_epc_unmap_addr(epc, epf->func_no, phys_addr);
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err_addr:
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pci_epc_mem_free_addr(epc, phys_addr, dst_addr, reg->size);
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@ -260,11 +264,11 @@ static void pci_epf_test_raise_irq(struct pci_epf_test *epf_test, u8 irq)
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struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
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reg->status |= STATUS_IRQ_RAISED;
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msi_count = pci_epc_get_msi(epc);
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msi_count = pci_epc_get_msi(epc, epf->func_no);
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if (irq > msi_count || msi_count <= 0)
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pci_epc_raise_irq(epc, PCI_EPC_IRQ_LEGACY, 0);
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pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_LEGACY, 0);
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else
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pci_epc_raise_irq(epc, PCI_EPC_IRQ_MSI, irq);
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pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_MSI, irq);
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}
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static void pci_epf_test_cmd_handler(struct work_struct *work)
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@ -291,7 +295,7 @@ static void pci_epf_test_cmd_handler(struct work_struct *work)
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if (command & COMMAND_RAISE_LEGACY_IRQ) {
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reg->status = STATUS_IRQ_RAISED;
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pci_epc_raise_irq(epc, PCI_EPC_IRQ_LEGACY, 0);
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pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_LEGACY, 0);
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goto reset_handler;
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}
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@ -326,11 +330,11 @@ static void pci_epf_test_cmd_handler(struct work_struct *work)
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}
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if (command & COMMAND_RAISE_MSI_IRQ) {
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msi_count = pci_epc_get_msi(epc);
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msi_count = pci_epc_get_msi(epc, epf->func_no);
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if (irq > msi_count || msi_count <= 0)
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goto reset_handler;
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reg->status = STATUS_IRQ_RAISED;
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pci_epc_raise_irq(epc, PCI_EPC_IRQ_MSI, irq);
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pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_MSI, irq);
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goto reset_handler;
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}
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@ -358,7 +362,7 @@ static void pci_epf_test_unbind(struct pci_epf *epf)
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for (bar = BAR_0; bar <= BAR_5; bar++) {
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if (epf_test->reg[bar]) {
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pci_epf_free_space(epf, epf_test->reg[bar], bar);
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pci_epc_clear_bar(epc, bar);
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pci_epc_clear_bar(epc, epf->func_no, bar);
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}
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}
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}
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@ -380,7 +384,8 @@ static int pci_epf_test_set_bar(struct pci_epf *epf)
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for (bar = BAR_0; bar <= BAR_5; bar++) {
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epf_bar = &epf->bar[bar];
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ret = pci_epc_set_bar(epc, bar, epf_bar->phys_addr,
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ret = pci_epc_set_bar(epc, epf->func_no, bar,
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epf_bar->phys_addr,
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epf_bar->size, flags);
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if (ret) {
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pci_epf_free_space(epf, epf_test->reg[bar], bar);
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@ -433,7 +438,7 @@ static int pci_epf_test_bind(struct pci_epf *epf)
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if (WARN_ON_ONCE(!epc))
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return -EINVAL;
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ret = pci_epc_write_header(epc, header);
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ret = pci_epc_write_header(epc, epf->func_no, header);
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if (ret) {
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dev_err(dev, "configuration header write failed\n");
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return ret;
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@ -447,7 +452,7 @@ static int pci_epf_test_bind(struct pci_epf *epf)
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if (ret)
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return ret;
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ret = pci_epc_set_msi(epc, epf->msi_interrupts);
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ret = pci_epc_set_msi(epc, epf->func_no, epf->msi_interrupts);
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if (ret)
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return ret;
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@ -142,25 +142,26 @@ EXPORT_SYMBOL_GPL(pci_epc_start);
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/**
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* pci_epc_raise_irq() - interrupt the host system
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* @epc: the EPC device which has to interrupt the host
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* @func_no: the endpoint function number in the EPC device
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* @type: specify the type of interrupt; legacy or MSI
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* @interrupt_num: the MSI interrupt number
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*
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* Invoke to raise an MSI or legacy interrupt
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*/
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int pci_epc_raise_irq(struct pci_epc *epc, enum pci_epc_irq_type type,
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u8 interrupt_num)
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int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no,
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enum pci_epc_irq_type type, u8 interrupt_num)
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{
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int ret;
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unsigned long flags;
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if (IS_ERR(epc))
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if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
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return -EINVAL;
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if (!epc->ops->raise_irq)
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return 0;
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spin_lock_irqsave(&epc->lock, flags);
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ret = epc->ops->raise_irq(epc, type, interrupt_num);
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ret = epc->ops->raise_irq(epc, func_no, type, interrupt_num);
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spin_unlock_irqrestore(&epc->lock, flags);
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return ret;
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@ -170,22 +171,23 @@ EXPORT_SYMBOL_GPL(pci_epc_raise_irq);
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/**
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* pci_epc_get_msi() - get the number of MSI interrupt numbers allocated
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* @epc: the EPC device to which MSI interrupts was requested
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* @func_no: the endpoint function number in the EPC device
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*
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* Invoke to get the number of MSI interrupts allocated by the RC
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*/
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int pci_epc_get_msi(struct pci_epc *epc)
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int pci_epc_get_msi(struct pci_epc *epc, u8 func_no)
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{
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int interrupt;
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unsigned long flags;
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if (IS_ERR(epc))
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if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
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return 0;
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if (!epc->ops->get_msi)
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return 0;
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spin_lock_irqsave(&epc->lock, flags);
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interrupt = epc->ops->get_msi(epc);
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interrupt = epc->ops->get_msi(epc, func_no);
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spin_unlock_irqrestore(&epc->lock, flags);
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if (interrupt < 0)
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@ -200,17 +202,18 @@ EXPORT_SYMBOL_GPL(pci_epc_get_msi);
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/**
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* pci_epc_set_msi() - set the number of MSI interrupt numbers required
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* @epc: the EPC device on which MSI has to be configured
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* @func_no: the endpoint function number in the EPC device
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* @interrupts: number of MSI interrupts required by the EPF
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*
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* Invoke to set the required number of MSI interrupts.
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*/
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int pci_epc_set_msi(struct pci_epc *epc, u8 interrupts)
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int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 interrupts)
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{
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int ret;
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u8 encode_int;
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unsigned long flags;
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if (IS_ERR(epc))
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if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
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return -EINVAL;
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if (!epc->ops->set_msi)
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@ -219,7 +222,7 @@ int pci_epc_set_msi(struct pci_epc *epc, u8 interrupts)
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encode_int = order_base_2(interrupts);
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spin_lock_irqsave(&epc->lock, flags);
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ret = epc->ops->set_msi(epc, encode_int);
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ret = epc->ops->set_msi(epc, func_no, encode_int);
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spin_unlock_irqrestore(&epc->lock, flags);
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return ret;
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@ -229,22 +232,24 @@ EXPORT_SYMBOL_GPL(pci_epc_set_msi);
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/**
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* pci_epc_unmap_addr() - unmap CPU address from PCI address
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* @epc: the EPC device on which address is allocated
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* @func_no: the endpoint function number in the EPC device
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* @phys_addr: physical address of the local system
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*
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* Invoke to unmap the CPU address from PCI address.
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*/
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void pci_epc_unmap_addr(struct pci_epc *epc, phys_addr_t phys_addr)
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void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no,
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phys_addr_t phys_addr)
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{
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unsigned long flags;
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if (IS_ERR(epc))
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if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
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return;
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if (!epc->ops->unmap_addr)
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return;
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spin_lock_irqsave(&epc->lock, flags);
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epc->ops->unmap_addr(epc, phys_addr);
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epc->ops->unmap_addr(epc, func_no, phys_addr);
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spin_unlock_irqrestore(&epc->lock, flags);
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}
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EXPORT_SYMBOL_GPL(pci_epc_unmap_addr);
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@ -252,26 +257,27 @@ EXPORT_SYMBOL_GPL(pci_epc_unmap_addr);
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/**
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* pci_epc_map_addr() - map CPU address to PCI address
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* @epc: the EPC device on which address is allocated
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* @func_no: the endpoint function number in the EPC device
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* @phys_addr: physical address of the local system
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* @pci_addr: PCI address to which the physical address should be mapped
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* @size: the size of the allocation
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*
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* Invoke to map CPU address with PCI address.
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*/
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int pci_epc_map_addr(struct pci_epc *epc, phys_addr_t phys_addr,
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u64 pci_addr, size_t size)
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int pci_epc_map_addr(struct pci_epc *epc, u8 func_no,
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phys_addr_t phys_addr, u64 pci_addr, size_t size)
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{
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int ret;
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unsigned long flags;
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if (IS_ERR(epc))
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if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
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return -EINVAL;
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if (!epc->ops->map_addr)
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return 0;
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spin_lock_irqsave(&epc->lock, flags);
|
||||
ret = epc->ops->map_addr(epc, phys_addr, pci_addr, size);
|
||||
ret = epc->ops->map_addr(epc, func_no, phys_addr, pci_addr, size);
|
||||
spin_unlock_irqrestore(&epc->lock, flags);
|
||||
|
||||
return ret;
|
||||
@ -281,22 +287,23 @@ EXPORT_SYMBOL_GPL(pci_epc_map_addr);
|
||||
/**
|
||||
* pci_epc_clear_bar() - reset the BAR
|
||||
* @epc: the EPC device for which the BAR has to be cleared
|
||||
* @func_no: the endpoint function number in the EPC device
|
||||
* @bar: the BAR number that has to be reset
|
||||
*
|
||||
* Invoke to reset the BAR of the endpoint device.
|
||||
*/
|
||||
void pci_epc_clear_bar(struct pci_epc *epc, int bar)
|
||||
void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no, int bar)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
if (IS_ERR(epc))
|
||||
if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
|
||||
return;
|
||||
|
||||
if (!epc->ops->clear_bar)
|
||||
return;
|
||||
|
||||
spin_lock_irqsave(&epc->lock, flags);
|
||||
epc->ops->clear_bar(epc, bar);
|
||||
epc->ops->clear_bar(epc, func_no, bar);
|
||||
spin_unlock_irqrestore(&epc->lock, flags);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pci_epc_clear_bar);
|
||||
@ -304,26 +311,27 @@ EXPORT_SYMBOL_GPL(pci_epc_clear_bar);
|
||||
/**
|
||||
* pci_epc_set_bar() - configure BAR in order for host to assign PCI addr space
|
||||
* @epc: the EPC device on which BAR has to be configured
|
||||
* @func_no: the endpoint function number in the EPC device
|
||||
* @bar: the BAR number that has to be configured
|
||||
* @size: the size of the addr space
|
||||
* @flags: specify memory allocation/io allocation/32bit address/64 bit address
|
||||
*
|
||||
* Invoke to configure the BAR of the endpoint device.
|
||||
*/
|
||||
int pci_epc_set_bar(struct pci_epc *epc, enum pci_barno bar,
|
||||
int pci_epc_set_bar(struct pci_epc *epc, u8 func_no, enum pci_barno bar,
|
||||
dma_addr_t bar_phys, size_t size, int flags)
|
||||
{
|
||||
int ret;
|
||||
unsigned long irq_flags;
|
||||
|
||||
if (IS_ERR(epc))
|
||||
if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
|
||||
return -EINVAL;
|
||||
|
||||
if (!epc->ops->set_bar)
|
||||
return 0;
|
||||
|
||||
spin_lock_irqsave(&epc->lock, irq_flags);
|
||||
ret = epc->ops->set_bar(epc, bar, bar_phys, size, flags);
|
||||
ret = epc->ops->set_bar(epc, func_no, bar, bar_phys, size, flags);
|
||||
spin_unlock_irqrestore(&epc->lock, irq_flags);
|
||||
|
||||
return ret;
|
||||
@ -333,6 +341,7 @@ EXPORT_SYMBOL_GPL(pci_epc_set_bar);
|
||||
/**
|
||||
* pci_epc_write_header() - write standard configuration header
|
||||
* @epc: the EPC device to which the configuration header should be written
|
||||
* @func_no: the endpoint function number in the EPC device
|
||||
* @header: standard configuration header fields
|
||||
*
|
||||
* Invoke to write the configuration header to the endpoint controller. Every
|
||||
@ -340,19 +349,20 @@ EXPORT_SYMBOL_GPL(pci_epc_set_bar);
|
||||
* configuration header would be written. The callback function should write
|
||||
* the header fields to this dedicated location.
|
||||
*/
|
||||
int pci_epc_write_header(struct pci_epc *epc, struct pci_epf_header *header)
|
||||
int pci_epc_write_header(struct pci_epc *epc, u8 func_no,
|
||||
struct pci_epf_header *header)
|
||||
{
|
||||
int ret;
|
||||
unsigned long flags;
|
||||
|
||||
if (IS_ERR(epc))
|
||||
if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
|
||||
return -EINVAL;
|
||||
|
||||
if (!epc->ops->write_header)
|
||||
return 0;
|
||||
|
||||
spin_lock_irqsave(&epc->lock, flags);
|
||||
ret = epc->ops->write_header(epc, header);
|
||||
ret = epc->ops->write_header(epc, func_no, header);
|
||||
spin_unlock_irqrestore(&epc->lock, flags);
|
||||
|
||||
return ret;
|
||||
|
||||
@ -39,17 +39,20 @@ enum pci_epc_irq_type {
|
||||
* @owner: the module owner containing the ops
|
||||
*/
|
||||
struct pci_epc_ops {
|
||||
int (*write_header)(struct pci_epc *pci_epc,
|
||||
int (*write_header)(struct pci_epc *epc, u8 func_no,
|
||||
struct pci_epf_header *hdr);
|
||||
int (*set_bar)(struct pci_epc *epc, enum pci_barno bar,
|
||||
int (*set_bar)(struct pci_epc *epc, u8 func_no,
|
||||
enum pci_barno bar,
|
||||
dma_addr_t bar_phys, size_t size, int flags);
|
||||
void (*clear_bar)(struct pci_epc *epc, enum pci_barno bar);
|
||||
int (*map_addr)(struct pci_epc *epc, phys_addr_t addr,
|
||||
u64 pci_addr, size_t size);
|
||||
void (*unmap_addr)(struct pci_epc *epc, phys_addr_t addr);
|
||||
int (*set_msi)(struct pci_epc *epc, u8 interrupts);
|
||||
int (*get_msi)(struct pci_epc *epc);
|
||||
int (*raise_irq)(struct pci_epc *pci_epc,
|
||||
void (*clear_bar)(struct pci_epc *epc, u8 func_no,
|
||||
enum pci_barno bar);
|
||||
int (*map_addr)(struct pci_epc *epc, u8 func_no,
|
||||
phys_addr_t addr, u64 pci_addr, size_t size);
|
||||
void (*unmap_addr)(struct pci_epc *epc, u8 func_no,
|
||||
phys_addr_t addr);
|
||||
int (*set_msi)(struct pci_epc *epc, u8 func_no, u8 interrupts);
|
||||
int (*get_msi)(struct pci_epc *epc, u8 func_no);
|
||||
int (*raise_irq)(struct pci_epc *epc, u8 func_no,
|
||||
enum pci_epc_irq_type type, u8 interrupt_num);
|
||||
int (*start)(struct pci_epc *epc);
|
||||
void (*stop)(struct pci_epc *epc);
|
||||
@ -124,17 +127,21 @@ void pci_epc_destroy(struct pci_epc *epc);
|
||||
int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf);
|
||||
void pci_epc_linkup(struct pci_epc *epc);
|
||||
void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf);
|
||||
int pci_epc_write_header(struct pci_epc *epc, struct pci_epf_header *hdr);
|
||||
int pci_epc_set_bar(struct pci_epc *epc, enum pci_barno bar,
|
||||
int pci_epc_write_header(struct pci_epc *epc, u8 func_no,
|
||||
struct pci_epf_header *hdr);
|
||||
int pci_epc_set_bar(struct pci_epc *epc, u8 func_no,
|
||||
enum pci_barno bar,
|
||||
dma_addr_t bar_phys, size_t size, int flags);
|
||||
void pci_epc_clear_bar(struct pci_epc *epc, int bar);
|
||||
int pci_epc_map_addr(struct pci_epc *epc, phys_addr_t phys_addr,
|
||||
void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no, int bar);
|
||||
int pci_epc_map_addr(struct pci_epc *epc, u8 func_no,
|
||||
phys_addr_t phys_addr,
|
||||
u64 pci_addr, size_t size);
|
||||
void pci_epc_unmap_addr(struct pci_epc *epc, phys_addr_t phys_addr);
|
||||
int pci_epc_set_msi(struct pci_epc *epc, u8 interrupts);
|
||||
int pci_epc_get_msi(struct pci_epc *epc);
|
||||
int pci_epc_raise_irq(struct pci_epc *epc, enum pci_epc_irq_type type,
|
||||
u8 interrupt_num);
|
||||
void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no,
|
||||
phys_addr_t phys_addr);
|
||||
int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 interrupts);
|
||||
int pci_epc_get_msi(struct pci_epc *epc, u8 func_no);
|
||||
int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no,
|
||||
enum pci_epc_irq_type type, u8 interrupt_num);
|
||||
int pci_epc_start(struct pci_epc *epc);
|
||||
void pci_epc_stop(struct pci_epc *epc);
|
||||
struct pci_epc *pci_epc_get(const char *epc_name);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user