mirror of
https://github.com/torvalds/linux.git
synced 2024-11-10 14:11:52 +00:00
PCI: Fix kernel-doc errors
Fix kernel-doc formatting errors, function names that don't match the doc, and some missing parameter documentation. These are reported by: make W=1 drivers/pci/ No functional change intended. [bhelgaas: squashed into one patch since this only changes comments] Link: https://lore.kernel.org/r/20210311001724.423356-1-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-2-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-3-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-4-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-5-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-6-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-7-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-8-kw@linux.com Signed-off-by: Krzysztof Wilczyński <kw@linux.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
parent
a38fd87484
commit
43395d9e09
@ -480,7 +480,7 @@ EXPORT_SYMBOL_GPL(pci_pasid_features);
|
||||
#define PASID_NUMBER_SHIFT 8
|
||||
#define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT)
|
||||
/**
|
||||
* pci_max_pasid - Get maximum number of PASIDs supported by device
|
||||
* pci_max_pasids - Get maximum number of PASIDs supported by device
|
||||
* @pdev: PCI device structure
|
||||
*
|
||||
* Returns negative value when PASID capability is not present.
|
||||
|
@ -1,5 +1,5 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/**
|
||||
/*
|
||||
* pci-j721e - PCIe controller driver for TI's J721E SoCs
|
||||
*
|
||||
* Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
|
||||
|
@ -346,8 +346,9 @@ static const struct irq_domain_ops ks_pcie_legacy_irq_domain_ops = {
|
||||
};
|
||||
|
||||
/**
|
||||
* ks_pcie_set_dbi_mode() - Set DBI mode to access overlaid BAR mask
|
||||
* registers
|
||||
* ks_pcie_set_dbi_mode() - Set DBI mode to access overlaid BAR mask registers
|
||||
* @ks_pcie: A pointer to the keystone_pcie structure which holds the KeyStone
|
||||
* PCIe host controller driver information.
|
||||
*
|
||||
* Since modification of dbi_cs2 involves different clock domain, read the
|
||||
* status back to ensure the transition is complete.
|
||||
@ -367,6 +368,8 @@ static void ks_pcie_set_dbi_mode(struct keystone_pcie *ks_pcie)
|
||||
|
||||
/**
|
||||
* ks_pcie_clear_dbi_mode() - Disable DBI mode
|
||||
* @ks_pcie: A pointer to the keystone_pcie structure which holds the KeyStone
|
||||
* PCIe host controller driver information.
|
||||
*
|
||||
* Since modification of dbi_cs2 involves different clock domain, read the
|
||||
* status back to ensure the transition is complete.
|
||||
@ -449,6 +452,7 @@ static struct pci_ops ks_child_pcie_ops = {
|
||||
|
||||
/**
|
||||
* ks_pcie_v3_65_add_bus() - keystone add_bus post initialization
|
||||
* @bus: A pointer to the PCI bus structure.
|
||||
*
|
||||
* This sets BAR0 to enable inbound access for MSI_IRQ register
|
||||
*/
|
||||
@ -488,6 +492,8 @@ static struct pci_ops ks_pcie_ops = {
|
||||
|
||||
/**
|
||||
* ks_pcie_link_up() - Check if link up
|
||||
* @pci: A pointer to the dw_pcie structure which holds the DesignWare PCIe host
|
||||
* controller driver information.
|
||||
*/
|
||||
static int ks_pcie_link_up(struct dw_pcie *pci)
|
||||
{
|
||||
@ -605,7 +611,6 @@ static void ks_pcie_msi_irq_handler(struct irq_desc *desc)
|
||||
|
||||
/**
|
||||
* ks_pcie_legacy_irq_handler() - Handle legacy interrupt
|
||||
* @irq: IRQ line for legacy interrupts
|
||||
* @desc: Pointer to irq descriptor
|
||||
*
|
||||
* Traverse through pending legacy interrupts and invoke handler for each. Also
|
||||
|
@ -1,5 +1,5 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/**
|
||||
/*
|
||||
* Endpoint Function Driver to implement Non-Transparent Bridge functionality
|
||||
*
|
||||
* Copyright (C) 2020 Texas Instruments
|
||||
@ -696,7 +696,8 @@ reset_handler:
|
||||
|
||||
/**
|
||||
* epf_ntb_peer_spad_bar_clear() - Clear Peer Scratchpad BAR
|
||||
* @ntb: NTB device that facilitates communication between HOST1 and HOST2
|
||||
* @ntb_epc: EPC associated with one of the HOST which holds peer's outbound
|
||||
* address.
|
||||
*
|
||||
*+-----------------+------->+------------------+ +-----------------+
|
||||
*| BAR0 | | CONFIG REGION | | BAR0 |
|
||||
@ -740,6 +741,7 @@ static void epf_ntb_peer_spad_bar_clear(struct epf_ntb_epc *ntb_epc)
|
||||
/**
|
||||
* epf_ntb_peer_spad_bar_set() - Set peer scratchpad BAR
|
||||
* @ntb: NTB device that facilitates communication between HOST1 and HOST2
|
||||
* @type: PRIMARY interface or SECONDARY interface
|
||||
*
|
||||
*+-----------------+------->+------------------+ +-----------------+
|
||||
*| BAR0 | | CONFIG REGION | | BAR0 |
|
||||
@ -808,7 +810,8 @@ static int epf_ntb_peer_spad_bar_set(struct epf_ntb *ntb,
|
||||
|
||||
/**
|
||||
* epf_ntb_config_sspad_bar_clear() - Clear Config + Self scratchpad BAR
|
||||
* @ntb: NTB device that facilitates communication between HOST1 and HOST2
|
||||
* @ntb_epc: EPC associated with one of the HOST which holds peer's outbound
|
||||
* address.
|
||||
*
|
||||
* +-----------------+------->+------------------+ +-----------------+
|
||||
* | BAR0 | | CONFIG REGION | | BAR0 |
|
||||
@ -851,7 +854,8 @@ static void epf_ntb_config_sspad_bar_clear(struct epf_ntb_epc *ntb_epc)
|
||||
|
||||
/**
|
||||
* epf_ntb_config_sspad_bar_set() - Set Config + Self scratchpad BAR
|
||||
* @ntb: NTB device that facilitates communication between HOST1 and HOST2
|
||||
* @ntb_epc: EPC associated with one of the HOST which holds peer's outbound
|
||||
* address.
|
||||
*
|
||||
* +-----------------+------->+------------------+ +-----------------+
|
||||
* | BAR0 | | CONFIG REGION | | BAR0 |
|
||||
@ -1312,6 +1316,7 @@ static int epf_ntb_configure_interrupt(struct epf_ntb *ntb,
|
||||
|
||||
/**
|
||||
* epf_ntb_alloc_peer_mem() - Allocate memory in peer's outbound address space
|
||||
* @dev: The PCI device.
|
||||
* @ntb_epc: EPC associated with one of the HOST whose BAR holds peer's outbound
|
||||
* address
|
||||
* @bar: BAR of @ntb_epc in for which memory has to be allocated (could be
|
||||
@ -1660,7 +1665,6 @@ static int epf_ntb_init_epc_bar_interface(struct epf_ntb *ntb,
|
||||
* epf_ntb_init_epc_bar() - Identify BARs to be used for each of the NTB
|
||||
* constructs (scratchpad region, doorbell, memorywindow)
|
||||
* @ntb: NTB device that facilitates communication between HOST1 and HOST2
|
||||
* @type: PRIMARY interface or SECONDARY interface
|
||||
*
|
||||
* Wrapper to epf_ntb_init_epc_bar_interface() to identify the free BARs
|
||||
* to be used for each of BAR_CONFIG, BAR_PEER_SPAD, BAR_DB_MW1, BAR_MW2,
|
||||
@ -2037,6 +2041,8 @@ static const struct config_item_type ntb_group_type = {
|
||||
/**
|
||||
* epf_ntb_add_cfs() - Add configfs directory specific to NTB
|
||||
* @epf: NTB endpoint function device
|
||||
* @group: A pointer to the config_group structure referencing a group of
|
||||
* config_items of a specific type that belong to a specific sub-system.
|
||||
*
|
||||
* Add configfs directory specific to NTB. This directory will hold
|
||||
* NTB specific properties like db_count, spad_count, num_mws etc.,
|
||||
|
@ -1,5 +1,5 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/**
|
||||
/*
|
||||
* Test driver to test endpoint functionality
|
||||
*
|
||||
* Copyright (C) 2017 Texas Instruments
|
||||
|
@ -594,6 +594,8 @@ EXPORT_SYMBOL_GPL(pci_epc_add_epf);
|
||||
* pci_epc_remove_epf() - remove PCI endpoint function from endpoint controller
|
||||
* @epc: the EPC device from which the endpoint function should be removed
|
||||
* @epf: the endpoint function to be removed
|
||||
* @type: identifies if the EPC is connected to the primary or secondary
|
||||
* interface of EPF
|
||||
*
|
||||
* Invoke to remove PCI endpoint function from the endpoint controller.
|
||||
*/
|
||||
|
@ -157,7 +157,7 @@ static int pcihp_is_ejectable(acpi_handle handle)
|
||||
}
|
||||
|
||||
/**
|
||||
* acpi_pcihp_check_ejectable - check if handle is ejectable ACPI PCI slot
|
||||
* acpi_pci_check_ejectable - check if handle is ejectable ACPI PCI slot
|
||||
* @pbus: the PCI bus of the PCI slot corresponding to 'handle'
|
||||
* @handle: ACPI handle to check
|
||||
*
|
||||
|
@ -190,10 +190,18 @@ int of_pci_parse_bus_range(struct device_node *node, struct resource *res)
|
||||
EXPORT_SYMBOL_GPL(of_pci_parse_bus_range);
|
||||
|
||||
/**
|
||||
* This function will try to obtain the host bridge domain number by
|
||||
* finding a property called "linux,pci-domain" of the given device node.
|
||||
* of_get_pci_domain_nr - Find the host bridge domain number
|
||||
* of the given device node.
|
||||
* @node: Device tree node with the domain information.
|
||||
*
|
||||
* @node: device tree node with the domain information
|
||||
* This function will try to obtain the host bridge domain number by finding
|
||||
* a property called "linux,pci-domain" of the given device node.
|
||||
*
|
||||
* Return:
|
||||
* * > 0 - On success, an associated domain number.
|
||||
* * -EINVAL - The property "linux,pci-domain" does not exist.
|
||||
* * -ENODATA - The linux,pci-domain" property does not have value.
|
||||
* * -EOVERFLOW - Invalid "linux,pci-domain" property value.
|
||||
*
|
||||
* Returns the associated domain number from DT in the range [0-0xffff], or
|
||||
* a negative value if the required property is not found.
|
||||
@ -585,10 +593,16 @@ int devm_of_pci_bridge_init(struct device *dev, struct pci_host_bridge *bridge)
|
||||
#endif /* CONFIG_PCI */
|
||||
|
||||
/**
|
||||
* of_pci_get_max_link_speed - Find the maximum link speed of the given device node.
|
||||
* @node: Device tree node with the maximum link speed information.
|
||||
*
|
||||
* This function will try to find the limitation of link speed by finding
|
||||
* a property called "max-link-speed" of the given device node.
|
||||
*
|
||||
* @node: device tree node with the max link speed information
|
||||
* Return:
|
||||
* * > 0 - On success, a maximum link speed.
|
||||
* * -EINVAL - Invalid "max-link-speed" property value, or failure to access
|
||||
* the property of the device tree node.
|
||||
*
|
||||
* Returns the associated max link speed from DT, or a negative value if the
|
||||
* required property is not found or is invalid.
|
||||
|
@ -129,7 +129,7 @@ static const char * const ecrc_policy_str[] = {
|
||||
};
|
||||
|
||||
/**
|
||||
* enable_ercr_checking - enable PCIe ECRC checking for a device
|
||||
* enable_ecrc_checking - enable PCIe ECRC checking for a device
|
||||
* @dev: the PCI device
|
||||
*
|
||||
* Returns 0 on success, or negative on failure.
|
||||
@ -153,7 +153,7 @@ static int enable_ecrc_checking(struct pci_dev *dev)
|
||||
}
|
||||
|
||||
/**
|
||||
* disable_ercr_checking - disables PCIe ECRC checking for a device
|
||||
* disable_ecrc_checking - disables PCIe ECRC checking for a device
|
||||
* @dev: the PCI device
|
||||
*
|
||||
* Returns 0 on success, or negative on failure.
|
||||
@ -1442,7 +1442,7 @@ static struct pcie_port_service_driver aerdriver = {
|
||||
};
|
||||
|
||||
/**
|
||||
* aer_service_init - register AER root service driver
|
||||
* pcie_aer_init - register AER root service driver
|
||||
*
|
||||
* Invoked when AER root service driver is loaded.
|
||||
*/
|
||||
|
@ -463,7 +463,7 @@ static struct pcie_port_service_driver pcie_pme_driver = {
|
||||
};
|
||||
|
||||
/**
|
||||
* pcie_pme_service_init - Register the PCIe PME service driver.
|
||||
* pcie_pme_init - Register the PCIe PME service driver.
|
||||
*/
|
||||
int __init pcie_pme_init(void)
|
||||
{
|
||||
|
Loading…
Reference in New Issue
Block a user