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arm64: dts: ti: k3-am65: Add MSMC RAM node
The AM65 SoC has 2MB MSMC RAM. Add this as a mmio-sram node so drivers can use it via genpool API. Following areas are marked reserved: - Lower 128KB for ATF - 64KB@0xf0000 for SYSFW - Upper 1MB for cache The reserved locations are subject to change at runtime by the bootloader. Cc: Nishanth Menon <nm@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Andrew F. Davis <afd@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
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@ -6,6 +6,26 @@
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*/
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&cbass_main {
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msmc_ram: sram@70000000 {
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compatible = "mmio-sram";
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reg = <0x0 0x70000000 0x0 0x200000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x0 0x70000000 0x200000>;
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atf-sram@0 {
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reg = <0x0 0x20000>;
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};
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sysfw-sram@f0000 {
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reg = <0xf0000 0x10000>;
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};
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l3cache-sram@100000 {
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reg = <0x100000 0x100000>;
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};
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};
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gic500: interrupt-controller@1800000 {
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compatible = "arm,gic-v3";
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#address-cells = <2>;
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