arm64: dts: ti: k3-am65: Add MSMC RAM node

The AM65 SoC has 2MB MSMC RAM. Add this as a mmio-sram
node so drivers can use it via genpool API.

Following areas are marked reserved:
- Lower 128KB for ATF
- 64KB@0xf0000 for SYSFW
- Upper 1MB for cache

The reserved locations are subject to change at runtime by
the bootloader.

Cc: Nishanth Menon <nm@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
This commit is contained in:
Roger Quadros 2019-01-11 11:44:15 +02:00 committed by Tero Kristo
parent fd58466a38
commit 42d712a74d

View File

@ -6,6 +6,26 @@
*/
&cbass_main {
msmc_ram: sram@70000000 {
compatible = "mmio-sram";
reg = <0x0 0x70000000 0x0 0x200000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x70000000 0x200000>;
atf-sram@0 {
reg = <0x0 0x20000>;
};
sysfw-sram@f0000 {
reg = <0xf0000 0x10000>;
};
l3cache-sram@100000 {
reg = <0x100000 0x100000>;
};
};
gic500: interrupt-controller@1800000 {
compatible = "arm,gic-v3";
#address-cells = <2>;