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fpga: add config complete timeout
Adding timeout for maximum allowed time for FPGA to go to operating mode after a FPGA region has been programmed. Signed-off-by: Alan Tull <atull@opensource.altera.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -385,6 +385,9 @@ static int fpga_region_notify_pre_apply(struct fpga_region *region,
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of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
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of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
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&info->disable_timeout_us);
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&info->disable_timeout_us);
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of_property_read_u32(nd->overlay, "config-complete-timeout-us",
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&info->config_complete_timeout_us);
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/* If FPGA was externally programmed, don't specify firmware */
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/* If FPGA was externally programmed, don't specify firmware */
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if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && firmware_name) {
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if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && firmware_name) {
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pr_err("error: specified firmware and external-fpga-config");
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pr_err("error: specified firmware and external-fpga-config");
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@ -77,11 +77,14 @@ enum fpga_mgr_states {
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* @flags: boolean flags as defined above
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* @flags: boolean flags as defined above
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* @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
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* @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
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* @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
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* @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
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* @config_complete_timeout_us: maximum time for FPGA to switch to operating
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* status in the write_complete op.
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*/
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*/
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struct fpga_image_info {
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struct fpga_image_info {
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u32 flags;
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u32 flags;
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u32 enable_timeout_us;
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u32 enable_timeout_us;
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u32 disable_timeout_us;
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u32 disable_timeout_us;
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u32 config_complete_timeout_us;
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};
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};
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/**
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/**
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