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ARM: OMAP4: hwmod data: add some interconnect-related IP blocks
Add the SL2 interface IP block and interconnect data. The SL2 is related
to the IVA-HD subsystem.
Add IP block and interconnect data for the C2C ("Chip-to-chip")
interconnect. This can provide a direct system interconnect link to
other devices stacked on the OMAP package.
Add the ELM IP block and interconnect data. The ELM can be used
to locate errors in NAND flash connected to the GPMC.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
This commit is contained in:
Paul Walmsley
parent
896d4e98c0
commit
42b9e38728
@ -50,6 +50,27 @@
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* IP blocks
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*/
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/*
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* 'c2c_target_fw' class
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* instance(s): c2c_target_fw
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*/
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static struct omap_hwmod_class omap44xx_c2c_target_fw_hwmod_class = {
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.name = "c2c_target_fw",
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};
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/* c2c_target_fw */
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static struct omap_hwmod omap44xx_c2c_target_fw_hwmod = {
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.name = "c2c_target_fw",
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.class = &omap44xx_c2c_target_fw_hwmod_class,
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.clkdm_name = "d2d_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET,
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},
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},
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};
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/*
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* 'dmm' class
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* instance(s): dmm
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@ -249,8 +270,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
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* - They still need to be validated with the driver
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* properly adapted to omap_hwmod / omap_device
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*
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* c2c
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* c2c_target_fw
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* cm_core
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* cm_core_aon
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* ctrl_module_core
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@ -260,7 +279,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
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* debugss
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* efuse_ctrl_cust
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* efuse_ctrl_std
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* elm
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* mpu_c0
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* mpu_c1
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* ocmc_ram
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@ -269,7 +287,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
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* prcm_mpu
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* prm
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* scrm
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* sl2if
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* usb_host_fs
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* usb_host_hs
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* usb_phy_cm
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@ -331,6 +348,41 @@ static struct omap_hwmod omap44xx_aess_hwmod = {
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},
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};
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/*
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* 'c2c' class
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* chip 2 chip interface used to plug the ape soc (omap) with an external modem
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* soc
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*/
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static struct omap_hwmod_class omap44xx_c2c_hwmod_class = {
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.name = "c2c",
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};
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/* c2c */
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static struct omap_hwmod_irq_info omap44xx_c2c_irqs[] = {
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{ .irq = 88 + OMAP44XX_IRQ_GIC_START },
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{ .irq = -1 }
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};
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static struct omap_hwmod_dma_info omap44xx_c2c_sdma_reqs[] = {
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{ .dma_req = 68 + OMAP44XX_DMA_REQ_START },
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{ .dma_req = -1 }
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};
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static struct omap_hwmod omap44xx_c2c_hwmod = {
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.name = "c2c",
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.class = &omap44xx_c2c_hwmod_class,
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.clkdm_name = "d2d_clkdm",
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.mpu_irqs = omap44xx_c2c_irqs,
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.sdma_reqs = omap44xx_c2c_sdma_reqs,
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET,
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},
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},
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};
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/*
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* 'counter' class
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* 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
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@ -806,6 +858,46 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = {
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},
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};
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/*
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* 'elm' class
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* bch error location module
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*/
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static struct omap_hwmod_class_sysconfig omap44xx_elm_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0014,
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.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
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SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
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SYSS_HAS_RESET_STATUS),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class omap44xx_elm_hwmod_class = {
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.name = "elm",
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.sysc = &omap44xx_elm_sysc,
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};
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/* elm */
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static struct omap_hwmod_irq_info omap44xx_elm_irqs[] = {
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{ .irq = 4 + OMAP44XX_IRQ_GIC_START },
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{ .irq = -1 }
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};
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static struct omap_hwmod omap44xx_elm_hwmod = {
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.name = "elm",
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.class = &omap44xx_elm_hwmod_class,
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.clkdm_name = "l4_per_clkdm",
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.mpu_irqs = omap44xx_elm_irqs,
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_L4PER_ELM_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_L4PER_ELM_CONTEXT_OFFSET,
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},
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},
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};
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/*
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* 'emif' class
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* external memory interface no1
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@ -2296,6 +2388,29 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
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},
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};
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/*
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* 'sl2if' class
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* shared level 2 memory interface
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*/
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static struct omap_hwmod_class omap44xx_sl2if_hwmod_class = {
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.name = "sl2if",
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};
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/* sl2if */
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static struct omap_hwmod omap44xx_sl2if_hwmod = {
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.name = "sl2if",
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.class = &omap44xx_sl2if_hwmod_class,
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.clkdm_name = "ivahd_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_IVAHD_SL2_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_IVAHD_SL2_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_HWCTRL,
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},
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},
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};
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/*
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* 'slimbus' class
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* bidirectional, multi-drop, multi-channel two-line serial interface between
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@ -3222,6 +3337,32 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
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* interfaces
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*/
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static struct omap_hwmod_addr_space omap44xx_c2c_target_fw_addrs[] = {
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{
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.pa_start = 0x4a204000,
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.pa_end = 0x4a2040ff,
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.flags = ADDR_TYPE_RT
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},
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{ }
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};
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/* c2c -> c2c_target_fw */
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static struct omap_hwmod_ocp_if omap44xx_c2c__c2c_target_fw = {
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.master = &omap44xx_c2c_hwmod,
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.slave = &omap44xx_c2c_target_fw_hwmod,
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.clk = "div_core_ck",
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.addr = omap44xx_c2c_target_fw_addrs,
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.user = OCP_USER_MPU,
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};
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/* l4_cfg -> c2c_target_fw */
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static struct omap_hwmod_ocp_if omap44xx_l4_cfg__c2c_target_fw = {
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.master = &omap44xx_l4_cfg_hwmod,
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.slave = &omap44xx_c2c_target_fw_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3_main_1 -> dmm */
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static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = {
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.master = &omap44xx_l3_main_1_hwmod,
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@ -3248,6 +3389,14 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = {
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.user = OCP_USER_MPU,
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};
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/* c2c -> emif_fw */
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static struct omap_hwmod_ocp_if omap44xx_c2c__emif_fw = {
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.master = &omap44xx_c2c_hwmod,
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.slave = &omap44xx_emif_fw_hwmod,
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.clk = "div_core_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* dmm -> emif_fw */
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static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = {
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.master = &omap44xx_dmm_hwmod,
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@ -3356,6 +3505,14 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = {
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.user = OCP_USER_MPU,
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};
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/* c2c_target_fw -> l3_main_2 */
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static struct omap_hwmod_ocp_if omap44xx_c2c_target_fw__l3_main_2 = {
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.master = &omap44xx_c2c_target_fw_hwmod,
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.slave = &omap44xx_l3_main_2_hwmod,
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.clk = "l3_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* dma_system -> l3_main_2 */
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static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = {
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.master = &omap44xx_dma_system_hwmod,
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@ -3588,6 +3745,14 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = {
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.user = OCP_USER_SDMA,
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};
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/* l3_main_2 -> c2c */
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static struct omap_hwmod_ocp_if omap44xx_l3_main_2__c2c = {
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.master = &omap44xx_l3_main_2_hwmod,
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.slave = &omap44xx_c2c_hwmod,
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.clk = "l3_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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static struct omap_hwmod_addr_space omap44xx_counter_32k_addrs[] = {
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{
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.pa_start = 0x4a304000,
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@ -3670,6 +3835,14 @@ static struct omap_hwmod_ocp_if omap44xx_dsp__iva = {
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.user = OCP_USER_DSP,
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};
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/* dsp -> sl2if */
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static struct omap_hwmod_ocp_if omap44xx_dsp__sl2if = {
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.master = &omap44xx_dsp_hwmod,
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.slave = &omap44xx_sl2if_hwmod,
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.clk = "dpll_iva_m5x2_ck",
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.user = OCP_USER_DSP,
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};
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/* l4_cfg -> dsp */
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static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dsp = {
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.master = &omap44xx_l4_cfg_hwmod,
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@ -3930,6 +4103,24 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = {
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_addr_space omap44xx_elm_addrs[] = {
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{
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.pa_start = 0x48078000,
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.pa_end = 0x48078fff,
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.flags = ADDR_TYPE_RT
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},
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{ }
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};
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/* l4_per -> elm */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__elm = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_elm_hwmod,
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.clk = "l4_div_ck",
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.addr = omap44xx_elm_addrs,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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static struct omap_hwmod_addr_space omap44xx_emif1_addrs[] = {
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{
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.pa_start = 0x4c000000,
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@ -4262,6 +4453,14 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* iva -> sl2if */
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static struct omap_hwmod_ocp_if omap44xx_iva__sl2if = {
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.master = &omap44xx_iva_hwmod,
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.slave = &omap44xx_sl2if_hwmod,
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.clk = "dpll_iva_m5x2_ck",
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.user = OCP_USER_IVA,
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};
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static struct omap_hwmod_addr_space omap44xx_iva_addrs[] = {
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{
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.pa_start = 0x5a000000,
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@ -4682,6 +4881,14 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3_main_2 -> sl2if */
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static struct omap_hwmod_ocp_if omap44xx_l3_main_2__sl2if = {
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.master = &omap44xx_l3_main_2_hwmod,
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.slave = &omap44xx_sl2if_hwmod,
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.clk = "l3_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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static struct omap_hwmod_addr_space omap44xx_slimbus1_addrs[] = {
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{
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.pa_start = 0x4012c000,
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@ -5271,8 +5478,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = {
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};
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static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_c2c__c2c_target_fw,
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&omap44xx_l4_cfg__c2c_target_fw,
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&omap44xx_l3_main_1__dmm,
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&omap44xx_mpu__dmm,
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&omap44xx_c2c__emif_fw,
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&omap44xx_dmm__emif_fw,
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&omap44xx_l4_cfg__emif_fw,
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&omap44xx_iva__l3_instr,
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@ -5284,6 +5494,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_mmc1__l3_main_1,
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&omap44xx_mmc2__l3_main_1,
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&omap44xx_mpu__l3_main_1,
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&omap44xx_c2c_target_fw__l3_main_2,
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&omap44xx_dma_system__l3_main_2,
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&omap44xx_fdif__l3_main_2,
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&omap44xx_gpu__l3_main_2,
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@ -5308,11 +5519,13 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_mpu__mpu_private,
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&omap44xx_l4_abe__aess,
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&omap44xx_l4_abe__aess_dma,
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&omap44xx_l3_main_2__c2c,
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&omap44xx_l4_wkup__counter_32k,
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&omap44xx_l4_cfg__dma_system,
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&omap44xx_l4_abe__dmic,
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&omap44xx_l4_abe__dmic_dma,
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&omap44xx_dsp__iva,
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&omap44xx_dsp__sl2if,
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&omap44xx_l4_cfg__dsp,
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&omap44xx_l3_main_2__dss,
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&omap44xx_l4_per__dss,
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@ -5328,6 +5541,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_l4_per__dss_rfbi,
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&omap44xx_l3_main_2__dss_venc,
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&omap44xx_l4_per__dss_venc,
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&omap44xx_l4_per__elm,
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&omap44xx_emif_fw__emif1,
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&omap44xx_emif_fw__emif2,
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&omap44xx_l4_cfg__fdif,
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@ -5347,6 +5561,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_l4_per__i2c4,
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&omap44xx_l3_main_2__ipu,
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&omap44xx_l3_main_2__iss,
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&omap44xx_iva__sl2if,
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&omap44xx_l3_main_2__iva,
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&omap44xx_l4_wkup__kbd,
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&omap44xx_l4_cfg__mailbox,
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@ -5370,6 +5585,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_l4_per__mmc3,
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&omap44xx_l4_per__mmc4,
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&omap44xx_l4_per__mmc5,
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&omap44xx_l3_main_2__sl2if,
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&omap44xx_l4_abe__slimbus1,
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&omap44xx_l4_abe__slimbus1_dma,
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&omap44xx_l4_per__slimbus2,
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@ -214,6 +214,7 @@ struct omap_hwmod_addr_space {
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#define OCP_USER_MPU (1 << 0)
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#define OCP_USER_SDMA (1 << 1)
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#define OCP_USER_DSP (1 << 2)
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#define OCP_USER_IVA (1 << 3)
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/* omap_hwmod_ocp_if.flags bits */
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#define OCPIF_SWSUP_IDLE (1 << 0)
|
||||
|
||||
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Reference in New Issue
Block a user