Merge branches 'tb-mfd-clk-input-pinctrl-power-rtc-sound-6.5', 'ib-mfd-tps6594-core-6.5', 'ib-mfd-regulator-max5970-6.5', 'ib-mfd-regulator-6.5' and 'ib-mfd-power-6.5' into ibs-for-mfd-merged

This commit is contained in:
Lee Jones 2023-06-15 09:18:54 +01:00
22 changed files with 2782 additions and 78 deletions

View File

@ -0,0 +1,138 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/richtek,rt5033.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Richtek RT5033 Power Management Integrated Circuit
maintainers:
- Jakob Hauser <jahau@rocketmail.com>
description:
RT5033 is a multifunction device which includes battery charger, fuel gauge,
flash LED current source, LDO and synchronous Buck converter for portable
applications. It is interfaced to host controller using I2C interface. The
battery fuel gauge uses a separate I2C bus.
properties:
compatible:
const: richtek,rt5033
reg:
maxItems: 1
interrupts:
maxItems: 1
regulators:
description:
The regulators of RT5033 have to be instantiated under a sub-node named
"regulators". For SAFE_LDO voltage there is only one value of 4.9 V. LDO
voltage ranges from 1.2 V to 3.0 V in 0.1 V steps. BUCK voltage ranges
from 1.0 V to 3.0 V in 0.1 V steps.
type: object
patternProperties:
"^(SAFE_LDO|LDO|BUCK)$":
type: object
$ref: /schemas/regulator/regulator.yaml#
unevaluatedProperties: false
additionalProperties: false
charger:
type: object
$ref: /schemas/power/supply/richtek,rt5033-charger.yaml#
required:
- compatible
- reg
- interrupts
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
battery: battery {
compatible = "simple-battery";
precharge-current-microamp = <450000>;
constant-charge-current-max-microamp = <1000000>;
charge-term-current-microamp = <150000>;
precharge-upper-limit-microvolt = <3500000>;
constant-charge-voltage-max-microvolt = <4350000>;
};
extcon {
usb_con: connector {
compatible = "usb-b-connector";
label = "micro-USB";
type = "micro";
};
};
i2c {
#address-cells = <1>;
#size-cells = <0>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
fuel-gauge@35 {
compatible = "richtek,rt5033-battery";
reg = <0x35>;
interrupt-parent = <&msmgpio>;
interrupts = <121 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&fg_alert_default>;
power-supplies = <&rt5033_charger>;
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
pmic@34 {
compatible = "richtek,rt5033";
reg = <0x34>;
interrupt-parent = <&msmgpio>;
interrupts = <62 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_default>;
regulators {
safe_ldo_reg: SAFE_LDO {
regulator-name = "SAFE_LDO";
regulator-min-microvolt = <4900000>;
regulator-max-microvolt = <4900000>;
regulator-always-on;
};
ldo_reg: LDO {
regulator-name = "LDO";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
buck_reg: BUCK {
regulator-name = "BUCK";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
};
rt5033_charger: charger {
compatible = "richtek,rt5033-charger";
monitored-battery = <&battery>;
richtek,usb-connector = <&usb_con>;
};
};
};
};

View File

@ -26,7 +26,7 @@ required:
- compatible
- reg
additionalProperties: false
unevaluatedProperties: false
examples:
- |

View File

@ -0,0 +1,65 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/power/supply/richtek,rt5033-charger.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Richtek RT5033 PMIC Battery Charger
maintainers:
- Jakob Hauser <jahau@rocketmail.com>
description:
The battery charger of the multifunction device RT5033 has to be instantiated
under sub-node named "charger" using the following format.
properties:
compatible:
const: richtek,rt5033-charger
monitored-battery:
$ref: /schemas/types.yaml#/definitions/phandle
description: |
Phandle to the monitored battery according to battery.yaml. The battery
node needs to contain five parameters.
precharge-current-microamp:
Current of pre-charge mode. The pre-charge current levels are 350 mA
to 650 mA programmed by I2C per 100 mA.
constant-charge-current-max-microamp:
Current of fast-charge mode. The fast-charge current levels are 700 mA
to 2000 mA programmed by I2C per 100 mA.
charge-term-current-microamp:
This property is end of charge current. Its level ranges from 150 mA
to 600 mA. Between 150 mA and 300 mA in 50 mA steps, between 300 mA and
600 mA in 100 mA steps.
precharge-upper-limit-microvolt:
Voltage of pre-charge mode. If the battery voltage is below the pre-charge
threshold voltage, the charger is in pre-charge mode with pre-charge
current. Its levels are 2.3 V to 3.8 V programmed by I2C per 0.1 V.
constant-charge-voltage-max-microvolt:
Battery regulation voltage of constant voltage mode. This voltage levels
from 3.65 V to 4.4 V by I2C per 0.025 V.
richtek,usb-connector:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Phandle to a USB connector according to usb-connector.yaml. The connector
should be a child of the extcon device.
required:
- monitored-battery
additionalProperties: false
examples:
- |
charger {
compatible = "richtek,rt5033-charger";
monitored-battery = <&battery>;
richtek,usb-connector = <&usb_con>;
};

View File

@ -266,8 +266,8 @@ config MFD_MADERA_SPI
Support for the Cirrus Logic Madera platform audio SoC
core functionality controlled via SPI.
config MFD_MAX597X
tristate "Maxim 597x power switch and monitor"
config MFD_MAX5970
tristate "Maxim 5970/5978 power switch and monitor"
depends on (I2C && OF)
select MFD_SIMPLE_MFD_I2C
help
@ -1698,6 +1698,38 @@ config MFD_TPS65912_SPI
If you say yes here you get support for the TPS65912 series of
PM chips with SPI interface.
config MFD_TPS6594
tristate
select MFD_CORE
select REGMAP
select REGMAP_IRQ
config MFD_TPS6594_I2C
tristate "TI TPS6594 Power Management chip with I2C"
select MFD_TPS6594
select REGMAP_I2C
select CRC8
depends on I2C
help
If you say yes here you get support for the TPS6594 series of
PM chips with I2C interface.
This driver can also be built as a module. If so, the module
will be called tps6594-i2c.
config MFD_TPS6594_SPI
tristate "TI TPS6594 Power Management chip with SPI"
select MFD_TPS6594
select REGMAP_SPI
select CRC8
depends on SPI_MASTER
help
If you say yes here you get support for the TPS6594 series of
PM chips with SPI interface.
This driver can also be built as a module. If so, the module
will be called tps6594-spi.
config TWL4030_CORE
bool "TI TWL4030/TWL5030/TWL6030/TPS659x0 Support"
depends on I2C=y

View File

@ -96,6 +96,9 @@ obj-$(CONFIG_MFD_TPS65910) += tps65910.o
obj-$(CONFIG_MFD_TPS65912) += tps65912-core.o
obj-$(CONFIG_MFD_TPS65912_I2C) += tps65912-i2c.o
obj-$(CONFIG_MFD_TPS65912_SPI) += tps65912-spi.o
obj-$(CONFIG_MFD_TPS6594) += tps6594-core.o
obj-$(CONFIG_MFD_TPS6594_I2C) += tps6594-i2c.o
obj-$(CONFIG_MFD_TPS6594_SPI) += tps6594-spi.o
obj-$(CONFIG_MENELAUS) += menelaus.o
obj-$(CONFIG_TWL4030_CORE) += twl-core.o twl4030-irq.o twl6030-irq.o

View File

@ -63,6 +63,7 @@ static const struct of_device_id axp20x_i2c_of_match[] = {
{ .compatible = "x-powers,axp209", .data = (void *)AXP209_ID },
{ .compatible = "x-powers,axp221", .data = (void *)AXP221_ID },
{ .compatible = "x-powers,axp223", .data = (void *)AXP223_ID },
{ .compatible = "x-powers,axp313a", .data = (void *)AXP313A_ID },
{ .compatible = "x-powers,axp803", .data = (void *)AXP803_ID },
{ .compatible = "x-powers,axp806", .data = (void *)AXP806_ID },
{ .compatible = "x-powers,axp15060", .data = (void *)AXP15060_ID },
@ -77,6 +78,7 @@ static const struct i2c_device_id axp20x_i2c_id[] = {
{ "axp209", 0 },
{ "axp221", 0 },
{ "axp223", 0 },
{ "axp313a", 0 },
{ "axp803", 0 },
{ "axp806", 0 },
{ "axp15060", 0 },

View File

@ -39,6 +39,7 @@ static const char * const axp20x_model_names[] = {
"AXP221",
"AXP223",
"AXP288",
"AXP313a",
"AXP803",
"AXP806",
"AXP809",
@ -156,6 +157,25 @@ static const struct regmap_range axp806_writeable_ranges[] = {
regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT),
};
static const struct regmap_range axp313a_writeable_ranges[] = {
regmap_reg_range(AXP313A_ON_INDICATE, AXP313A_IRQ_STATE),
};
static const struct regmap_range axp313a_volatile_ranges[] = {
regmap_reg_range(AXP313A_SHUTDOWN_CTRL, AXP313A_SHUTDOWN_CTRL),
regmap_reg_range(AXP313A_IRQ_STATE, AXP313A_IRQ_STATE),
};
static const struct regmap_access_table axp313a_writeable_table = {
.yes_ranges = axp313a_writeable_ranges,
.n_yes_ranges = ARRAY_SIZE(axp313a_writeable_ranges),
};
static const struct regmap_access_table axp313a_volatile_table = {
.yes_ranges = axp313a_volatile_ranges,
.n_yes_ranges = ARRAY_SIZE(axp313a_volatile_ranges),
};
static const struct regmap_range axp806_volatile_ranges[] = {
regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
};
@ -248,6 +268,11 @@ static const struct resource axp288_fuel_gauge_resources[] = {
DEFINE_RES_IRQ(AXP288_IRQ_WL1),
};
static const struct resource axp313a_pek_resources[] = {
DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
};
static const struct resource axp803_pek_resources[] = {
DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
@ -304,6 +329,15 @@ static const struct regmap_config axp288_regmap_config = {
.cache_type = REGCACHE_RBTREE,
};
static const struct regmap_config axp313a_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.wr_table = &axp313a_writeable_table,
.volatile_table = &axp313a_volatile_table,
.max_register = AXP313A_IRQ_STATE,
.cache_type = REGCACHE_RBTREE,
};
static const struct regmap_config axp806_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
@ -456,6 +490,16 @@ static const struct regmap_irq axp288_regmap_irqs[] = {
INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
};
static const struct regmap_irq axp313a_regmap_irqs[] = {
INIT_REGMAP_IRQ(AXP313A, PEK_RIS_EDGE, 0, 7),
INIT_REGMAP_IRQ(AXP313A, PEK_FAL_EDGE, 0, 6),
INIT_REGMAP_IRQ(AXP313A, PEK_SHORT, 0, 5),
INIT_REGMAP_IRQ(AXP313A, PEK_LONG, 0, 4),
INIT_REGMAP_IRQ(AXP313A, DCDC3_V_LOW, 0, 3),
INIT_REGMAP_IRQ(AXP313A, DCDC2_V_LOW, 0, 2),
INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH, 0, 0),
};
static const struct regmap_irq axp803_regmap_irqs[] = {
INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7),
INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6),
@ -606,6 +650,17 @@ static const struct regmap_irq_chip axp288_regmap_irq_chip = {
};
static const struct regmap_irq_chip axp313a_regmap_irq_chip = {
.name = "axp313a_irq_chip",
.status_base = AXP313A_IRQ_STATE,
.ack_base = AXP313A_IRQ_STATE,
.unmask_base = AXP313A_IRQ_EN,
.init_ack_masked = true,
.irqs = axp313a_regmap_irqs,
.num_irqs = ARRAY_SIZE(axp313a_regmap_irqs),
.num_regs = 1,
};
static const struct regmap_irq_chip axp803_regmap_irq_chip = {
.name = "axp803",
.status_base = AXP20X_IRQ1_STATE,
@ -745,6 +800,11 @@ static const struct mfd_cell axp152_cells[] = {
},
};
static struct mfd_cell axp313a_cells[] = {
MFD_CELL_NAME("axp20x-regulator"),
MFD_CELL_RES("axp313a-pek", axp313a_pek_resources),
};
static const struct resource axp288_adc_resources[] = {
DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"),
};
@ -914,8 +974,18 @@ static const struct mfd_cell axp_regulator_only_cells[] = {
static int axp20x_power_off(struct sys_off_data *data)
{
struct axp20x_dev *axp20x = data->cb_data;
unsigned int shutdown_reg;
regmap_write(axp20x->regmap, AXP20X_OFF_CTRL, AXP20X_OFF);
switch (axp20x->variant) {
case AXP313A_ID:
shutdown_reg = AXP313A_SHUTDOWN_CTRL;
break;
default:
shutdown_reg = AXP20X_OFF_CTRL;
break;
}
regmap_write(axp20x->regmap, shutdown_reg, AXP20X_OFF);
/* Give capacitors etc. time to drain to avoid kernel panic msg. */
mdelay(500);
@ -978,6 +1048,12 @@ int axp20x_match_device(struct axp20x_dev *axp20x)
axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
axp20x->irq_flags = IRQF_TRIGGER_LOW;
break;
case AXP313A_ID:
axp20x->nr_cells = ARRAY_SIZE(axp313a_cells);
axp20x->cells = axp313a_cells;
axp20x->regmap_cfg = &axp313a_regmap_config;
axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip;
break;
case AXP803_ID:
axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
axp20x->cells = axp803_cells;

View File

@ -40,9 +40,6 @@ static const struct mfd_cell rt5033_devs[] = {
{
.name = "rt5033-charger",
.of_compatible = "richtek,rt5033-charger",
}, {
.name = "rt5033-battery",
.of_compatible = "richtek,rt5033-battery",
}, {
.name = "rt5033-led",
.of_compatible = "richtek,rt5033-led",
@ -58,7 +55,7 @@ static const struct regmap_config rt5033_regmap_config = {
static int rt5033_i2c_probe(struct i2c_client *i2c)
{
struct rt5033_dev *rt5033;
unsigned int dev_id;
unsigned int dev_id, chip_rev;
int ret;
rt5033 = devm_kzalloc(&i2c->dev, sizeof(*rt5033), GFP_KERNEL);
@ -81,7 +78,8 @@ static int rt5033_i2c_probe(struct i2c_client *i2c)
dev_err(&i2c->dev, "Device not found\n");
return -ENODEV;
}
dev_info(&i2c->dev, "Device found Device ID: %04x\n", dev_id);
chip_rev = dev_id & RT5033_CHIP_REV_MASK;
dev_info(&i2c->dev, "Device found (rev. %d)\n", chip_rev);
ret = regmap_add_irq_chip(rt5033->regmap, rt5033->irq,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT,

View File

@ -72,22 +72,22 @@ static const struct simple_mfd_data silergy_sy7636a = {
.mfd_cell_size = ARRAY_SIZE(sy7636a_cells),
};
static const struct mfd_cell max597x_cells[] = {
{ .name = "max597x-regulator", },
{ .name = "max597x-iio", },
{ .name = "max597x-led", },
static const struct mfd_cell max5970_cells[] = {
{ .name = "max5970-regulator", },
{ .name = "max5970-iio", },
{ .name = "max5970-led", },
};
static const struct simple_mfd_data maxim_max597x = {
.mfd_cell = max597x_cells,
.mfd_cell_size = ARRAY_SIZE(max597x_cells),
static const struct simple_mfd_data maxim_max5970 = {
.mfd_cell = max5970_cells,
.mfd_cell_size = ARRAY_SIZE(max5970_cells),
};
static const struct of_device_id simple_mfd_i2c_of_match[] = {
{ .compatible = "kontron,sl28cpld" },
{ .compatible = "silergy,sy7636a", .data = &silergy_sy7636a},
{ .compatible = "maxim,max5970", .data = &maxim_max597x},
{ .compatible = "maxim,max5978", .data = &maxim_max597x},
{ .compatible = "maxim,max5970", .data = &maxim_max5970},
{ .compatible = "maxim,max5978", .data = &maxim_max5970},
{}
};
MODULE_DEVICE_TABLE(of, simple_mfd_i2c_of_match);

462
drivers/mfd/tps6594-core.c Normal file
View File

@ -0,0 +1,462 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Core functions for TI TPS6594/TPS6593/LP8764 PMICs
*
* Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/
*/
#include <linux/completion.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/mfd/core.h>
#include <linux/mfd/tps6594.h>
#define TPS6594_CRC_SYNC_TIMEOUT_MS 150
/* Completion to synchronize CRC feature enabling on all PMICs */
static DECLARE_COMPLETION(tps6594_crc_comp);
static const struct resource tps6594_regulator_resources[] = {
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK1_OV, TPS6594_IRQ_NAME_BUCK1_OV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK1_UV, TPS6594_IRQ_NAME_BUCK1_UV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK1_SC, TPS6594_IRQ_NAME_BUCK1_SC),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK1_ILIM, TPS6594_IRQ_NAME_BUCK1_ILIM),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK2_OV, TPS6594_IRQ_NAME_BUCK2_OV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK2_UV, TPS6594_IRQ_NAME_BUCK2_UV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK2_SC, TPS6594_IRQ_NAME_BUCK2_SC),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK2_ILIM, TPS6594_IRQ_NAME_BUCK2_ILIM),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK3_OV, TPS6594_IRQ_NAME_BUCK3_OV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK3_UV, TPS6594_IRQ_NAME_BUCK3_UV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK3_SC, TPS6594_IRQ_NAME_BUCK3_SC),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK3_ILIM, TPS6594_IRQ_NAME_BUCK3_ILIM),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK4_OV, TPS6594_IRQ_NAME_BUCK4_OV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK4_UV, TPS6594_IRQ_NAME_BUCK4_UV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK4_SC, TPS6594_IRQ_NAME_BUCK4_SC),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK4_ILIM, TPS6594_IRQ_NAME_BUCK4_ILIM),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK5_OV, TPS6594_IRQ_NAME_BUCK5_OV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK5_UV, TPS6594_IRQ_NAME_BUCK5_UV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK5_SC, TPS6594_IRQ_NAME_BUCK5_SC),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BUCK5_ILIM, TPS6594_IRQ_NAME_BUCK5_ILIM),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_LDO1_OV, TPS6594_IRQ_NAME_LDO1_OV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_LDO1_UV, TPS6594_IRQ_NAME_LDO1_UV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_LDO1_SC, TPS6594_IRQ_NAME_LDO1_SC),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_LDO1_ILIM, TPS6594_IRQ_NAME_LDO1_ILIM),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_LDO2_OV, TPS6594_IRQ_NAME_LDO2_OV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_LDO2_UV, TPS6594_IRQ_NAME_LDO2_UV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_LDO2_SC, TPS6594_IRQ_NAME_LDO2_SC),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_LDO2_ILIM, TPS6594_IRQ_NAME_LDO2_ILIM),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_LDO3_OV, TPS6594_IRQ_NAME_LDO3_OV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_LDO3_UV, TPS6594_IRQ_NAME_LDO3_UV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_LDO3_SC, TPS6594_IRQ_NAME_LDO3_SC),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_LDO3_ILIM, TPS6594_IRQ_NAME_LDO3_ILIM),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_LDO4_OV, TPS6594_IRQ_NAME_LDO4_OV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_LDO4_UV, TPS6594_IRQ_NAME_LDO4_UV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_LDO4_SC, TPS6594_IRQ_NAME_LDO4_SC),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_LDO4_ILIM, TPS6594_IRQ_NAME_LDO4_ILIM),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_VCCA_OV, TPS6594_IRQ_NAME_VCCA_OV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_VCCA_UV, TPS6594_IRQ_NAME_VCCA_UV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_VMON1_OV, TPS6594_IRQ_NAME_VMON1_OV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_VMON1_UV, TPS6594_IRQ_NAME_VMON1_UV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_VMON1_RV, TPS6594_IRQ_NAME_VMON1_RV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_VMON2_OV, TPS6594_IRQ_NAME_VMON2_OV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_VMON2_UV, TPS6594_IRQ_NAME_VMON2_UV),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_VMON2_RV, TPS6594_IRQ_NAME_VMON2_RV),
};
static const struct resource tps6594_pinctrl_resources[] = {
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_GPIO9, TPS6594_IRQ_NAME_GPIO9),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_GPIO10, TPS6594_IRQ_NAME_GPIO10),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_GPIO11, TPS6594_IRQ_NAME_GPIO11),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_GPIO1, TPS6594_IRQ_NAME_GPIO1),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_GPIO2, TPS6594_IRQ_NAME_GPIO2),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_GPIO3, TPS6594_IRQ_NAME_GPIO3),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_GPIO4, TPS6594_IRQ_NAME_GPIO4),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_GPIO5, TPS6594_IRQ_NAME_GPIO5),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_GPIO6, TPS6594_IRQ_NAME_GPIO6),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_GPIO7, TPS6594_IRQ_NAME_GPIO7),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_GPIO8, TPS6594_IRQ_NAME_GPIO8),
};
static const struct resource tps6594_pfsm_resources[] = {
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_NPWRON_START, TPS6594_IRQ_NAME_NPWRON_START),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_ENABLE, TPS6594_IRQ_NAME_ENABLE),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_FSD, TPS6594_IRQ_NAME_FSD),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_SOFT_REBOOT, TPS6594_IRQ_NAME_SOFT_REBOOT),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BIST_PASS, TPS6594_IRQ_NAME_BIST_PASS),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_EXT_CLK, TPS6594_IRQ_NAME_EXT_CLK),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_TWARN, TPS6594_IRQ_NAME_TWARN),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_TSD_ORD, TPS6594_IRQ_NAME_TSD_ORD),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_BIST_FAIL, TPS6594_IRQ_NAME_BIST_FAIL),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_REG_CRC_ERR, TPS6594_IRQ_NAME_REG_CRC_ERR),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_RECOV_CNT, TPS6594_IRQ_NAME_RECOV_CNT),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_SPMI_ERR, TPS6594_IRQ_NAME_SPMI_ERR),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_NPWRON_LONG, TPS6594_IRQ_NAME_NPWRON_LONG),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_NINT_READBACK, TPS6594_IRQ_NAME_NINT_READBACK),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_NRSTOUT_READBACK, TPS6594_IRQ_NAME_NRSTOUT_READBACK),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_TSD_IMM, TPS6594_IRQ_NAME_TSD_IMM),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_VCCA_OVP, TPS6594_IRQ_NAME_VCCA_OVP),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_PFSM_ERR, TPS6594_IRQ_NAME_PFSM_ERR),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_IMM_SHUTDOWN, TPS6594_IRQ_NAME_IMM_SHUTDOWN),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_ORD_SHUTDOWN, TPS6594_IRQ_NAME_ORD_SHUTDOWN),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_MCU_PWR_ERR, TPS6594_IRQ_NAME_MCU_PWR_ERR),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_SOC_PWR_ERR, TPS6594_IRQ_NAME_SOC_PWR_ERR),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_COMM_FRM_ERR, TPS6594_IRQ_NAME_COMM_FRM_ERR),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_COMM_CRC_ERR, TPS6594_IRQ_NAME_COMM_CRC_ERR),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_COMM_ADR_ERR, TPS6594_IRQ_NAME_COMM_ADR_ERR),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_EN_DRV_READBACK, TPS6594_IRQ_NAME_EN_DRV_READBACK),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_NRSTOUT_SOC_READBACK,
TPS6594_IRQ_NAME_NRSTOUT_SOC_READBACK),
};
static const struct resource tps6594_esm_resources[] = {
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_ESM_SOC_PIN, TPS6594_IRQ_NAME_ESM_SOC_PIN),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_ESM_SOC_FAIL, TPS6594_IRQ_NAME_ESM_SOC_FAIL),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_ESM_SOC_RST, TPS6594_IRQ_NAME_ESM_SOC_RST),
};
static const struct resource tps6594_rtc_resources[] = {
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_TIMER, TPS6594_IRQ_NAME_TIMER),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_ALARM, TPS6594_IRQ_NAME_ALARM),
DEFINE_RES_IRQ_NAMED(TPS6594_IRQ_POWER_UP, TPS6594_IRQ_NAME_POWERUP),
};
static const struct mfd_cell tps6594_common_cells[] = {
MFD_CELL_RES("tps6594-regulator", tps6594_regulator_resources),
MFD_CELL_RES("tps6594-pinctrl", tps6594_pinctrl_resources),
MFD_CELL_RES("tps6594-pfsm", tps6594_pfsm_resources),
MFD_CELL_RES("tps6594-esm", tps6594_esm_resources),
};
static const struct mfd_cell tps6594_rtc_cells[] = {
MFD_CELL_RES("tps6594-rtc", tps6594_rtc_resources),
};
static const struct regmap_irq tps6594_irqs[] = {
/* INT_BUCK1_2 register */
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK1_OV, 0, TPS6594_BIT_BUCKX_OV_INT(0)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK1_UV, 0, TPS6594_BIT_BUCKX_UV_INT(0)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK1_SC, 0, TPS6594_BIT_BUCKX_SC_INT(0)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK1_ILIM, 0, TPS6594_BIT_BUCKX_ILIM_INT(0)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK2_OV, 0, TPS6594_BIT_BUCKX_OV_INT(1)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK2_UV, 0, TPS6594_BIT_BUCKX_UV_INT(1)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK2_SC, 0, TPS6594_BIT_BUCKX_SC_INT(1)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK2_ILIM, 0, TPS6594_BIT_BUCKX_ILIM_INT(1)),
/* INT_BUCK3_4 register */
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK3_OV, 1, TPS6594_BIT_BUCKX_OV_INT(2)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK3_UV, 1, TPS6594_BIT_BUCKX_UV_INT(2)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK3_SC, 1, TPS6594_BIT_BUCKX_SC_INT(2)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK3_ILIM, 1, TPS6594_BIT_BUCKX_ILIM_INT(2)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK4_OV, 1, TPS6594_BIT_BUCKX_OV_INT(3)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK4_UV, 1, TPS6594_BIT_BUCKX_UV_INT(3)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK4_SC, 1, TPS6594_BIT_BUCKX_SC_INT(3)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK4_ILIM, 1, TPS6594_BIT_BUCKX_ILIM_INT(3)),
/* INT_BUCK5 register */
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK5_OV, 2, TPS6594_BIT_BUCKX_OV_INT(4)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK5_UV, 2, TPS6594_BIT_BUCKX_UV_INT(4)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK5_SC, 2, TPS6594_BIT_BUCKX_SC_INT(4)),
REGMAP_IRQ_REG(TPS6594_IRQ_BUCK5_ILIM, 2, TPS6594_BIT_BUCKX_ILIM_INT(4)),
/* INT_LDO1_2 register */
REGMAP_IRQ_REG(TPS6594_IRQ_LDO1_OV, 3, TPS6594_BIT_LDOX_OV_INT(0)),
REGMAP_IRQ_REG(TPS6594_IRQ_LDO1_UV, 3, TPS6594_BIT_LDOX_UV_INT(0)),
REGMAP_IRQ_REG(TPS6594_IRQ_LDO1_SC, 3, TPS6594_BIT_LDOX_SC_INT(0)),
REGMAP_IRQ_REG(TPS6594_IRQ_LDO1_ILIM, 3, TPS6594_BIT_LDOX_ILIM_INT(0)),
REGMAP_IRQ_REG(TPS6594_IRQ_LDO2_OV, 3, TPS6594_BIT_LDOX_OV_INT(1)),
REGMAP_IRQ_REG(TPS6594_IRQ_LDO2_UV, 3, TPS6594_BIT_LDOX_UV_INT(1)),
REGMAP_IRQ_REG(TPS6594_IRQ_LDO2_SC, 3, TPS6594_BIT_LDOX_SC_INT(1)),
REGMAP_IRQ_REG(TPS6594_IRQ_LDO2_ILIM, 3, TPS6594_BIT_LDOX_ILIM_INT(1)),
/* INT_LDO3_4 register */
REGMAP_IRQ_REG(TPS6594_IRQ_LDO3_OV, 4, TPS6594_BIT_LDOX_OV_INT(2)),
REGMAP_IRQ_REG(TPS6594_IRQ_LDO3_UV, 4, TPS6594_BIT_LDOX_UV_INT(2)),
REGMAP_IRQ_REG(TPS6594_IRQ_LDO3_SC, 4, TPS6594_BIT_LDOX_SC_INT(2)),
REGMAP_IRQ_REG(TPS6594_IRQ_LDO3_ILIM, 4, TPS6594_BIT_LDOX_ILIM_INT(2)),
REGMAP_IRQ_REG(TPS6594_IRQ_LDO4_OV, 4, TPS6594_BIT_LDOX_OV_INT(3)),
REGMAP_IRQ_REG(TPS6594_IRQ_LDO4_UV, 4, TPS6594_BIT_LDOX_UV_INT(3)),
REGMAP_IRQ_REG(TPS6594_IRQ_LDO4_SC, 4, TPS6594_BIT_LDOX_SC_INT(3)),
REGMAP_IRQ_REG(TPS6594_IRQ_LDO4_ILIM, 4, TPS6594_BIT_LDOX_ILIM_INT(3)),
/* INT_VMON register */
REGMAP_IRQ_REG(TPS6594_IRQ_VCCA_OV, 5, TPS6594_BIT_VCCA_OV_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_VCCA_UV, 5, TPS6594_BIT_VCCA_UV_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_VMON1_OV, 5, TPS6594_BIT_VMON1_OV_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_VMON1_UV, 5, TPS6594_BIT_VMON1_UV_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_VMON1_RV, 5, TPS6594_BIT_VMON1_RV_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_VMON2_OV, 5, TPS6594_BIT_VMON2_OV_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_VMON2_UV, 5, TPS6594_BIT_VMON2_UV_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_VMON2_RV, 5, TPS6594_BIT_VMON2_RV_INT),
/* INT_GPIO register */
REGMAP_IRQ_REG(TPS6594_IRQ_GPIO9, 6, TPS6594_BIT_GPIO9_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_GPIO10, 6, TPS6594_BIT_GPIO10_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_GPIO11, 6, TPS6594_BIT_GPIO11_INT),
/* INT_GPIO1_8 register */
REGMAP_IRQ_REG(TPS6594_IRQ_GPIO1, 7, TPS6594_BIT_GPIOX_INT(0)),
REGMAP_IRQ_REG(TPS6594_IRQ_GPIO2, 7, TPS6594_BIT_GPIOX_INT(1)),
REGMAP_IRQ_REG(TPS6594_IRQ_GPIO3, 7, TPS6594_BIT_GPIOX_INT(2)),
REGMAP_IRQ_REG(TPS6594_IRQ_GPIO4, 7, TPS6594_BIT_GPIOX_INT(3)),
REGMAP_IRQ_REG(TPS6594_IRQ_GPIO5, 7, TPS6594_BIT_GPIOX_INT(4)),
REGMAP_IRQ_REG(TPS6594_IRQ_GPIO6, 7, TPS6594_BIT_GPIOX_INT(5)),
REGMAP_IRQ_REG(TPS6594_IRQ_GPIO7, 7, TPS6594_BIT_GPIOX_INT(6)),
REGMAP_IRQ_REG(TPS6594_IRQ_GPIO8, 7, TPS6594_BIT_GPIOX_INT(7)),
/* INT_STARTUP register */
REGMAP_IRQ_REG(TPS6594_IRQ_NPWRON_START, 8, TPS6594_BIT_NPWRON_START_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_ENABLE, 8, TPS6594_BIT_ENABLE_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_FSD, 8, TPS6594_BIT_FSD_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_SOFT_REBOOT, 8, TPS6594_BIT_SOFT_REBOOT_INT),
/* INT_MISC register */
REGMAP_IRQ_REG(TPS6594_IRQ_BIST_PASS, 9, TPS6594_BIT_BIST_PASS_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_EXT_CLK, 9, TPS6594_BIT_EXT_CLK_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_TWARN, 9, TPS6594_BIT_TWARN_INT),
/* INT_MODERATE_ERR register */
REGMAP_IRQ_REG(TPS6594_IRQ_TSD_ORD, 10, TPS6594_BIT_TSD_ORD_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_BIST_FAIL, 10, TPS6594_BIT_BIST_FAIL_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_REG_CRC_ERR, 10, TPS6594_BIT_REG_CRC_ERR_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_RECOV_CNT, 10, TPS6594_BIT_RECOV_CNT_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_SPMI_ERR, 10, TPS6594_BIT_SPMI_ERR_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_NPWRON_LONG, 10, TPS6594_BIT_NPWRON_LONG_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_NINT_READBACK, 10, TPS6594_BIT_NINT_READBACK_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_NRSTOUT_READBACK, 10, TPS6594_BIT_NRSTOUT_READBACK_INT),
/* INT_SEVERE_ERR register */
REGMAP_IRQ_REG(TPS6594_IRQ_TSD_IMM, 11, TPS6594_BIT_TSD_IMM_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_VCCA_OVP, 11, TPS6594_BIT_VCCA_OVP_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_PFSM_ERR, 11, TPS6594_BIT_PFSM_ERR_INT),
/* INT_FSM_ERR register */
REGMAP_IRQ_REG(TPS6594_IRQ_IMM_SHUTDOWN, 12, TPS6594_BIT_IMM_SHUTDOWN_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_ORD_SHUTDOWN, 12, TPS6594_BIT_ORD_SHUTDOWN_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_MCU_PWR_ERR, 12, TPS6594_BIT_MCU_PWR_ERR_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_SOC_PWR_ERR, 12, TPS6594_BIT_SOC_PWR_ERR_INT),
/* INT_COMM_ERR register */
REGMAP_IRQ_REG(TPS6594_IRQ_COMM_FRM_ERR, 13, TPS6594_BIT_COMM_FRM_ERR_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_COMM_CRC_ERR, 13, TPS6594_BIT_COMM_CRC_ERR_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_COMM_ADR_ERR, 13, TPS6594_BIT_COMM_ADR_ERR_INT),
/* INT_READBACK_ERR register */
REGMAP_IRQ_REG(TPS6594_IRQ_EN_DRV_READBACK, 14, TPS6594_BIT_EN_DRV_READBACK_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_NRSTOUT_SOC_READBACK, 14, TPS6594_BIT_NRSTOUT_SOC_READBACK_INT),
/* INT_ESM register */
REGMAP_IRQ_REG(TPS6594_IRQ_ESM_SOC_PIN, 15, TPS6594_BIT_ESM_SOC_PIN_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_ESM_SOC_FAIL, 15, TPS6594_BIT_ESM_SOC_FAIL_INT),
REGMAP_IRQ_REG(TPS6594_IRQ_ESM_SOC_RST, 15, TPS6594_BIT_ESM_SOC_RST_INT),
/* RTC_STATUS register */
REGMAP_IRQ_REG(TPS6594_IRQ_TIMER, 16, TPS6594_BIT_TIMER),
REGMAP_IRQ_REG(TPS6594_IRQ_ALARM, 16, TPS6594_BIT_ALARM),
REGMAP_IRQ_REG(TPS6594_IRQ_POWER_UP, 16, TPS6594_BIT_POWER_UP),
};
static const unsigned int tps6594_irq_reg[] = {
TPS6594_REG_INT_BUCK1_2,
TPS6594_REG_INT_BUCK3_4,
TPS6594_REG_INT_BUCK5,
TPS6594_REG_INT_LDO1_2,
TPS6594_REG_INT_LDO3_4,
TPS6594_REG_INT_VMON,
TPS6594_REG_INT_GPIO,
TPS6594_REG_INT_GPIO1_8,
TPS6594_REG_INT_STARTUP,
TPS6594_REG_INT_MISC,
TPS6594_REG_INT_MODERATE_ERR,
TPS6594_REG_INT_SEVERE_ERR,
TPS6594_REG_INT_FSM_ERR,
TPS6594_REG_INT_COMM_ERR,
TPS6594_REG_INT_READBACK_ERR,
TPS6594_REG_INT_ESM,
TPS6594_REG_RTC_STATUS,
};
static inline unsigned int tps6594_get_irq_reg(struct regmap_irq_chip_data *data,
unsigned int base, int index)
{
return tps6594_irq_reg[index];
};
static int tps6594_handle_post_irq(void *irq_drv_data)
{
struct tps6594 *tps = irq_drv_data;
int ret = 0;
/*
* When CRC is enabled, writing to a read-only bit triggers an error,
* and COMM_ADR_ERR_INT bit is set. Besides, bits indicating interrupts
* (that must be cleared) and read-only bits are sometimes grouped in
* the same register.
* Since regmap clears interrupts by doing a write per register, clearing
* an interrupt bit in a register containing also a read-only bit makes
* COMM_ADR_ERR_INT bit set. Clear immediately this bit to avoid raising
* a new interrupt.
*/
if (tps->use_crc)
ret = regmap_write_bits(tps->regmap, TPS6594_REG_INT_COMM_ERR,
TPS6594_BIT_COMM_ADR_ERR_INT,
TPS6594_BIT_COMM_ADR_ERR_INT);
return ret;
};
static struct regmap_irq_chip tps6594_irq_chip = {
.ack_base = TPS6594_REG_INT_BUCK1_2,
.ack_invert = 1,
.clear_ack = 1,
.init_ack_masked = 1,
.num_regs = ARRAY_SIZE(tps6594_irq_reg),
.irqs = tps6594_irqs,
.num_irqs = ARRAY_SIZE(tps6594_irqs),
.get_irq_reg = tps6594_get_irq_reg,
.handle_post_irq = tps6594_handle_post_irq,
};
bool tps6594_is_volatile_reg(struct device *dev, unsigned int reg)
{
return (reg >= TPS6594_REG_INT_TOP && reg <= TPS6594_REG_STAT_READBACK_ERR) ||
reg == TPS6594_REG_RTC_STATUS;
}
EXPORT_SYMBOL_GPL(tps6594_is_volatile_reg);
static int tps6594_check_crc_mode(struct tps6594 *tps, bool primary_pmic)
{
int ret;
/*
* Check if CRC is enabled.
* Once CRC is enabled, it can't be disabled until next power cycle.
*/
tps->use_crc = true;
ret = regmap_test_bits(tps->regmap, TPS6594_REG_SERIAL_IF_CONFIG,
TPS6594_BIT_I2C1_SPI_CRC_EN);
if (ret == 0) {
ret = -EIO;
} else if (ret > 0) {
dev_info(tps->dev, "CRC feature enabled on %s PMIC",
primary_pmic ? "primary" : "secondary");
ret = 0;
}
return ret;
}
static int tps6594_set_crc_feature(struct tps6594 *tps)
{
int ret;
ret = tps6594_check_crc_mode(tps, true);
if (ret) {
/*
* If CRC is not already enabled, force PFSM I2C_2 trigger to enable it
* on primary PMIC.
*/
tps->use_crc = false;
ret = regmap_write_bits(tps->regmap, TPS6594_REG_FSM_I2C_TRIGGERS,
TPS6594_BIT_TRIGGER_I2C(2), TPS6594_BIT_TRIGGER_I2C(2));
if (ret)
return ret;
/*
* Wait for PFSM to process trigger.
* The datasheet indicates 2 ms, and clock specification is +/-5%.
* 4 ms should provide sufficient margin.
*/
usleep_range(4000, 5000);
ret = tps6594_check_crc_mode(tps, true);
}
return ret;
}
static int tps6594_enable_crc(struct tps6594 *tps)
{
struct device *dev = tps->dev;
unsigned int is_primary;
unsigned long timeout = msecs_to_jiffies(TPS6594_CRC_SYNC_TIMEOUT_MS);
int ret;
/*
* CRC mode can be used with I2C or SPI protocols.
* If this mode is specified for primary PMIC, it will also be applied to secondary PMICs
* through SPMI serial interface.
* In this multi-PMIC synchronization scheme, the primary PMIC is the controller device
* on the SPMI bus, and the secondary PMICs are the target devices on the SPMI bus.
*/
is_primary = of_property_read_bool(dev->of_node, "ti,primary-pmic");
if (is_primary) {
/* Enable CRC feature on primary PMIC */
ret = tps6594_set_crc_feature(tps);
if (ret)
return ret;
/* Notify secondary PMICs that CRC feature is enabled */
complete_all(&tps6594_crc_comp);
} else {
/* Wait for CRC feature enabling event from primary PMIC */
ret = wait_for_completion_interruptible_timeout(&tps6594_crc_comp, timeout);
if (ret == 0)
ret = -ETIMEDOUT;
else if (ret > 0)
ret = tps6594_check_crc_mode(tps, false);
}
return ret;
}
int tps6594_device_init(struct tps6594 *tps, bool enable_crc)
{
struct device *dev = tps->dev;
int ret;
if (enable_crc) {
ret = tps6594_enable_crc(tps);
if (ret)
return dev_err_probe(dev, ret, "Failed to enable CRC\n");
}
/* Keep PMIC in ACTIVE state */
ret = regmap_set_bits(tps->regmap, TPS6594_REG_FSM_NSLEEP_TRIGGERS,
TPS6594_BIT_NSLEEP1B | TPS6594_BIT_NSLEEP2B);
if (ret)
return dev_err_probe(dev, ret, "Failed to set PMIC state\n");
tps6594_irq_chip.irq_drv_data = tps;
tps6594_irq_chip.name = devm_kasprintf(dev, GFP_KERNEL, "%s-%ld-0x%02x",
dev->driver->name, tps->chip_id, tps->reg);
ret = devm_regmap_add_irq_chip(dev, tps->regmap, tps->irq, IRQF_SHARED | IRQF_ONESHOT,
0, &tps6594_irq_chip, &tps->irq_data);
if (ret)
return dev_err_probe(dev, ret, "Failed to add regmap IRQ\n");
ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, tps6594_common_cells,
ARRAY_SIZE(tps6594_common_cells), NULL, 0,
regmap_irq_get_domain(tps->irq_data));
if (ret)
return dev_err_probe(dev, ret, "Failed to add common child devices\n");
/* No RTC for LP8764 */
if (tps->chip_id != LP8764) {
ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, tps6594_rtc_cells,
ARRAY_SIZE(tps6594_rtc_cells), NULL, 0,
regmap_irq_get_domain(tps->irq_data));
if (ret)
return dev_err_probe(dev, ret, "Failed to add RTC child device\n");
}
return 0;
}
EXPORT_SYMBOL_GPL(tps6594_device_init);
MODULE_AUTHOR("Julien Panis <jpanis@baylibre.com>");
MODULE_DESCRIPTION("TPS6594 Driver");
MODULE_LICENSE("GPL");

244
drivers/mfd/tps6594-i2c.c Normal file
View File

@ -0,0 +1,244 @@
// SPDX-License-Identifier: GPL-2.0
/*
* I2C access driver for TI TPS6594/TPS6593/LP8764 PMICs
*
* Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/
*/
#include <linux/crc8.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/of_device.h>
#include <linux/regmap.h>
#include <linux/mfd/tps6594.h>
static bool enable_crc;
module_param(enable_crc, bool, 0444);
MODULE_PARM_DESC(enable_crc, "Enable CRC feature for I2C interface");
DECLARE_CRC8_TABLE(tps6594_i2c_crc_table);
static int tps6594_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
{
int ret = i2c_transfer(adap, msgs, num);
if (ret == num)
return 0;
else if (ret < 0)
return ret;
else
return -EIO;
}
static int tps6594_i2c_reg_read_with_crc(struct i2c_client *client, u8 page, u8 reg, u8 *val)
{
struct i2c_msg msgs[2];
u8 buf_rx[] = { 0, 0 };
/* I2C address = I2C base address + Page index */
const u8 addr = client->addr + page;
/*
* CRC is calculated from every bit included in the protocol
* except the ACK bits from the target. Byte stream is:
* - B0: (I2C_addr_7bits << 1) | WR_bit, with WR_bit = 0
* - B1: reg
* - B2: (I2C_addr_7bits << 1) | RD_bit, with RD_bit = 1
* - B3: val
* - B4: CRC from B0-B1-B2-B3
*/
u8 crc_data[] = { addr << 1, reg, addr << 1 | 1, 0 };
int ret;
/* Write register */
msgs[0].addr = addr;
msgs[0].flags = 0;
msgs[0].len = 1;
msgs[0].buf = &reg;
/* Read data and CRC */
msgs[1].addr = msgs[0].addr;
msgs[1].flags = I2C_M_RD;
msgs[1].len = 2;
msgs[1].buf = buf_rx;
ret = tps6594_i2c_transfer(client->adapter, msgs, 2);
if (ret < 0)
return ret;
crc_data[sizeof(crc_data) - 1] = *val = buf_rx[0];
if (buf_rx[1] != crc8(tps6594_i2c_crc_table, crc_data, sizeof(crc_data), CRC8_INIT_VALUE))
return -EIO;
return ret;
}
static int tps6594_i2c_reg_write_with_crc(struct i2c_client *client, u8 page, u8 reg, u8 val)
{
struct i2c_msg msg;
u8 buf[] = { reg, val, 0 };
/* I2C address = I2C base address + Page index */
const u8 addr = client->addr + page;
/*
* CRC is calculated from every bit included in the protocol
* except the ACK bits from the target. Byte stream is:
* - B0: (I2C_addr_7bits << 1) | WR_bit, with WR_bit = 0
* - B1: reg
* - B2: val
* - B3: CRC from B0-B1-B2
*/
const u8 crc_data[] = { addr << 1, reg, val };
/* Write register, data and CRC */
msg.addr = addr;
msg.flags = client->flags & I2C_M_TEN;
msg.len = sizeof(buf);
msg.buf = buf;
buf[msg.len - 1] = crc8(tps6594_i2c_crc_table, crc_data, sizeof(crc_data), CRC8_INIT_VALUE);
return tps6594_i2c_transfer(client->adapter, &msg, 1);
}
static int tps6594_i2c_read(void *context, const void *reg_buf, size_t reg_size,
void *val_buf, size_t val_size)
{
struct i2c_client *client = context;
struct tps6594 *tps = i2c_get_clientdata(client);
struct i2c_msg msgs[2];
const u8 *reg_bytes = reg_buf;
u8 *val_bytes = val_buf;
const u8 page = reg_bytes[1];
u8 reg = reg_bytes[0];
int ret = 0;
int i;
if (tps->use_crc) {
/*
* Auto-increment feature does not support CRC protocol.
* Converts the bulk read operation into a series of single read operations.
*/
for (i = 0 ; ret == 0 && i < val_size ; i++)
ret = tps6594_i2c_reg_read_with_crc(client, page, reg + i, val_bytes + i);
return ret;
}
/* Write register: I2C address = I2C base address + Page index */
msgs[0].addr = client->addr + page;
msgs[0].flags = 0;
msgs[0].len = 1;
msgs[0].buf = &reg;
/* Read data */
msgs[1].addr = msgs[0].addr;
msgs[1].flags = I2C_M_RD;
msgs[1].len = val_size;
msgs[1].buf = val_bytes;
return tps6594_i2c_transfer(client->adapter, msgs, 2);
}
static int tps6594_i2c_write(void *context, const void *data, size_t count)
{
struct i2c_client *client = context;
struct tps6594 *tps = i2c_get_clientdata(client);
struct i2c_msg msg;
const u8 *bytes = data;
u8 *buf;
const u8 page = bytes[1];
const u8 reg = bytes[0];
int ret = 0;
int i;
if (tps->use_crc) {
/*
* Auto-increment feature does not support CRC protocol.
* Converts the bulk write operation into a series of single write operations.
*/
for (i = 0 ; ret == 0 && i < count - 2 ; i++)
ret = tps6594_i2c_reg_write_with_crc(client, page, reg + i, bytes[i + 2]);
return ret;
}
/* Setup buffer: page byte is not sent */
buf = kzalloc(--count, GFP_KERNEL);
if (!buf)
return -ENOMEM;
buf[0] = reg;
for (i = 0 ; i < count - 1 ; i++)
buf[i + 1] = bytes[i + 2];
/* Write register and data: I2C address = I2C base address + Page index */
msg.addr = client->addr + page;
msg.flags = client->flags & I2C_M_TEN;
msg.len = count;
msg.buf = buf;
ret = tps6594_i2c_transfer(client->adapter, &msg, 1);
kfree(buf);
return ret;
}
static const struct regmap_config tps6594_i2c_regmap_config = {
.reg_bits = 16,
.val_bits = 8,
.max_register = TPS6594_REG_DWD_FAIL_CNT_REG,
.volatile_reg = tps6594_is_volatile_reg,
.read = tps6594_i2c_read,
.write = tps6594_i2c_write,
};
static const struct of_device_id tps6594_i2c_of_match_table[] = {
{ .compatible = "ti,tps6594-q1", .data = (void *)TPS6594, },
{ .compatible = "ti,tps6593-q1", .data = (void *)TPS6593, },
{ .compatible = "ti,lp8764-q1", .data = (void *)LP8764, },
{}
};
MODULE_DEVICE_TABLE(of, tps6594_i2c_of_match_table);
static int tps6594_i2c_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct tps6594 *tps;
const struct of_device_id *match;
tps = devm_kzalloc(dev, sizeof(*tps), GFP_KERNEL);
if (!tps)
return -ENOMEM;
i2c_set_clientdata(client, tps);
tps->dev = dev;
tps->reg = client->addr;
tps->irq = client->irq;
tps->regmap = devm_regmap_init(dev, NULL, client, &tps6594_i2c_regmap_config);
if (IS_ERR(tps->regmap))
return dev_err_probe(dev, PTR_ERR(tps->regmap), "Failed to init regmap\n");
match = of_match_device(tps6594_i2c_of_match_table, dev);
if (!match)
return dev_err_probe(dev, PTR_ERR(match), "Failed to find matching chip ID\n");
tps->chip_id = (unsigned long)match->data;
crc8_populate_msb(tps6594_i2c_crc_table, TPS6594_CRC8_POLYNOMIAL);
return tps6594_device_init(tps, enable_crc);
}
static struct i2c_driver tps6594_i2c_driver = {
.driver = {
.name = "tps6594",
.of_match_table = tps6594_i2c_of_match_table,
},
.probe_new = tps6594_i2c_probe,
};
module_i2c_driver(tps6594_i2c_driver);
MODULE_AUTHOR("Julien Panis <jpanis@baylibre.com>");
MODULE_DESCRIPTION("TPS6594 I2C Interface Driver");
MODULE_LICENSE("GPL");

129
drivers/mfd/tps6594-spi.c Normal file
View File

@ -0,0 +1,129 @@
// SPDX-License-Identifier: GPL-2.0
/*
* SPI access driver for TI TPS6594/TPS6593/LP8764 PMICs
*
* Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/
*/
#include <linux/crc8.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/of_device.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include <linux/mfd/tps6594.h>
#define TPS6594_SPI_PAGE_SHIFT 5
#define TPS6594_SPI_READ_BIT BIT(4)
static bool enable_crc;
module_param(enable_crc, bool, 0444);
MODULE_PARM_DESC(enable_crc, "Enable CRC feature for SPI interface");
DECLARE_CRC8_TABLE(tps6594_spi_crc_table);
static int tps6594_spi_reg_read(void *context, unsigned int reg, unsigned int *val)
{
struct spi_device *spi = context;
struct tps6594 *tps = spi_get_drvdata(spi);
u8 buf[4] = { 0 };
size_t count_rx = 1;
int ret;
buf[0] = reg;
buf[1] = TPS6594_REG_TO_PAGE(reg) << TPS6594_SPI_PAGE_SHIFT | TPS6594_SPI_READ_BIT;
if (tps->use_crc)
count_rx++;
ret = spi_write_then_read(spi, buf, 2, buf + 2, count_rx);
if (ret < 0)
return ret;
if (tps->use_crc && buf[3] != crc8(tps6594_spi_crc_table, buf, 3, CRC8_INIT_VALUE))
return -EIO;
*val = buf[2];
return 0;
}
static int tps6594_spi_reg_write(void *context, unsigned int reg, unsigned int val)
{
struct spi_device *spi = context;
struct tps6594 *tps = spi_get_drvdata(spi);
u8 buf[4] = { 0 };
size_t count = 3;
buf[0] = reg;
buf[1] = TPS6594_REG_TO_PAGE(reg) << TPS6594_SPI_PAGE_SHIFT;
buf[2] = val;
if (tps->use_crc)
buf[3] = crc8(tps6594_spi_crc_table, buf, count++, CRC8_INIT_VALUE);
return spi_write(spi, buf, count);
}
static const struct regmap_config tps6594_spi_regmap_config = {
.reg_bits = 16,
.val_bits = 8,
.max_register = TPS6594_REG_DWD_FAIL_CNT_REG,
.volatile_reg = tps6594_is_volatile_reg,
.reg_read = tps6594_spi_reg_read,
.reg_write = tps6594_spi_reg_write,
.use_single_read = true,
.use_single_write = true,
};
static const struct of_device_id tps6594_spi_of_match_table[] = {
{ .compatible = "ti,tps6594-q1", .data = (void *)TPS6594, },
{ .compatible = "ti,tps6593-q1", .data = (void *)TPS6593, },
{ .compatible = "ti,lp8764-q1", .data = (void *)LP8764, },
{}
};
MODULE_DEVICE_TABLE(of, tps6594_spi_of_match_table);
static int tps6594_spi_probe(struct spi_device *spi)
{
struct device *dev = &spi->dev;
struct tps6594 *tps;
const struct of_device_id *match;
tps = devm_kzalloc(dev, sizeof(*tps), GFP_KERNEL);
if (!tps)
return -ENOMEM;
spi_set_drvdata(spi, tps);
tps->dev = dev;
tps->reg = spi->chip_select;
tps->irq = spi->irq;
tps->regmap = devm_regmap_init(dev, NULL, spi, &tps6594_spi_regmap_config);
if (IS_ERR(tps->regmap))
return dev_err_probe(dev, PTR_ERR(tps->regmap), "Failed to init regmap\n");
match = of_match_device(tps6594_spi_of_match_table, dev);
if (!match)
return dev_err_probe(dev, PTR_ERR(match), "Failed to find matching chip ID\n");
tps->chip_id = (unsigned long)match->data;
crc8_populate_msb(tps6594_spi_crc_table, TPS6594_CRC8_POLYNOMIAL);
return tps6594_device_init(tps, enable_crc);
}
static struct spi_driver tps6594_spi_driver = {
.driver = {
.name = "tps6594",
.of_match_table = tps6594_spi_of_match_table,
},
.probe = tps6594_spi_probe,
};
module_spi_driver(tps6594_spi_driver);
MODULE_AUTHOR("Julien Panis <jpanis@baylibre.com>");
MODULE_DESCRIPTION("TPS6594 SPI Interface Driver");
MODULE_LICENSE("GPL");

View File

@ -608,7 +608,7 @@ static const struct regmap_config twl6040_regmap_config = {
.volatile_reg = twl6040_volatile_reg,
.writeable_reg = twl6040_writeable_reg,
.cache_type = REGCACHE_RBTREE,
.cache_type = REGCACHE_MAPLE,
.use_single_read = true,
.use_single_write = true,
};

View File

@ -766,6 +766,14 @@ config BATTERY_RT5033
The fuelgauge calculates and determines the battery state of charge
according to battery open circuit voltage.
config CHARGER_RT5033
tristate "RT5033 battery charger support"
depends on MFD_RT5033
help
This adds support for battery charger in Richtek RT5033 PMIC.
The device supports pre-charge mode, fast charge mode and
constant voltage mode.
config CHARGER_RT9455
tristate "Richtek RT9455 battery charger driver"
depends on I2C

View File

@ -54,6 +54,7 @@ obj-$(CONFIG_BATTERY_MAX17040) += max17040_battery.o
obj-$(CONFIG_BATTERY_MAX17042) += max17042_battery.o
obj-$(CONFIG_BATTERY_MAX1721X) += max1721x_battery.o
obj-$(CONFIG_BATTERY_RT5033) += rt5033_battery.o
obj-$(CONFIG_CHARGER_RT5033) += rt5033_charger.o
obj-$(CONFIG_CHARGER_RT9455) += rt9455_charger.o
obj-$(CONFIG_CHARGER_RT9467) += rt9467-charger.o
obj-$(CONFIG_CHARGER_RT9471) += rt9471.o

View File

@ -6,11 +6,33 @@
* Author: Beomho Seo <beomho.seo@samsung.com>
*/
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/power_supply.h>
#include <linux/regmap.h>
#include <linux/mfd/rt5033-private.h>
#include <linux/mfd/rt5033.h>
struct rt5033_battery {
struct i2c_client *client;
struct regmap *regmap;
struct power_supply *psy;
};
static int rt5033_battery_get_status(struct i2c_client *client)
{
struct rt5033_battery *battery = i2c_get_clientdata(client);
union power_supply_propval val;
int ret;
ret = power_supply_get_property_from_supplier(battery->psy,
POWER_SUPPLY_PROP_STATUS,
&val);
if (ret)
val.intval = POWER_SUPPLY_STATUS_UNKNOWN;
return val.intval;
}
static int rt5033_battery_get_capacity(struct i2c_client *client)
{
@ -84,6 +106,9 @@ static int rt5033_battery_get_property(struct power_supply *psy,
case POWER_SUPPLY_PROP_CAPACITY:
val->intval = rt5033_battery_get_capacity(battery->client);
break;
case POWER_SUPPLY_PROP_STATUS:
val->intval = rt5033_battery_get_status(battery->client);
break;
default:
return -EINVAL;
}
@ -96,6 +121,7 @@ static enum power_supply_property rt5033_battery_props[] = {
POWER_SUPPLY_PROP_VOLTAGE_OCV,
POWER_SUPPLY_PROP_PRESENT,
POWER_SUPPLY_PROP_CAPACITY,
POWER_SUPPLY_PROP_STATUS,
};
static const struct regmap_config rt5033_battery_regmap_config = {
@ -117,7 +143,6 @@ static int rt5033_battery_probe(struct i2c_client *client)
struct i2c_adapter *adapter = client->adapter;
struct power_supply_config psy_cfg = {};
struct rt5033_battery *battery;
u32 ret;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
return -EIO;
@ -135,15 +160,14 @@ static int rt5033_battery_probe(struct i2c_client *client)
}
i2c_set_clientdata(client, battery);
psy_cfg.of_node = client->dev.of_node;
psy_cfg.drv_data = battery;
battery->psy = power_supply_register(&client->dev,
&rt5033_battery_desc, &psy_cfg);
if (IS_ERR(battery->psy)) {
dev_err(&client->dev, "Failed to register power supply\n");
ret = PTR_ERR(battery->psy);
return ret;
}
if (IS_ERR(battery->psy))
return dev_err_probe(&client->dev, PTR_ERR(battery->psy),
"Failed to register power supply\n");
return 0;
}

View File

@ -0,0 +1,472 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Battery charger driver for RT5033
*
* Copyright (C) 2014 Samsung Electronics, Co., Ltd.
* Author: Beomho Seo <beomho.seo@samsung.com>
*/
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/power_supply.h>
#include <linux/regmap.h>
#include <linux/mfd/rt5033-private.h>
struct rt5033_charger_data {
unsigned int pre_uamp;
unsigned int pre_uvolt;
unsigned int const_uvolt;
unsigned int eoc_uamp;
unsigned int fast_uamp;
};
struct rt5033_charger {
struct device *dev;
struct regmap *regmap;
struct power_supply *psy;
struct rt5033_charger_data *chg;
};
static int rt5033_get_charger_state(struct rt5033_charger *charger)
{
struct regmap *regmap = charger->regmap;
unsigned int reg_data;
int state;
if (!regmap)
return POWER_SUPPLY_STATUS_UNKNOWN;
regmap_read(regmap, RT5033_REG_CHG_STAT, &reg_data);
switch (reg_data & RT5033_CHG_STAT_MASK) {
case RT5033_CHG_STAT_DISCHARGING:
state = POWER_SUPPLY_STATUS_DISCHARGING;
break;
case RT5033_CHG_STAT_CHARGING:
state = POWER_SUPPLY_STATUS_CHARGING;
break;
case RT5033_CHG_STAT_FULL:
state = POWER_SUPPLY_STATUS_FULL;
break;
case RT5033_CHG_STAT_NOT_CHARGING:
state = POWER_SUPPLY_STATUS_NOT_CHARGING;
break;
default:
state = POWER_SUPPLY_STATUS_UNKNOWN;
}
return state;
}
static int rt5033_get_charger_type(struct rt5033_charger *charger)
{
struct regmap *regmap = charger->regmap;
unsigned int reg_data;
int state;
regmap_read(regmap, RT5033_REG_CHG_STAT, &reg_data);
switch (reg_data & RT5033_CHG_STAT_TYPE_MASK) {
case RT5033_CHG_STAT_TYPE_FAST:
state = POWER_SUPPLY_CHARGE_TYPE_FAST;
break;
case RT5033_CHG_STAT_TYPE_PRE:
state = POWER_SUPPLY_CHARGE_TYPE_TRICKLE;
break;
default:
state = POWER_SUPPLY_CHARGE_TYPE_NONE;
}
return state;
}
static int rt5033_get_charger_current_limit(struct rt5033_charger *charger)
{
struct regmap *regmap = charger->regmap;
unsigned int state, reg_data, data;
regmap_read(regmap, RT5033_REG_CHG_CTRL5, &reg_data);
state = (reg_data & RT5033_CHGCTRL5_ICHG_MASK)
>> RT5033_CHGCTRL5_ICHG_SHIFT;
data = RT5033_CHARGER_FAST_CURRENT_MIN +
RT5033_CHARGER_FAST_CURRENT_STEP_NUM * state;
return data;
}
static int rt5033_get_charger_const_voltage(struct rt5033_charger *charger)
{
struct regmap *regmap = charger->regmap;
unsigned int state, reg_data, data;
regmap_read(regmap, RT5033_REG_CHG_CTRL2, &reg_data);
state = (reg_data & RT5033_CHGCTRL2_CV_MASK)
>> RT5033_CHGCTRL2_CV_SHIFT;
data = RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MIN +
RT5033_CHARGER_CONST_VOLTAGE_STEP_NUM * state;
return data;
}
static inline int rt5033_init_const_charge(struct rt5033_charger *charger)
{
struct rt5033_charger_data *chg = charger->chg;
int ret;
unsigned int val;
u8 reg_data;
/* Set constant voltage mode */
if (chg->const_uvolt < RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MIN ||
chg->const_uvolt > RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MAX) {
dev_err(charger->dev,
"Value 'constant-charge-voltage-max-microvolt' out of range\n");
return -EINVAL;
}
if (chg->const_uvolt == RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MIN)
reg_data = 0x00;
else if (chg->const_uvolt == RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MAX)
reg_data = RT5033_CV_MAX_VOLTAGE;
else {
val = chg->const_uvolt;
val -= RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MIN;
val /= RT5033_CHARGER_CONST_VOLTAGE_STEP_NUM;
reg_data = val;
}
ret = regmap_update_bits(charger->regmap, RT5033_REG_CHG_CTRL2,
RT5033_CHGCTRL2_CV_MASK,
reg_data << RT5033_CHGCTRL2_CV_SHIFT);
if (ret) {
dev_err(charger->dev, "Failed regmap update\n");
return -EINVAL;
}
/* Set end of charge current */
if (chg->eoc_uamp < RT5033_CHARGER_EOC_MIN ||
chg->eoc_uamp > RT5033_CHARGER_EOC_MAX) {
dev_err(charger->dev,
"Value 'charge-term-current-microamp' out of range\n");
return -EINVAL;
}
if (chg->eoc_uamp == RT5033_CHARGER_EOC_MIN)
reg_data = 0x01;
else if (chg->eoc_uamp == RT5033_CHARGER_EOC_MAX)
reg_data = 0x07;
else {
val = chg->eoc_uamp;
if (val < RT5033_CHARGER_EOC_REF) {
val -= RT5033_CHARGER_EOC_MIN;
val /= RT5033_CHARGER_EOC_STEP_NUM1;
reg_data = 0x01 + val;
} else if (val > RT5033_CHARGER_EOC_REF) {
val -= RT5033_CHARGER_EOC_REF;
val /= RT5033_CHARGER_EOC_STEP_NUM2;
reg_data = 0x04 + val;
} else {
reg_data = 0x04;
}
}
ret = regmap_update_bits(charger->regmap, RT5033_REG_CHG_CTRL4,
RT5033_CHGCTRL4_EOC_MASK, reg_data);
if (ret) {
dev_err(charger->dev, "Failed regmap update\n");
return -EINVAL;
}
return 0;
}
static inline int rt5033_init_fast_charge(struct rt5033_charger *charger)
{
struct rt5033_charger_data *chg = charger->chg;
int ret;
unsigned int val;
u8 reg_data;
/* Set limit input current */
ret = regmap_update_bits(charger->regmap, RT5033_REG_CHG_CTRL1,
RT5033_CHGCTRL1_IAICR_MASK, RT5033_AICR_2000_MODE);
if (ret) {
dev_err(charger->dev, "Failed regmap update\n");
return -EINVAL;
}
/* Set fast-charge mode charging current */
if (chg->fast_uamp < RT5033_CHARGER_FAST_CURRENT_MIN ||
chg->fast_uamp > RT5033_CHARGER_FAST_CURRENT_MAX) {
dev_err(charger->dev,
"Value 'constant-charge-current-max-microamp' out of range\n");
return -EINVAL;
}
if (chg->fast_uamp == RT5033_CHARGER_FAST_CURRENT_MIN)
reg_data = 0x00;
else if (chg->fast_uamp == RT5033_CHARGER_FAST_CURRENT_MAX)
reg_data = RT5033_CHG_MAX_CURRENT;
else {
val = chg->fast_uamp;
val -= RT5033_CHARGER_FAST_CURRENT_MIN;
val /= RT5033_CHARGER_FAST_CURRENT_STEP_NUM;
reg_data = val;
}
ret = regmap_update_bits(charger->regmap, RT5033_REG_CHG_CTRL5,
RT5033_CHGCTRL5_ICHG_MASK,
reg_data << RT5033_CHGCTRL5_ICHG_SHIFT);
if (ret) {
dev_err(charger->dev, "Failed regmap update\n");
return -EINVAL;
}
return 0;
}
static inline int rt5033_init_pre_charge(struct rt5033_charger *charger)
{
struct rt5033_charger_data *chg = charger->chg;
int ret;
unsigned int val;
u8 reg_data;
/* Set pre-charge threshold voltage */
if (chg->pre_uvolt < RT5033_CHARGER_PRE_THRESHOLD_LIMIT_MIN ||
chg->pre_uvolt > RT5033_CHARGER_PRE_THRESHOLD_LIMIT_MAX) {
dev_err(charger->dev,
"Value 'precharge-upper-limit-microvolt' out of range\n");
return -EINVAL;
}
if (chg->pre_uvolt == RT5033_CHARGER_PRE_THRESHOLD_LIMIT_MIN)
reg_data = 0x00;
else if (chg->pre_uvolt == RT5033_CHARGER_PRE_THRESHOLD_LIMIT_MAX)
reg_data = 0x0f;
else {
val = chg->pre_uvolt;
val -= RT5033_CHARGER_PRE_THRESHOLD_LIMIT_MIN;
val /= RT5033_CHARGER_PRE_THRESHOLD_STEP_NUM;
reg_data = val;
}
ret = regmap_update_bits(charger->regmap, RT5033_REG_CHG_CTRL5,
RT5033_CHGCTRL5_VPREC_MASK, reg_data);
if (ret) {
dev_err(charger->dev, "Failed regmap update\n");
return -EINVAL;
}
/* Set pre-charge mode charging current */
if (chg->pre_uamp < RT5033_CHARGER_PRE_CURRENT_LIMIT_MIN ||
chg->pre_uamp > RT5033_CHARGER_PRE_CURRENT_LIMIT_MAX) {
dev_err(charger->dev,
"Value 'precharge-current-microamp' out of range\n");
return -EINVAL;
}
if (chg->pre_uamp == RT5033_CHARGER_PRE_CURRENT_LIMIT_MIN)
reg_data = 0x00;
else if (chg->pre_uamp == RT5033_CHARGER_PRE_CURRENT_LIMIT_MAX)
reg_data = RT5033_CHG_MAX_PRE_CURRENT;
else {
val = chg->pre_uamp;
val -= RT5033_CHARGER_PRE_CURRENT_LIMIT_MIN;
val /= RT5033_CHARGER_PRE_CURRENT_STEP_NUM;
reg_data = val;
}
ret = regmap_update_bits(charger->regmap, RT5033_REG_CHG_CTRL4,
RT5033_CHGCTRL4_IPREC_MASK,
reg_data << RT5033_CHGCTRL4_IPREC_SHIFT);
if (ret) {
dev_err(charger->dev, "Failed regmap update\n");
return -EINVAL;
}
return 0;
}
static int rt5033_charger_reg_init(struct rt5033_charger *charger)
{
int ret = 0;
/* Enable charging termination */
ret = regmap_update_bits(charger->regmap, RT5033_REG_CHG_CTRL1,
RT5033_CHGCTRL1_TE_EN_MASK, RT5033_TE_ENABLE);
if (ret) {
dev_err(charger->dev, "Failed to enable charging termination.\n");
return -EINVAL;
}
/*
* Disable minimum input voltage regulation (MIVR), this improves
* the charging performance.
*/
ret = regmap_update_bits(charger->regmap, RT5033_REG_CHG_CTRL4,
RT5033_CHGCTRL4_MIVR_MASK, RT5033_CHARGER_MIVR_DISABLE);
if (ret) {
dev_err(charger->dev, "Failed to disable MIVR.\n");
return -EINVAL;
}
ret = rt5033_init_pre_charge(charger);
if (ret)
return ret;
ret = rt5033_init_fast_charge(charger);
if (ret)
return ret;
ret = rt5033_init_const_charge(charger);
if (ret)
return ret;
return 0;
}
static enum power_supply_property rt5033_charger_props[] = {
POWER_SUPPLY_PROP_STATUS,
POWER_SUPPLY_PROP_CHARGE_TYPE,
POWER_SUPPLY_PROP_CURRENT_MAX,
POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE,
POWER_SUPPLY_PROP_MODEL_NAME,
POWER_SUPPLY_PROP_MANUFACTURER,
POWER_SUPPLY_PROP_ONLINE,
};
static int rt5033_charger_get_property(struct power_supply *psy,
enum power_supply_property psp,
union power_supply_propval *val)
{
struct rt5033_charger *charger = power_supply_get_drvdata(psy);
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
val->intval = rt5033_get_charger_state(charger);
break;
case POWER_SUPPLY_PROP_CHARGE_TYPE:
val->intval = rt5033_get_charger_type(charger);
break;
case POWER_SUPPLY_PROP_CURRENT_MAX:
val->intval = rt5033_get_charger_current_limit(charger);
break;
case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
val->intval = rt5033_get_charger_const_voltage(charger);
break;
case POWER_SUPPLY_PROP_MODEL_NAME:
val->strval = RT5033_CHARGER_MODEL;
break;
case POWER_SUPPLY_PROP_MANUFACTURER:
val->strval = RT5033_MANUFACTURER;
break;
case POWER_SUPPLY_PROP_ONLINE:
val->intval = (rt5033_get_charger_state(charger) ==
POWER_SUPPLY_STATUS_CHARGING);
break;
default:
return -EINVAL;
}
return 0;
}
static struct rt5033_charger_data *rt5033_charger_dt_init(
struct rt5033_charger *charger)
{
struct rt5033_charger_data *chg;
struct power_supply_battery_info *info;
int ret;
chg = devm_kzalloc(charger->dev, sizeof(*chg), GFP_KERNEL);
if (!chg)
return ERR_PTR(-ENOMEM);
ret = power_supply_get_battery_info(charger->psy, &info);
if (ret)
return ERR_PTR(dev_err_probe(charger->dev, -EINVAL,
"missing battery info\n"));
/* Assign data. Validity will be checked in the init functions. */
chg->pre_uamp = info->precharge_current_ua;
chg->fast_uamp = info->constant_charge_current_max_ua;
chg->eoc_uamp = info->charge_term_current_ua;
chg->pre_uvolt = info->precharge_voltage_max_uv;
chg->const_uvolt = info->constant_charge_voltage_max_uv;
return chg;
}
static const struct power_supply_desc rt5033_charger_desc = {
.name = "rt5033-charger",
.type = POWER_SUPPLY_TYPE_USB,
.properties = rt5033_charger_props,
.num_properties = ARRAY_SIZE(rt5033_charger_props),
.get_property = rt5033_charger_get_property,
};
static int rt5033_charger_probe(struct platform_device *pdev)
{
struct rt5033_charger *charger;
struct power_supply_config psy_cfg = {};
int ret;
charger = devm_kzalloc(&pdev->dev, sizeof(*charger), GFP_KERNEL);
if (!charger)
return -ENOMEM;
platform_set_drvdata(pdev, charger);
charger->dev = &pdev->dev;
charger->regmap = dev_get_regmap(pdev->dev.parent, NULL);
psy_cfg.of_node = pdev->dev.of_node;
psy_cfg.drv_data = charger;
charger->psy = devm_power_supply_register(&pdev->dev,
&rt5033_charger_desc,
&psy_cfg);
if (IS_ERR(charger->psy))
return dev_err_probe(&pdev->dev, PTR_ERR(charger->psy),
"Failed to register power supply\n");
charger->chg = rt5033_charger_dt_init(charger);
if (IS_ERR_OR_NULL(charger->chg))
return PTR_ERR(charger->chg);
ret = rt5033_charger_reg_init(charger);
if (ret)
return ret;
return 0;
}
static const struct platform_device_id rt5033_charger_id[] = {
{ "rt5033-charger", },
{ }
};
MODULE_DEVICE_TABLE(platform, rt5033_charger_id);
static const struct of_device_id rt5033_charger_of_match[] = {
{ .compatible = "richtek,rt5033-charger", },
{ }
};
MODULE_DEVICE_TABLE(of, rt5033_charger_of_match);
static struct platform_driver rt5033_charger_driver = {
.driver = {
.name = "rt5033-charger",
.of_match_table = rt5033_charger_of_match,
},
.probe = rt5033_charger_probe,
.id_table = rt5033_charger_id,
};
module_platform_driver(rt5033_charger_driver);
MODULE_DESCRIPTION("Richtek RT5033 charger driver");
MODULE_AUTHOR("Beomho Seo <beomho.seo@samsung.com>");
MODULE_LICENSE("GPL v2");

View File

@ -17,6 +17,7 @@ enum axp20x_variants {
AXP221_ID,
AXP223_ID,
AXP288_ID,
AXP313A_ID,
AXP803_ID,
AXP806_ID,
AXP809_ID,
@ -92,6 +93,17 @@ enum axp20x_variants {
#define AXP22X_ALDO3_V_OUT 0x2a
#define AXP22X_CHRG_CTRL3 0x35
#define AXP313A_ON_INDICATE 0x00
#define AXP313A_OUTPUT_CONTROL 0x10
#define AXP313A_DCDC1_CONRTOL 0x13
#define AXP313A_DCDC2_CONRTOL 0x14
#define AXP313A_DCDC3_CONRTOL 0x15
#define AXP313A_ALDO1_CONRTOL 0x16
#define AXP313A_DLDO1_CONRTOL 0x17
#define AXP313A_SHUTDOWN_CTRL 0x1a
#define AXP313A_IRQ_EN 0x20
#define AXP313A_IRQ_STATE 0x21
#define AXP806_STARTUP_SRC 0x00
#define AXP806_CHIP_ID 0x03
#define AXP806_PWR_OUT_CTRL1 0x10
@ -363,6 +375,16 @@ enum {
AXP22X_REG_ID_MAX,
};
enum {
AXP313A_DCDC1 = 0,
AXP313A_DCDC2,
AXP313A_DCDC3,
AXP313A_ALDO1,
AXP313A_DLDO1,
AXP313A_RTC_LDO,
AXP313A_REG_ID_MAX,
};
enum {
AXP806_DCDCA = 0,
AXP806_DCDCB,
@ -616,6 +638,16 @@ enum axp288_irqs {
AXP288_IRQ_BC_USB_CHNG,
};
enum axp313a_irqs {
AXP313A_IRQ_DIE_TEMP_HIGH,
AXP313A_IRQ_DCDC2_V_LOW = 2,
AXP313A_IRQ_DCDC3_V_LOW,
AXP313A_IRQ_PEK_LONG,
AXP313A_IRQ_PEK_SHORT,
AXP313A_IRQ_PEK_FAL_EDGE,
AXP313A_IRQ_PEK_RIS_EDGE,
};
enum axp803_irqs {
AXP803_IRQ_ACIN_OVER_V = 1,
AXP803_IRQ_ACIN_PLUGIN,

View File

@ -7,25 +7,25 @@
* Author: Patrick Rudolph <patrick.rudolph@9elements.com>
*/
#ifndef _MFD_MAX597X_H
#define _MFD_MAX597X_H
#ifndef _MFD_MAX5970_H
#define _MFD_MAX5970_H
#include <linux/regmap.h>
#define MAX5970_NUM_SWITCHES 2
#define MAX5978_NUM_SWITCHES 1
#define MAX597X_NUM_LEDS 4
#define MAX5970_NUM_LEDS 4
struct max597x_data {
struct max5970_data {
int num_switches;
u32 irng[MAX5970_NUM_SWITCHES];
u32 mon_rng[MAX5970_NUM_SWITCHES];
u32 shunt_micro_ohms[MAX5970_NUM_SWITCHES];
};
enum max597x_chip_type {
MAX597x_TYPE_MAX5978 = 1,
MAX597x_TYPE_MAX5970,
enum max5970_chip_type {
TYPE_MAX5978 = 1,
TYPE_MAX5970,
};
#define MAX5970_REG_CURRENT_L(ch) (0x01 + (ch) * 4)
@ -93,4 +93,4 @@ enum max597x_chip_type {
#define MAX_REGISTERS 0x49
#define ADC_MASK 0x3FF
#endif /* _MFD_MAX597X_H */
#endif /* _MFD_MAX5970_H */

View File

@ -55,21 +55,28 @@ enum rt5033_reg {
};
/* RT5033 Charger state register */
#define RT5033_CHG_STAT_MASK 0x20
#define RT5033_CHG_STAT_TYPE_MASK 0x60
#define RT5033_CHG_STAT_TYPE_PRE 0x20
#define RT5033_CHG_STAT_TYPE_FAST 0x60
#define RT5033_CHG_STAT_MASK 0x30
#define RT5033_CHG_STAT_DISCHARGING 0x00
#define RT5033_CHG_STAT_FULL 0x10
#define RT5033_CHG_STAT_CHARGING 0x20
#define RT5033_CHG_STAT_NOT_CHARGING 0x30
#define RT5033_CHG_STAT_TYPE_MASK 0x60
#define RT5033_CHG_STAT_TYPE_PRE 0x20
#define RT5033_CHG_STAT_TYPE_FAST 0x60
/* RT5033 CHGCTRL1 register */
#define RT5033_CHGCTRL1_IAICR_MASK 0xe0
#define RT5033_CHGCTRL1_TE_EN_MASK 0x08
#define RT5033_CHGCTRL1_HZ_MASK 0x02
#define RT5033_CHGCTRL1_MODE_MASK 0x01
/* RT5033 CHGCTRL2 register */
#define RT5033_CHGCTRL2_CV_MASK 0xfc
#define RT5033_CHGCTRL2_CV_SHIFT 0x02
/* RT5033 DEVICE_ID register */
#define RT5033_VENDOR_ID_MASK 0xf0
#define RT5033_CHIP_REV_MASK 0x0f
/* RT5033 CHGCTRL3 register */
#define RT5033_CHGCTRL3_CFO_EN_MASK 0x40
@ -77,18 +84,18 @@ enum rt5033_reg {
#define RT5033_CHGCTRL3_TIMER_EN_MASK 0x01
/* RT5033 CHGCTRL4 register */
#define RT5033_CHGCTRL4_EOC_MASK 0x07
#define RT5033_CHGCTRL4_MIVR_MASK 0xe0
#define RT5033_CHGCTRL4_IPREC_MASK 0x18
#define RT5033_CHGCTRL4_IPREC_SHIFT 0x03
#define RT5033_CHGCTRL4_EOC_MASK 0x07
/* RT5033 CHGCTRL5 register */
#define RT5033_CHGCTRL5_VPREC_MASK 0x0f
#define RT5033_CHGCTRL5_ICHG_MASK 0xf0
#define RT5033_CHGCTRL5_ICHG_SHIFT 0x04
#define RT5033_CHG_MAX_CURRENT 0x0d
#define RT5033_CHGCTRL5_VPREC_MASK 0x0f
/* RT5033 RT CTRL1 register */
#define RT5033_RT_CTRL1_UUG_MASK 0x02
#define RT5033_RT_HZ_MASK 0x01
/* RT5033 control register */
#define RT5033_CTRL_FCCM_BUCK_MASK BIT(0)
@ -115,28 +122,37 @@ enum rt5033_reg {
* register), AICR mode limits the input current. For example, the AIRC 100
* mode limits the input current to 100 mA.
*/
#define RT5033_AICR_DISABLE 0x00
#define RT5033_AICR_100_MODE 0x20
#define RT5033_AICR_500_MODE 0x40
#define RT5033_AICR_700_MODE 0x60
#define RT5033_AICR_900_MODE 0x80
#define RT5033_AICR_1000_MODE 0xa0
#define RT5033_AICR_1500_MODE 0xc0
#define RT5033_AICR_2000_MODE 0xe0
#define RT5033_AICR_MODE_MASK 0xe0
/* RT5033 charger minimum input voltage regulation */
#define RT5033_CHARGER_MIVR_DISABLE 0x00
#define RT5033_CHARGER_MIVR_4200MV 0x20
#define RT5033_CHARGER_MIVR_4300MV 0x40
#define RT5033_CHARGER_MIVR_4400MV 0x60
#define RT5033_CHARGER_MIVR_4500MV 0x80
#define RT5033_CHARGER_MIVR_4600MV 0xa0
#define RT5033_CHARGER_MIVR_4700MV 0xc0
#define RT5033_CHARGER_MIVR_4800MV 0xe0
/* RT5033 use internal timer need to set time */
#define RT5033_FAST_CHARGE_TIMER4 0x00
#define RT5033_FAST_CHARGE_TIMER6 0x01
#define RT5033_FAST_CHARGE_TIMER8 0x02
#define RT5033_FAST_CHARGE_TIMER9 0x03
#define RT5033_FAST_CHARGE_TIMER12 0x04
#define RT5033_FAST_CHARGE_TIMER14 0x05
#define RT5033_FAST_CHARGE_TIMER16 0x06
#define RT5033_FAST_CHARGE_TIMER4 0x00 /* 4 hrs */
#define RT5033_FAST_CHARGE_TIMER6 0x08 /* 6 hrs */
#define RT5033_FAST_CHARGE_TIMER8 0x10 /* 8 hrs */
#define RT5033_FAST_CHARGE_TIMER10 0x18 /* 10 hrs */
#define RT5033_FAST_CHARGE_TIMER12 0x20 /* 12 hrs */
#define RT5033_FAST_CHARGE_TIMER14 0x28 /* 14 hrs */
#define RT5033_FAST_CHARGE_TIMER16 0x30 /* 16 hrs */
#define RT5033_INT_TIMER_DISABLE 0x00
#define RT5033_INT_TIMER_ENABLE 0x01
/* RT5033 charger termination enable mask */
#define RT5033_TE_ENABLE_MASK 0x08
/*
* RT5033 charger opa mode. RT5033 has two opa modes for OTG: charger mode
* and boost mode.
@ -145,25 +161,30 @@ enum rt5033_reg {
#define RT5033_BOOST_MODE 0x01
/* RT5033 charger termination enable */
#define RT5033_TE_DISABLE 0x00
#define RT5033_TE_ENABLE 0x08
/* RT5033 charger CFO enable */
#define RT5033_CFO_DISABLE 0x00
#define RT5033_CFO_ENABLE 0x40
/* RT5033 charger constant charge voltage (as in CHGCTRL2 register), uV */
#define RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MIN 3650000U
#define RT5033_CHARGER_CONST_VOLTAGE_STEP_NUM 25000U
#define RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MAX 4400000U
#define RT5033_CV_MAX_VOLTAGE 0x1e
/* RT5033 charger pre-charge current limits (as in CHGCTRL4 register), uA */
#define RT5033_CHARGER_PRE_CURRENT_LIMIT_MIN 350000U
#define RT5033_CHARGER_PRE_CURRENT_STEP_NUM 100000U
#define RT5033_CHARGER_PRE_CURRENT_LIMIT_MAX 650000U
#define RT5033_CHG_MAX_PRE_CURRENT 0x03
/* RT5033 charger fast-charge current (as in CHGCTRL5 register), uA */
#define RT5033_CHARGER_FAST_CURRENT_MIN 700000U
#define RT5033_CHARGER_FAST_CURRENT_STEP_NUM 100000U
#define RT5033_CHARGER_FAST_CURRENT_MAX 2000000U
#define RT5033_CHG_MAX_CURRENT 0x0d
/*
* RT5033 charger const-charge end of charger current (
@ -187,11 +208,12 @@ enum rt5033_reg {
* RT5033 charger UUG. It enables MOS auto control by H/W charger
* circuit.
*/
#define RT5033_CHARGER_UUG_DISABLE 0x00
#define RT5033_CHARGER_UUG_ENABLE 0x02
/* RT5033 charger high impedance mode */
#define RT5033_CHARGER_HZ_DISABLE 0x00
#define RT5033_CHARGER_HZ_ENABLE 0x01
#define RT5033_CHARGER_HZ_ENABLE 0x02
/* RT5033 regulator BUCK output voltage uV */
#define RT5033_REGULATOR_BUCK_VOLTAGE_MIN 1000000U

View File

@ -12,7 +12,6 @@
#include <linux/regulator/consumer.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/power_supply.h>
/* RT5033 regulator IDs */
enum rt5033_regulators {
@ -32,27 +31,4 @@ struct rt5033_dev {
bool wakeup;
};
struct rt5033_battery {
struct i2c_client *client;
struct rt5033_dev *rt5033;
struct regmap *regmap;
struct power_supply *psy;
};
/* RT5033 charger platform data */
struct rt5033_charger_data {
unsigned int pre_uamp;
unsigned int pre_uvolt;
unsigned int const_uvolt;
unsigned int eoc_uamp;
unsigned int fast_uamp;
};
struct rt5033_charger {
struct device *dev;
struct rt5033_dev *rt5033;
struct power_supply psy;
struct rt5033_charger_data *chg;
};
#endif /* __RT5033_H__ */

1020
include/linux/mfd/tps6594.h Normal file

File diff suppressed because it is too large Load Diff