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drm/panel: Add driver for BOE TH101MB31IG002-28A panel
The BOE TH101MB31IG002-28A panel is a WXGA panel. It is used in Pine64 PineTab2 and PineTab-V. Signed-off-by: Alexander Warnecke <awarnecke002@hotmail.com> Signed-off-by: Manuel Traut <manut@mecka.net> Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com> Link: https://lore.kernel.org/r/20240102-pinetab2-v3-2-cb1aa69f8c30@mecka.net Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20240102-pinetab2-v3-2-cb1aa69f8c30@mecka.net
This commit is contained in:
Alexander Warnecke
Neil Armstrong
parent
baae3a0b10
commit
420186db14
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@ -67,6 +67,17 @@ config DRM_PANEL_BOE_HIMAX8279D
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24 bit RGB per pixel. It provides a MIPI DSI interface to
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the host and has a built-in LED backlight.
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config DRM_PANEL_BOE_TH101MB31UIG002_28A
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tristate "Boe TH101MB31UIG002-28A panel"
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depends on OF
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depends on DRM_MIPI_DSI
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depends on BACKLIGHT_CLASS_DEVICE
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help
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Say Y here if you want to enable support for Boe
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TH101MB31UIG002-28A TFT-LCD modules. The panel has a 800x1280
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resolution and uses 24 bit RGB per pixel. It provides a MIPI DSI
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interface to the host and has a built-in LED backlight.
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config DRM_PANEL_BOE_TV101WUM_NL6
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tristate "BOE TV101WUM and AUO KD101N80 45NA 1200x1920 panel"
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depends on OF
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@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596) += panel-asus-z00t-tm5p5-n35596.
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obj-$(CONFIG_DRM_PANEL_AUO_A030JTN01) += panel-auo-a030jtn01.o
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obj-$(CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0) += panel-boe-bf060y8m-aj0.o
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obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o
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obj-$(CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A) += panel-boe-th101mb31ig002-28a.o
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obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o
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obj-$(CONFIG_DRM_PANEL_DSI_CM) += panel-dsi-cm.o
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obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o
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322
drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
Normal file
322
drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
Normal file
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@ -0,0 +1,322 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2023 Alexander Warnecke <awarnecke002@hotmail.com>
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* Copyright (c) 2023 Manuel Traut <manut@mecka.net>
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* Copyright (c) 2023 Dang Huynh <danct12@riseup.net>
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*/
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/regulator/consumer.h>
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#include <drm/drm_connector.h>
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#include <drm/drm_mipi_dsi.h>
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#include <drm/drm_modes.h>
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#include <drm/drm_panel.h>
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struct boe_th101mb31ig002 {
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struct drm_panel panel;
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struct mipi_dsi_device *dsi;
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struct regulator *power;
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struct gpio_desc *enable;
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struct gpio_desc *reset;
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enum drm_panel_orientation orientation;
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};
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static void boe_th101mb31ig002_reset(struct boe_th101mb31ig002 *ctx)
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{
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gpiod_direction_output(ctx->reset, 0);
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usleep_range(10, 100);
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gpiod_direction_output(ctx->reset, 1);
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usleep_range(10, 100);
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gpiod_direction_output(ctx->reset, 0);
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usleep_range(5000, 6000);
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}
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static int boe_th101mb31ig002_enable(struct drm_panel *panel)
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{
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struct boe_th101mb31ig002 *ctx = container_of(panel,
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struct boe_th101mb31ig002,
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panel);
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struct mipi_dsi_device *dsi = ctx->dsi;
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struct device *dev = &dsi->dev;
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int ret;
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mipi_dsi_dcs_write_seq(dsi, 0xE0, 0xAB, 0xBA);
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mipi_dsi_dcs_write_seq(dsi, 0xE1, 0xBA, 0xAB);
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mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x10, 0x01, 0x47, 0xFF);
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mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x0C, 0x14, 0x04, 0x50, 0x50, 0x14);
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mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x56, 0x53, 0x00);
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mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x33, 0x30, 0x04);
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mipi_dsi_dcs_write_seq(dsi, 0xB6, 0xB0, 0x00, 0x00, 0x10, 0x00, 0x10,
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0x00);
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mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x05, 0x12, 0x29, 0x49, 0x48, 0x00,
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0x00);
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mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x7C, 0x65, 0x55, 0x49, 0x46, 0x36,
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0x3B, 0x24, 0x3D, 0x3C, 0x3D, 0x5C, 0x4C,
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0x55, 0x47, 0x46, 0x39, 0x26, 0x06, 0x7C,
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0x65, 0x55, 0x49, 0x46, 0x36, 0x3B, 0x24,
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0x3D, 0x3C, 0x3D, 0x5C, 0x4C, 0x55, 0x47,
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0x46, 0x39, 0x26, 0x06);
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mipi_dsi_dcs_write_seq(dsi, 0x00, 0xFF, 0x87, 0x12, 0x34, 0x44, 0x44,
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0x44, 0x44, 0x98, 0x04, 0x98, 0x04, 0x0F,
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0x00, 0x00, 0xC1);
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mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x54, 0x94, 0x02, 0x85, 0x9F, 0x00,
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0x7F, 0x00, 0x54, 0x00);
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mipi_dsi_dcs_write_seq(dsi, 0xC2, 0x17, 0x09, 0x08, 0x89, 0x08, 0x11,
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0x22, 0x20, 0x44, 0xFF, 0x18, 0x00);
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mipi_dsi_dcs_write_seq(dsi, 0xC3, 0x86, 0x46, 0x05, 0x05, 0x1C, 0x1C,
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0x1D, 0x1D, 0x02, 0x1F, 0x1F, 0x1E, 0x1E,
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0x0F, 0x0F, 0x0D, 0x0D, 0x13, 0x13, 0x11,
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0x11, 0x00);
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mipi_dsi_dcs_write_seq(dsi, 0xC4, 0x07, 0x07, 0x04, 0x04, 0x1C, 0x1C,
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0x1D, 0x1D, 0x02, 0x1F, 0x1F, 0x1E, 0x1E,
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0x0E, 0x0E, 0x0C, 0x0C, 0x12, 0x12, 0x10,
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0x10, 0x00);
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mipi_dsi_dcs_write_seq(dsi, 0xC6, 0x2A, 0x2A);
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mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x21, 0x00, 0x31, 0x42, 0x34, 0x16);
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mipi_dsi_dcs_write_seq(dsi, 0xCA, 0xCB, 0x43);
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mipi_dsi_dcs_write_seq(dsi, 0xCD, 0x0E, 0x4B, 0x4B, 0x20, 0x19, 0x6B,
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0x06, 0xB3);
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mipi_dsi_dcs_write_seq(dsi, 0xD2, 0xE3, 0x2B, 0x38, 0x00);
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mipi_dsi_dcs_write_seq(dsi, 0xD4, 0x00, 0x01, 0x00, 0x0E, 0x04, 0x44,
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0x08, 0x10, 0x00, 0x00, 0x00);
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mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x80, 0x01, 0xFF, 0xFF, 0xFF, 0xFF,
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0xFF, 0xFF);
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mipi_dsi_dcs_write_seq(dsi, 0xF0, 0x12, 0x03, 0x20, 0x00, 0xFF);
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mipi_dsi_dcs_write_seq(dsi, 0xF3, 0x00);
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ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
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if (ret < 0) {
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dev_err(dev, "Failed to exit sleep mode: %d\n", ret);
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return ret;
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}
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msleep(120);
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ret = mipi_dsi_dcs_set_display_on(dsi);
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if (ret < 0) {
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dev_err(dev, "Failed to set panel on: %d\n", ret);
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return ret;
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}
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return 0;
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}
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static int boe_th101mb31ig002_disable(struct drm_panel *panel)
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{
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struct boe_th101mb31ig002 *ctx = container_of(panel,
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struct boe_th101mb31ig002,
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panel);
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struct mipi_dsi_device *dsi = ctx->dsi;
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struct device *dev = &dsi->dev;
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int ret;
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ret = mipi_dsi_dcs_set_display_off(dsi);
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if (ret < 0)
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dev_err(dev, "Failed to set panel off: %d\n", ret);
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msleep(120);
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ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
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if (ret < 0)
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dev_err(dev, "Failed to enter sleep mode: %d\n", ret);
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return 0;
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}
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static int boe_th101mb31ig002_unprepare(struct drm_panel *panel)
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{
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struct boe_th101mb31ig002 *ctx = container_of(panel,
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struct boe_th101mb31ig002,
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panel);
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gpiod_set_value_cansleep(ctx->reset, 1);
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gpiod_set_value_cansleep(ctx->enable, 0);
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regulator_disable(ctx->power);
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return 0;
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}
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static int boe_th101mb31ig002_prepare(struct drm_panel *panel)
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{
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struct boe_th101mb31ig002 *ctx = container_of(panel,
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struct boe_th101mb31ig002,
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panel);
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struct device *dev = &ctx->dsi->dev;
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int ret;
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ret = regulator_enable(ctx->power);
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if (ret) {
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dev_err(dev, "Failed to enable power supply: %d\n", ret);
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return ret;
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}
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gpiod_set_value_cansleep(ctx->enable, 1);
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msleep(50);
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boe_th101mb31ig002_reset(ctx);
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boe_th101mb31ig002_enable(panel);
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return 0;
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}
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static const struct drm_display_mode boe_th101mb31ig002_default_mode = {
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.clock = 73500,
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.hdisplay = 800,
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.hsync_start = 800 + 64,
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.hsync_end = 800 + 64 + 16,
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.htotal = 800 + 64 + 16 + 64,
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.vdisplay = 1280,
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.vsync_start = 1280 + 2,
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.vsync_end = 1280 + 2 + 4,
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.vtotal = 1280 + 2 + 4 + 12,
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.width_mm = 135,
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.height_mm = 216,
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.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
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};
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static int boe_th101mb31ig002_get_modes(struct drm_panel *panel,
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struct drm_connector *connector)
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{
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struct boe_th101mb31ig002 *ctx = container_of(panel,
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struct boe_th101mb31ig002,
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panel);
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struct drm_display_mode *mode;
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mode = drm_mode_duplicate(connector->dev,
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&boe_th101mb31ig002_default_mode);
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if (!mode) {
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dev_err(panel->dev, "Failed to add mode %ux%u@%u\n",
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boe_th101mb31ig002_default_mode.hdisplay,
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boe_th101mb31ig002_default_mode.vdisplay,
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drm_mode_vrefresh(&boe_th101mb31ig002_default_mode));
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return -ENOMEM;
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}
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drm_mode_set_name(mode);
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connector->display_info.bpc = 8;
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connector->display_info.width_mm = mode->width_mm;
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connector->display_info.height_mm = mode->height_mm;
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/*
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* TODO: Remove once all drm drivers call
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* drm_connector_set_orientation_from_panel()
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*/
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drm_connector_set_panel_orientation(connector, ctx->orientation);
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drm_mode_probed_add(connector, mode);
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return 1;
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}
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static enum drm_panel_orientation
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boe_th101mb31ig002_get_orientation(struct drm_panel *panel)
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{
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struct boe_th101mb31ig002 *ctx = container_of(panel,
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struct boe_th101mb31ig002,
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panel);
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return ctx->orientation;
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}
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static const struct drm_panel_funcs boe_th101mb31ig002_funcs = {
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.prepare = boe_th101mb31ig002_prepare,
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.unprepare = boe_th101mb31ig002_unprepare,
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.disable = boe_th101mb31ig002_disable,
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.get_modes = boe_th101mb31ig002_get_modes,
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.get_orientation = boe_th101mb31ig002_get_orientation,
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};
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static int boe_th101mb31ig002_dsi_probe(struct mipi_dsi_device *dsi)
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{
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struct boe_th101mb31ig002 *ctx;
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int ret;
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ctx = devm_kzalloc(&dsi->dev, sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return -ENOMEM;
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mipi_dsi_set_drvdata(dsi, ctx);
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ctx->dsi = dsi;
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dsi->lanes = 4;
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dsi->format = MIPI_DSI_FMT_RGB888;
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dsi->mode_flags = MIPI_DSI_MODE_VIDEO_BURST |
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MIPI_DSI_MODE_NO_EOT_PACKET |
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MIPI_DSI_MODE_LPM;
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ctx->power = devm_regulator_get(&dsi->dev, "power");
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if (IS_ERR(ctx->power))
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return dev_err_probe(&dsi->dev, PTR_ERR(ctx->power),
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"Failed to get power regulator\n");
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ctx->enable = devm_gpiod_get(&dsi->dev, "enable", GPIOD_OUT_LOW);
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if (IS_ERR(ctx->enable))
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return dev_err_probe(&dsi->dev, PTR_ERR(ctx->enable),
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"Failed to get enable GPIO\n");
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ctx->reset = devm_gpiod_get(&dsi->dev, "reset", GPIOD_OUT_HIGH);
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if (IS_ERR(ctx->reset))
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return dev_err_probe(&dsi->dev, PTR_ERR(ctx->reset),
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"Failed to get reset GPIO\n");
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ret = of_drm_get_panel_orientation(dsi->dev.of_node,
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&ctx->orientation);
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if (ret)
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return dev_err_probe(&dsi->dev, ret,
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"Failed to get orientation\n");
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drm_panel_init(&ctx->panel, &dsi->dev, &boe_th101mb31ig002_funcs,
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DRM_MODE_CONNECTOR_DSI);
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ret = drm_panel_of_backlight(&ctx->panel);
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if (ret)
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return ret;
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drm_panel_add(&ctx->panel);
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ret = mipi_dsi_attach(dsi);
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if (ret < 0) {
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dev_err_probe(&dsi->dev, ret,
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"Failed to attach panel to DSI host\n");
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drm_panel_remove(&ctx->panel);
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return ret;
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}
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return 0;
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}
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static void boe_th101mb31ig002_dsi_remove(struct mipi_dsi_device *dsi)
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{
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struct boe_th101mb31ig002 *ctx = mipi_dsi_get_drvdata(dsi);
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mipi_dsi_detach(dsi);
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drm_panel_remove(&ctx->panel);
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}
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static const struct of_device_id boe_th101mb31ig002_of_match[] = {
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{ .compatible = "boe,th101mb31ig002-28a", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, boe_th101mb31ig002_of_match);
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static struct mipi_dsi_driver boe_th101mb31ig002_driver = {
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.driver = {
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.name = "boe-th101mb31ig002-28a",
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.of_match_table = boe_th101mb31ig002_of_match,
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},
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.probe = boe_th101mb31ig002_dsi_probe,
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.remove = boe_th101mb31ig002_dsi_remove,
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};
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module_mipi_dsi_driver(boe_th101mb31ig002_driver);
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MODULE_AUTHOR("Alexander Warnecke <awarnecke002@hotmail.com>");
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MODULE_DESCRIPTION("BOE TH101MB31IG002-28A MIPI-DSI LCD panel");
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MODULE_LICENSE("GPL");
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