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arch_topology: Fix cache attributes detection in the CPU hotplug path
init_cpu_topology() is called only once at the boot and all the cache attributes are detected early for all the possible CPUs. However when the CPUs are hotplugged out, the cacheinfo gets removed. While the attributes are added back when the CPUs are hotplugged back in as part of CPU hotplug state machine, it ends up called quite late after the update_siblings_masks() are called in the secondary_start_kernel() resulting in wrong llc_sibling_masks. Move the call to detect_cache_attributes() inside update_siblings_masks() to ensure the cacheinfo is updated before the LLC sibling masks are updated. This will fix the incorrect LLC sibling masks generated when the CPUs are hotplugged out and hotplugged back in again. Reported-by: Ionela Voinescu <ionela.voinescu@arm.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Ionela Voinescu <ionela.voinescu@arm.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Ionela Voinescu <ionela.voinescu@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20220720-arch_topo_fixes-v3-3-43d696288e84@arm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -732,7 +732,11 @@ const struct cpumask *cpu_clustergroup_mask(int cpu)
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void update_siblings_masks(unsigned int cpuid)
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{
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struct cpu_topology *cpu_topo, *cpuid_topo = &cpu_topology[cpuid];
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int cpu;
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int cpu, ret;
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ret = detect_cache_attributes(cpuid);
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if (ret)
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pr_info("Early cacheinfo failed, ret = %d\n", ret);
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/* update core and thread sibling masks */
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for_each_online_cpu(cpu) {
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@ -821,7 +825,7 @@ __weak int __init parse_acpi_topology(void)
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#if defined(CONFIG_ARM64) || defined(CONFIG_RISCV)
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void __init init_cpu_topology(void)
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{
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int ret, cpu;
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int ret;
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reset_cpu_topology();
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ret = parse_acpi_topology();
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@ -836,13 +840,5 @@ void __init init_cpu_topology(void)
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reset_cpu_topology();
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return;
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}
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for_each_possible_cpu(cpu) {
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ret = detect_cache_attributes(cpu);
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if (ret) {
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pr_info("Early cacheinfo failed, ret = %d\n", ret);
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break;
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}
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}
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}
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#endif
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