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ASoC: fsl-sai: add default register map for regmap cache
FSL_SAI_TDR register is writable and not readable. According to regmap_volatile() function, if FSL_SAI_TDR want to be volatile, it should be readable. So we should remove FSL_SAI_TDR from volatile register list. If the flat cache don't have default register map, when do regcache_sync operation, the non volatile and writable registers will be synchronised to 0. FSL_SAI_TDR reigster will be written a 0 and cause channel swap. So add default register map for flat cache, and such register will not be written. Signed-off-by: Zidan Wang <zidan.wang@freescale.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -608,6 +608,22 @@ static const struct snd_soc_component_driver fsl_component = {
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.name = "fsl-sai",
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};
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static struct reg_default fsl_sai_reg_defaults[] = {
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{FSL_SAI_TCR1, 0},
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{FSL_SAI_TCR2, 0},
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{FSL_SAI_TCR3, 0},
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{FSL_SAI_TCR4, 0},
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{FSL_SAI_TCR5, 0},
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{FSL_SAI_TDR, 0},
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{FSL_SAI_TMR, 0},
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{FSL_SAI_RCR1, 0},
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{FSL_SAI_RCR2, 0},
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{FSL_SAI_RCR3, 0},
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{FSL_SAI_RCR4, 0},
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{FSL_SAI_RCR5, 0},
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{FSL_SAI_RMR, 0},
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};
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static bool fsl_sai_readable_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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@ -641,13 +657,11 @@ static bool fsl_sai_volatile_reg(struct device *dev, unsigned int reg)
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case FSL_SAI_RCSR:
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case FSL_SAI_TFR:
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case FSL_SAI_RFR:
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case FSL_SAI_TDR:
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case FSL_SAI_RDR:
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return true;
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default:
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return false;
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}
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}
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static bool fsl_sai_writeable_reg(struct device *dev, unsigned int reg)
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@ -680,6 +694,8 @@ static const struct regmap_config fsl_sai_regmap_config = {
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.val_bits = 32,
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.max_register = FSL_SAI_RMR,
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.reg_defaults = fsl_sai_reg_defaults,
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.num_reg_defaults = ARRAY_SIZE(fsl_sai_reg_defaults),
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.readable_reg = fsl_sai_readable_reg,
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.volatile_reg = fsl_sai_volatile_reg,
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.writeable_reg = fsl_sai_writeable_reg,
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