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Amlogic DT updates for v4.11, round 2
- add SAR ADC driver - add ADC laddered keys to meson-gxbb-p200 board -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJYlNIUAAoJEFk3GJrT+8Zl6+YP/1U3aOeboRpqQiKucyMEU8bi GWxVAfbeIO6n9s9NMqxhBIc9fpx1sVvt8748va8xIJfQun+qrYFPvGJlK45EXfmq 3sJSf3mu6pMyjB5FZ7m7R69G60Y80TeQ9hDvbAbSvW5c7fM69lBNouXATXK7tyaT v00pRNPZZ8yDmcNnxLxKYJ5bMPS9uloHYihROTTjFF+Q2zwg6hn1Zo7j/O8Yn4sw DNoorRLBwvI/HpkDeIl4I4T3h7oNqSzBs2h4R9k6kDUP+MkguHSBkysF6QfRnCp8 MA3W+j5Rxk0neKNkXJlDry3cApwsmOjm47H68PSa2ODGo1BQhw+RtcZkdMinH7UU Lq0j/12oft1UHW+WcB5+x4d+gaVLAtNbNFIQLa/lgo/uX/6nkyKlnit74h6OoSvR hiYaRWKQwHgR7t2JzMLLVXQoadebkv8rahR0sQBInRus/s+XGC/n78VAUHNJYUKC +lykvMOokxSwJA3RtethsGmf9PEclr9LSLqenZ7GsrvYyv6ZuaLQjChN+EtMyQgt C5vRw0octczi51OBDrmiHPVOKs9ZPM9BC3bQLpKLUyiW+LDQmKZ6rVAV21Ofbm+X rPAyq6q3GXJWDty9QJzYpLZfSyWsqDwwjzzYw8RcLjyOMrnA/DU8oRa0uxzl03ZZ h2UTspCfUSPaRuAZ7vo0 =SARm -----END PGP SIGNATURE----- Merge tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/late Pull "Amlogic DT updates for v4.11, round 2" from Kevin Hilman: - add SAR ADC driver - add ADC laddered keys to meson-gxbb-p200 board * tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM64: dts: meson-gxbb-p200: add ADC laddered keys ARM64: dts: meson: meson-gx: add the SAR ADC ARM64: dts: meson-gxl: add the pwm_ao_b pin ARM64: dts: meson-gx: add the missing pwm_AO_ab node clk: gxbb: fix CLKID_ETH defined twice ARM64: dts: meson-gxl: rename Nexbox A95x for consistency clk: gxbb: add the SAR ADC clocks and expose them dt-bindings: amlogic: Add WeTek boards ARM64: dts: meson-gxbb: Add support for WeTek Hub and Play dt-bindings: vendor-prefix: Add wetek vendor prefix ARM64: dts: meson-gxm: Rename q200 and q201 DT files for consistency ARM64: dts: meson-gx: Add HDMI HPD/DDC pinctrl nodes ARM64: dts: meson-gxbb-vega-s95: Add LED ARM64: dts: meson-gx: add the serial CTS and RTS pin groups ARM64: dts: meson-gx: add the missing uart_AO_B clk: meson-gxbb: Export HDMI clocks ARM64: dts: meson-gxm: add SCPI configuration for GXM ARM64: dts: meson-gx: move the SCPI and SRAM nodes to meson-gx
This commit is contained in:
Arnd Bergmann
commit
3e011039a3
@ -40,6 +40,8 @@ Board compatible values:
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||||
- "hardkernel,odroid-c2" (Meson gxbb)
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- "amlogic,p200" (Meson gxbb)
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- "amlogic,p201" (Meson gxbb)
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- "wetek,hub" (Meson gxbb)
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- "wetek,play2" (Meson gxbb)
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- "amlogic,p212" (Meson gxl s905x)
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- "amlogic,p230" (Meson gxl s905d)
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- "amlogic,p231" (Meson gxl s905d)
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@ -320,6 +320,7 @@ virtio Virtual I/O Device Specification, developed by the OASIS consortium
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vivante Vivante Corporation
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voipac Voipac Technologies s.r.o.
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wd Western Digital Corp.
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wetek WeTek Electronics, limited.
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wexler Wexler
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winbond Winbond Electronics corp.
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wlf Wolfson Microelectronics
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@ -5,12 +5,14 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-p201.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-pro.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-meta.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-telos.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-hub.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-play2.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-p212.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p230.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxl-nexbox-a95x.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-q200.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-q201.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-nexbox-a95x.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxm-nexbox-a1.dtb
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always := $(dtb-y)
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@ -65,6 +65,7 @@
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reg = <0x0 0x0>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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clocks = <&scpi_dvfs 0>;
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};
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cpu1: cpu@1 {
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@ -73,6 +74,7 @@
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reg = <0x0 0x1>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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clocks = <&scpi_dvfs 0>;
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};
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cpu2: cpu@2 {
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@ -81,6 +83,7 @@
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reg = <0x0 0x2>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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clocks = <&scpi_dvfs 0>;
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};
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cpu3: cpu@3 {
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@ -89,6 +92,7 @@
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reg = <0x0 0x3>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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clocks = <&scpi_dvfs 0>;
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};
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l2: l2-cache0 {
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@ -153,6 +157,28 @@
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};
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};
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scpi {
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compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
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mboxes = <&mailbox 1 &mailbox 2>;
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shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
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scpi_clocks: clocks {
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compatible = "arm,scpi-clocks";
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scpi_dvfs: scpi_clocks@0 {
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compatible = "arm,scpi-dvfs-clocks";
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#clock-cells = <1>;
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clock-indices = <0>;
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clock-output-names = "vcpu";
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};
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};
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scpi_sensors: sensors {
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compatible = "arm,scpi-sensors";
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#thermal-sensor-cells = <1>;
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};
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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@ -211,6 +237,14 @@
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status = "disabled";
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};
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saradc: adc@8680 {
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compatible = "amlogic,meson-saradc";
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reg = <0x0 0x8680 0x0 0x34>;
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#io-channel-cells = <1>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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pwm_ef: pwm@86c0 {
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compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
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reg = <0x0 0x086c0 0x0 0x10>;
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@ -264,6 +298,25 @@
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#address-cells = <0>;
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};
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sram: sram@c8000000 {
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compatible = "amlogic,meson-gxbb-sram", "mmio-sram";
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reg = <0x0 0xc8000000 0x0 0x14000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x0 0xc8000000 0x14000>;
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cpu_scp_lpri: scp-shmem@0 {
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compatible = "amlogic,meson-gxbb-scp-shmem";
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reg = <0x13000 0x400>;
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};
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cpu_scp_hpri: scp-shmem@200 {
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compatible = "amlogic,meson-gxbb-scp-shmem";
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reg = <0x13400 0x400>;
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};
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};
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aobus: aobus@c8100000 {
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compatible = "simple-bus";
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reg = <0x0 0xc8100000 0x0 0x100000>;
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@ -279,6 +332,21 @@
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status = "disabled";
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};
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uart_AO_B: serial@4e0 {
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compatible = "amlogic,meson-uart";
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reg = <0x0 0x004e0 0x0 0x14>;
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interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>;
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status = "disabled";
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};
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pwm_AO_ab: pwm@550 {
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compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
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reg = <0x0 0x00550 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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ir: ir@580 {
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compatible = "amlogic,meson-gxbb-ir";
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reg = <0x0 0x00580 0x0 0x40>;
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@ -45,10 +45,55 @@
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/dts-v1/;
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#include "meson-gxbb-p20x.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "amlogic,p200", "amlogic,meson-gxbb";
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model = "Amlogic Meson GXBB P200 Development Board";
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avdd18_usb_adc: regulator-avdd18_usb_adc {
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compatible = "regulator-fixed";
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regulator-name = "AVDD18_USB_ADC";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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adc_keys {
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compatible = "adc-keys";
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io-channels = <&saradc 0>;
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io-channel-names = "buttons";
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keyup-threshold-microvolt = <1800000>;
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button-home {
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label = "Home";
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linux,code = <KEY_HOME>;
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press-threshold-microvolt = <900000>; /* 50% */
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};
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button-esc {
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label = "Esc";
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linux,code = <KEY_ESC>;
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press-threshold-microvolt = <684000>; /* 38% */
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};
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button-up {
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label = "Volume Up";
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linux,code = <KEY_VOLUMEUP>;
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press-threshold-microvolt = <468000>; /* 26% */
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};
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button-down {
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label = "Volume Down";
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linux,code = <KEY_VOLUMEDOWN>;
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press-threshold-microvolt = <252000>; /* 14% */
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};
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button-menu {
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label = "Menu";
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||||
linux,code = <KEY_MENU>;
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press-threshold-microvolt = <0>; /* 0% */
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};
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||||
};
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};
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&i2c_B {
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@ -56,3 +101,8 @@
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pinctrl-0 = <&i2c_b_pins>;
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pinctrl-names = "default";
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};
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&saradc {
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status = "okay";
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vref-supply = <&avdd18_usb_adc>;
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};
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@ -53,6 +53,17 @@
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||||
stdout-path = "serial0:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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||||
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blue {
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label = "vega-s95:blue:on";
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gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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panic-indicator;
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};
|
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};
|
||||
|
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usb_vbus: regulator-usb0-vbus {
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compatible = "regulator-fixed";
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||||
|
||||
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66
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
Normal file
66
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
Normal file
@ -0,0 +1,66 @@
|
||||
/*
|
||||
* Copyright (c) 2016 BayLibre, Inc.
|
||||
* Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of the
|
||||
* License, or (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "meson-gxbb-p20x.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "wetek,hub", "amlogic,meson-gxbb";
|
||||
model = "WeTek Hub";
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
system {
|
||||
label = "wetek-play:system-status";
|
||||
gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
panic-indicator;
|
||||
};
|
||||
};
|
||||
|
||||
cvbs-connector {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
94
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
Normal file
94
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
Normal file
@ -0,0 +1,94 @@
|
||||
/*
|
||||
* Copyright (c) 2016 BayLibre, Inc.
|
||||
* Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of the
|
||||
* License, or (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "meson-gxbb-p20x.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
compatible = "wetek,play2", "amlogic,meson-gxbb";
|
||||
model = "WeTek Play 2";
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
system {
|
||||
label = "wetek-play:system-status";
|
||||
gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
panic-indicator;
|
||||
};
|
||||
|
||||
wifi {
|
||||
label = "wetek-play:wifi-status";
|
||||
gpios = <&gpio GPIODV_26 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
ethernet {
|
||||
label = "wetek-play:ethernet-status";
|
||||
gpios = <&gpio GPIODV_27 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys-polled {
|
||||
compatible = "gpio-keys-polled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
poll-interval = <100>;
|
||||
|
||||
button@0 {
|
||||
label = "reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c_A {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&i2c_a_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
@ -50,28 +50,6 @@
|
||||
/ {
|
||||
compatible = "amlogic,meson-gxbb";
|
||||
|
||||
scpi {
|
||||
compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
|
||||
mboxes = <&mailbox 1 &mailbox 2>;
|
||||
shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
|
||||
|
||||
clocks {
|
||||
compatible = "arm,scpi-clocks";
|
||||
|
||||
scpi_dvfs: scpi_clocks@0 {
|
||||
compatible = "arm,scpi-dvfs-clocks";
|
||||
#clock-cells = <1>;
|
||||
clock-indices = <0>;
|
||||
clock-output-names = "vcpu";
|
||||
};
|
||||
};
|
||||
|
||||
scpi_sensors: sensors {
|
||||
compatible = "arm,scpi-sensors";
|
||||
#thermal-sensor-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
usb0_phy: phy@c0000000 {
|
||||
compatible = "amlogic,meson-gxbb-usb2-phy";
|
||||
@ -93,25 +71,6 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sram: sram@c8000000 {
|
||||
compatible = "amlogic,meson-gxbb-sram", "mmio-sram";
|
||||
reg = <0x0 0xc8000000 0x0 0x14000>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x0 0xc8000000 0x14000>;
|
||||
|
||||
cpu_scp_lpri: scp-shmem@0 {
|
||||
compatible = "amlogic,meson-gxbb-scp-shmem";
|
||||
reg = <0x13000 0x400>;
|
||||
};
|
||||
|
||||
cpu_scp_hpri: scp-shmem@200 {
|
||||
compatible = "amlogic,meson-gxbb-scp-shmem";
|
||||
reg = <0x13400 0x400>;
|
||||
};
|
||||
};
|
||||
|
||||
usb0: usb@c9000000 {
|
||||
compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
|
||||
reg = <0x0 0xc9000000 0x0 0x40000>;
|
||||
@ -138,22 +97,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
clocks = <&scpi_dvfs 0>;
|
||||
};
|
||||
|
||||
&cpu1 {
|
||||
clocks = <&scpi_dvfs 0>;
|
||||
};
|
||||
|
||||
&cpu2 {
|
||||
clocks = <&scpi_dvfs 0>;
|
||||
};
|
||||
|
||||
&cpu3 {
|
||||
clocks = <&scpi_dvfs 0>;
|
||||
};
|
||||
|
||||
&cbus {
|
||||
spifc: spi@8c80 {
|
||||
compatible = "amlogic,meson-gxbb-spifc";
|
||||
@ -195,6 +138,29 @@
|
||||
};
|
||||
};
|
||||
|
||||
uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
|
||||
mux {
|
||||
groups = "uart_cts_ao_a",
|
||||
"uart_rts_ao_a";
|
||||
function = "uart_ao";
|
||||
};
|
||||
};
|
||||
|
||||
uart_ao_b_pins: uart_ao_b {
|
||||
mux {
|
||||
groups = "uart_tx_ao_b", "uart_rx_ao_b";
|
||||
function = "uart_ao_b";
|
||||
};
|
||||
};
|
||||
|
||||
uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
|
||||
mux {
|
||||
groups = "uart_cts_ao_b",
|
||||
"uart_rts_ao_b";
|
||||
function = "uart_ao_b";
|
||||
};
|
||||
};
|
||||
|
||||
remote_input_ao_pins: remote_input_ao {
|
||||
mux {
|
||||
groups = "remote_input_ao";
|
||||
@ -340,6 +306,14 @@
|
||||
};
|
||||
};
|
||||
|
||||
uart_a_cts_rts_pins: uart_a_cts_rts {
|
||||
mux {
|
||||
groups = "uart_cts_a",
|
||||
"uart_rts_a";
|
||||
function = "uart_a";
|
||||
};
|
||||
};
|
||||
|
||||
uart_b_pins: uart_b {
|
||||
mux {
|
||||
groups = "uart_tx_b",
|
||||
@ -348,6 +322,14 @@
|
||||
};
|
||||
};
|
||||
|
||||
uart_b_cts_rts_pins: uart_b_cts_rts {
|
||||
mux {
|
||||
groups = "uart_cts_b",
|
||||
"uart_rts_b";
|
||||
function = "uart_b";
|
||||
};
|
||||
};
|
||||
|
||||
uart_c_pins: uart_c {
|
||||
mux {
|
||||
groups = "uart_tx_c",
|
||||
@ -356,6 +338,14 @@
|
||||
};
|
||||
};
|
||||
|
||||
uart_c_cts_rts_pins: uart_c_cts_rts {
|
||||
mux {
|
||||
groups = "uart_cts_c",
|
||||
"uart_rts_c";
|
||||
function = "uart_c";
|
||||
};
|
||||
};
|
||||
|
||||
i2c_a_pins: i2c_a {
|
||||
mux {
|
||||
groups = "i2c_sck_a",
|
||||
@ -463,6 +453,20 @@
|
||||
function = "pwm_f_y";
|
||||
};
|
||||
};
|
||||
|
||||
hdmi_hpd_pins: hdmi_hpd {
|
||||
mux {
|
||||
groups = "hdmi_hpd";
|
||||
function = "hdmi_hpd";
|
||||
};
|
||||
};
|
||||
|
||||
hdmi_i2c_pins: hdmi_i2c {
|
||||
mux {
|
||||
groups = "hdmi_sda", "hdmi_scl";
|
||||
function = "hdmi_i2c";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -486,6 +490,16 @@
|
||||
clocks = <&clkc CLKID_I2C>;
|
||||
};
|
||||
|
||||
&saradc {
|
||||
compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc";
|
||||
clocks = <&xtal>,
|
||||
<&clkc CLKID_SAR_ADC>,
|
||||
<&clkc CLKID_SANA>,
|
||||
<&clkc CLKID_SAR_ADC_CLK>,
|
||||
<&clkc CLKID_SAR_ADC_SEL>;
|
||||
clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel";
|
||||
};
|
||||
|
||||
&sd_emmc_a {
|
||||
clocks = <&clkc CLKID_SD_EMMC_A>,
|
||||
<&xtal>,
|
||||
|
||||
@ -88,12 +88,42 @@
|
||||
};
|
||||
};
|
||||
|
||||
uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
|
||||
mux {
|
||||
groups = "uart_cts_ao_a",
|
||||
"uart_rts_ao_a";
|
||||
function = "uart_ao";
|
||||
};
|
||||
};
|
||||
|
||||
uart_ao_b_pins: uart_ao_b {
|
||||
mux {
|
||||
groups = "uart_tx_ao_b", "uart_rx_ao_b";
|
||||
function = "uart_ao_b";
|
||||
};
|
||||
};
|
||||
|
||||
uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
|
||||
mux {
|
||||
groups = "uart_cts_ao_b",
|
||||
"uart_rts_ao_b";
|
||||
function = "uart_ao_b";
|
||||
};
|
||||
};
|
||||
|
||||
remote_input_ao_pins: remote_input_ao {
|
||||
mux {
|
||||
groups = "remote_input_ao";
|
||||
function = "remote_input_ao";
|
||||
};
|
||||
};
|
||||
|
||||
pwm_ao_b_pins: pwm_ao_b {
|
||||
mux {
|
||||
groups = "pwm_ao_b";
|
||||
function = "pwm_ao_b";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -163,6 +193,14 @@
|
||||
};
|
||||
};
|
||||
|
||||
uart_a_cts_rts_pins: uart_a_cts_rts {
|
||||
mux {
|
||||
groups = "uart_cts_a",
|
||||
"uart_rts_a";
|
||||
function = "uart_a";
|
||||
};
|
||||
};
|
||||
|
||||
uart_b_pins: uart_b {
|
||||
mux {
|
||||
groups = "uart_tx_b",
|
||||
@ -171,6 +209,14 @@
|
||||
};
|
||||
};
|
||||
|
||||
uart_b_cts_rts_pins: uart_b_cts_rts {
|
||||
mux {
|
||||
groups = "uart_cts_b",
|
||||
"uart_rts_b";
|
||||
function = "uart_b";
|
||||
};
|
||||
};
|
||||
|
||||
uart_c_pins: uart_c {
|
||||
mux {
|
||||
groups = "uart_tx_c",
|
||||
@ -179,6 +225,14 @@
|
||||
};
|
||||
};
|
||||
|
||||
uart_c_cts_rts_pins: uart_c_cts_rts {
|
||||
mux {
|
||||
groups = "uart_cts_c",
|
||||
"uart_rts_c";
|
||||
function = "uart_c";
|
||||
};
|
||||
};
|
||||
|
||||
i2c_a_pins: i2c_a {
|
||||
mux {
|
||||
groups = "i2c_sck_a",
|
||||
@ -229,6 +283,20 @@
|
||||
function = "pwm_e";
|
||||
};
|
||||
};
|
||||
|
||||
hdmi_hpd_pins: hdmi_hpd {
|
||||
mux {
|
||||
groups = "hdmi_hpd";
|
||||
function = "hdmi_hpd";
|
||||
};
|
||||
};
|
||||
|
||||
hdmi_i2c_pins: hdmi_i2c {
|
||||
mux {
|
||||
groups = "hdmi_sda", "hdmi_scl";
|
||||
function = "hdmi_i2c";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
eth-phy-mux {
|
||||
@ -279,6 +347,16 @@
|
||||
clocks = <&clkc CLKID_I2C>;
|
||||
};
|
||||
|
||||
&saradc {
|
||||
compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
|
||||
clocks = <&xtal>,
|
||||
<&clkc CLKID_SAR_ADC>,
|
||||
<&clkc CLKID_SANA>,
|
||||
<&clkc CLKID_SAR_ADC_CLK>,
|
||||
<&clkc CLKID_SAR_ADC_SEL>;
|
||||
clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel";
|
||||
};
|
||||
|
||||
&sd_emmc_a {
|
||||
clocks = <&clkc CLKID_SD_EMMC_A>,
|
||||
<&xtal>,
|
||||
|
||||
@ -85,6 +85,7 @@
|
||||
reg = <0x0 0x100>;
|
||||
enable-method = "psci";
|
||||
next-level-cache = <&l2>;
|
||||
clocks = <&scpi_dvfs 1>;
|
||||
};
|
||||
|
||||
cpu5: cpu@101 {
|
||||
@ -93,6 +94,7 @@
|
||||
reg = <0x0 0x101>;
|
||||
enable-method = "psci";
|
||||
next-level-cache = <&l2>;
|
||||
clocks = <&scpi_dvfs 1>;
|
||||
};
|
||||
|
||||
cpu6: cpu@102 {
|
||||
@ -101,6 +103,7 @@
|
||||
reg = <0x0 0x102>;
|
||||
enable-method = "psci";
|
||||
next-level-cache = <&l2>;
|
||||
clocks = <&scpi_dvfs 1>;
|
||||
};
|
||||
|
||||
cpu7: cpu@103 {
|
||||
@ -109,10 +112,21 @@
|
||||
reg = <0x0 0x103>;
|
||||
enable-method = "psci";
|
||||
next-level-cache = <&l2>;
|
||||
clocks = <&scpi_dvfs 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&saradc {
|
||||
compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc";
|
||||
};
|
||||
|
||||
&scpi_dvfs {
|
||||
clock-indices = <0 1>;
|
||||
clock-output-names = "vbig", "vlittle";
|
||||
};
|
||||
|
||||
&vpu {
|
||||
compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu";
|
||||
};
|
||||
|
||||
|
||||
@ -564,6 +564,46 @@ static struct clk_gate gxbb_clk81 = {
|
||||
},
|
||||
};
|
||||
|
||||
static struct clk_mux gxbb_sar_adc_clk_sel = {
|
||||
.reg = (void *)HHI_SAR_CLK_CNTL,
|
||||
.mask = 0x3,
|
||||
.shift = 9,
|
||||
.lock = &clk_lock,
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "sar_adc_clk_sel",
|
||||
.ops = &clk_mux_ops,
|
||||
/* NOTE: The datasheet doesn't list the parents for bit 10 */
|
||||
.parent_names = (const char *[]){ "xtal", "clk81", },
|
||||
.num_parents = 2,
|
||||
},
|
||||
};
|
||||
|
||||
static struct clk_divider gxbb_sar_adc_clk_div = {
|
||||
.reg = (void *)HHI_SAR_CLK_CNTL,
|
||||
.shift = 0,
|
||||
.width = 8,
|
||||
.lock = &clk_lock,
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "sar_adc_clk_div",
|
||||
.ops = &clk_divider_ops,
|
||||
.parent_names = (const char *[]){ "sar_adc_clk_sel" },
|
||||
.num_parents = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct clk_gate gxbb_sar_adc_clk = {
|
||||
.reg = (void *)HHI_SAR_CLK_CNTL,
|
||||
.bit_idx = 8,
|
||||
.lock = &clk_lock,
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "sar_adc_clk",
|
||||
.ops = &clk_gate_ops,
|
||||
.parent_names = (const char *[]){ "sar_adc_clk_div" },
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
/* Everything Else (EE) domain gates */
|
||||
static MESON_GATE(gxbb_ddr, HHI_GCLK_MPEG0, 0);
|
||||
static MESON_GATE(gxbb_dos, HHI_GCLK_MPEG0, 1);
|
||||
@ -754,6 +794,9 @@ static struct clk_hw_onecell_data gxbb_hw_onecell_data = {
|
||||
[CLKID_SD_EMMC_A] = &gxbb_emmc_a.hw,
|
||||
[CLKID_SD_EMMC_B] = &gxbb_emmc_b.hw,
|
||||
[CLKID_SD_EMMC_C] = &gxbb_emmc_c.hw,
|
||||
[CLKID_SAR_ADC_CLK] = &gxbb_sar_adc_clk.hw,
|
||||
[CLKID_SAR_ADC_SEL] = &gxbb_sar_adc_clk_sel.hw,
|
||||
[CLKID_SAR_ADC_DIV] = &gxbb_sar_adc_clk_div.hw,
|
||||
},
|
||||
.num = NR_CLKS,
|
||||
};
|
||||
@ -856,6 +899,7 @@ static struct clk_gate *gxbb_clk_gates[] = {
|
||||
&gxbb_emmc_a,
|
||||
&gxbb_emmc_b,
|
||||
&gxbb_emmc_c,
|
||||
&gxbb_sar_adc_clk,
|
||||
};
|
||||
|
||||
static int gxbb_clkc_probe(struct platform_device *pdev)
|
||||
@ -888,6 +932,10 @@ static int gxbb_clkc_probe(struct platform_device *pdev)
|
||||
gxbb_mpeg_clk_sel.reg = clk_base + (u64)gxbb_mpeg_clk_sel.reg;
|
||||
gxbb_mpeg_clk_div.reg = clk_base + (u64)gxbb_mpeg_clk_div.reg;
|
||||
|
||||
/* Populate the base address for the SAR ADC clks */
|
||||
gxbb_sar_adc_clk_sel.reg = clk_base + (u64)gxbb_sar_adc_clk_sel.reg;
|
||||
gxbb_sar_adc_clk_div.reg = clk_base + (u64)gxbb_sar_adc_clk_div.reg;
|
||||
|
||||
/* Populate base address for gates */
|
||||
for (i = 0; i < ARRAY_SIZE(gxbb_clk_gates); i++)
|
||||
gxbb_clk_gates[i]->reg = clk_base +
|
||||
|
||||
@ -191,7 +191,7 @@
|
||||
#define CLKID_PERIPHS 20
|
||||
#define CLKID_SPICC 21
|
||||
/* CLKID_I2C */
|
||||
#define CLKID_SAR_ADC 23
|
||||
/* #define CLKID_SAR_ADC */
|
||||
#define CLKID_SMART_CARD 24
|
||||
#define CLKID_RNG0 25
|
||||
#define CLKID_UART0 26
|
||||
@ -204,7 +204,7 @@
|
||||
#define CLKID_ASSIST_MISC 33
|
||||
/* CLKID_SPI */
|
||||
#define CLKID_I2S_SPDIF 35
|
||||
#define CLKID_ETH 36
|
||||
/* CLKID_ETH */
|
||||
#define CLKID_DEMUX 37
|
||||
#define CLKID_AIU_GLUE 38
|
||||
#define CLKID_IEC958 39
|
||||
@ -231,13 +231,13 @@
|
||||
#define CLKID_AHB_DATA_BUS 60
|
||||
#define CLKID_AHB_CTRL_BUS 61
|
||||
#define CLKID_HDMI_INTR_SYNC 62
|
||||
#define CLKID_HDMI_PCLK 63
|
||||
/* CLKID_HDMI_PCLK */
|
||||
/* CLKID_USB1_DDR_BRIDGE */
|
||||
/* CLKID_USB0_DDR_BRIDGE */
|
||||
#define CLKID_MMC_PCLK 66
|
||||
#define CLKID_DVIN 67
|
||||
#define CLKID_UART2 68
|
||||
#define CLKID_SANA 69
|
||||
/* #define CLKID_SANA */
|
||||
#define CLKID_VPU_INTR 70
|
||||
#define CLKID_SEC_AHB_AHB3_BRIDGE 71
|
||||
#define CLKID_CLK81_A53 72
|
||||
@ -245,7 +245,7 @@
|
||||
#define CLKID_VCLK2_VENCI1 74
|
||||
#define CLKID_VCLK2_VENCP0 75
|
||||
#define CLKID_VCLK2_VENCP1 76
|
||||
#define CLKID_GCLK_VENCI_INT0 77
|
||||
/* CLKID_GCLK_VENCI_INT0 */
|
||||
#define CLKID_GCLK_VENCI_INT 78
|
||||
#define CLKID_DAC_CLK 79
|
||||
#define CLKID_AOCLK_GATE 80
|
||||
@ -265,8 +265,11 @@
|
||||
/* CLKID_SD_EMMC_A */
|
||||
/* CLKID_SD_EMMC_B */
|
||||
/* CLKID_SD_EMMC_C */
|
||||
/* CLKID_SAR_ADC_CLK */
|
||||
/* CLKID_SAR_ADC_SEL */
|
||||
#define CLKID_SAR_ADC_DIV 99
|
||||
|
||||
#define NR_CLKS 97
|
||||
#define NR_CLKS 100
|
||||
|
||||
/* include the CLKIDs that have been made part of the stable DT binding */
|
||||
#include <dt-bindings/clock/gxbb-clkc.h>
|
||||
|
||||
@ -14,15 +14,21 @@
|
||||
#define CLKID_MPLL2 15
|
||||
#define CLKID_SPI 34
|
||||
#define CLKID_I2C 22
|
||||
#define CLKID_SAR_ADC 23
|
||||
#define CLKID_ETH 36
|
||||
#define CLKID_USB0 50
|
||||
#define CLKID_USB1 51
|
||||
#define CLKID_USB 55
|
||||
#define CLKID_HDMI_PCLK 63
|
||||
#define CLKID_USB1_DDR_BRIDGE 64
|
||||
#define CLKID_USB0_DDR_BRIDGE 65
|
||||
#define CLKID_SANA 69
|
||||
#define CLKID_GCLK_VENCI_INT0 77
|
||||
#define CLKID_AO_I2C 93
|
||||
#define CLKID_SD_EMMC_A 94
|
||||
#define CLKID_SD_EMMC_B 95
|
||||
#define CLKID_SD_EMMC_C 96
|
||||
#define CLKID_SAR_ADC_CLK 97
|
||||
#define CLKID_SAR_ADC_SEL 98
|
||||
|
||||
#endif /* __GXBB_CLKC_H */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user