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x86/cmpxchg: add a locked add() helper
Mostly to remove some conditional code in spinlock.h. Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
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@ -14,6 +14,8 @@ extern void __cmpxchg_wrong_size(void)
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__compiletime_error("Bad argument size for cmpxchg");
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extern void __xadd_wrong_size(void)
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__compiletime_error("Bad argument size for xadd");
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extern void __add_wrong_size(void)
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__compiletime_error("Bad argument size for add");
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/*
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* Constants for operation sizes. On 32-bit, the 64-bit size it set to
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@ -207,4 +209,44 @@ extern void __xadd_wrong_size(void)
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#define xadd_sync(ptr, inc) __xadd((ptr), (inc), "lock; ")
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#define xadd_local(ptr, inc) __xadd((ptr), (inc), "")
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#define __add(ptr, inc, lock) \
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({ \
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__typeof__ (*(ptr)) __ret = (inc); \
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switch (sizeof(*(ptr))) { \
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case __X86_CASE_B: \
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asm volatile (lock "addb %b1, %0\n" \
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: "+m" (*(ptr)) : "ri" (inc) \
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: "memory", "cc"); \
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break; \
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case __X86_CASE_W: \
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asm volatile (lock "addw %w1, %0\n" \
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: "+m" (*(ptr)) : "ri" (inc) \
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: "memory", "cc"); \
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break; \
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case __X86_CASE_L: \
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asm volatile (lock "addl %1, %0\n" \
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: "+m" (*(ptr)) : "ri" (inc) \
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: "memory", "cc"); \
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break; \
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case __X86_CASE_Q: \
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asm volatile (lock "addq %1, %0\n" \
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: "+m" (*(ptr)) : "ri" (inc) \
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: "memory", "cc"); \
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break; \
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default: \
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__add_wrong_size(); \
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} \
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__ret; \
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})
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/*
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* add_*() adds "inc" to "*ptr"
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*
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* __add() takes a lock prefix
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* add_smp() is locked when multiple CPUs are online
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* add_sync() is always locked
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*/
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#define add_smp(ptr, inc) __add((ptr), (inc), LOCK_PREFIX)
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#define add_sync(ptr, inc) __add((ptr), (inc), "lock; ")
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#endif /* ASM_X86_CMPXCHG_H */
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@ -79,23 +79,10 @@ static __always_inline int __ticket_spin_trylock(arch_spinlock_t *lock)
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return cmpxchg(&lock->head_tail, old.head_tail, new.head_tail) == old.head_tail;
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}
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#if (NR_CPUS < 256)
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static __always_inline void __ticket_spin_unlock(arch_spinlock_t *lock)
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{
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asm volatile(UNLOCK_LOCK_PREFIX "incb %0"
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: "+m" (lock->head_tail)
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:
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: "memory", "cc");
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__add(&lock->tickets.head, 1, UNLOCK_LOCK_PREFIX);
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}
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#else
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static __always_inline void __ticket_spin_unlock(arch_spinlock_t *lock)
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{
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asm volatile(UNLOCK_LOCK_PREFIX "incw %0"
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: "+m" (lock->head_tail)
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:
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: "memory", "cc");
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}
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#endif
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static inline int __ticket_spin_is_locked(arch_spinlock_t *lock)
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{
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