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pwm: atmel-hlcdc: add at91sam9x5 and sama5d3 errata handling
at91sam9x5 has an errata forbidding the use of slow clk as a clk source and sama5d3 SoCs has another errata forbidding the use of div1 prescaler. Take both of these erratas into account. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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@ -32,10 +32,16 @@
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#define ATMEL_HLCDC_PWMPS_MAX 0x6
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#define ATMEL_HLCDC_PWMPS(x) ((x) & ATMEL_HLCDC_PWMPS_MASK)
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struct atmel_hlcdc_pwm_errata {
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bool slow_clk_erratum;
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bool div1_clk_erratum;
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};
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struct atmel_hlcdc_pwm {
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struct pwm_chip chip;
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struct atmel_hlcdc *hlcdc;
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struct clk *cur_clk;
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const struct atmel_hlcdc_pwm_errata *errata;
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};
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static inline struct atmel_hlcdc_pwm *to_atmel_hlcdc_pwm(struct pwm_chip *chip)
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@ -56,20 +62,29 @@ static int atmel_hlcdc_pwm_config(struct pwm_chip *c,
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u32 pwmcfg;
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int pres;
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clk_freq = clk_get_rate(new_clk);
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clk_period_ns = (u64)NSEC_PER_SEC * 256;
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do_div(clk_period_ns, clk_freq);
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if (!chip->errata || !chip->errata->slow_clk_erratum) {
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clk_freq = clk_get_rate(new_clk);
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clk_period_ns = (u64)NSEC_PER_SEC * 256;
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do_div(clk_period_ns, clk_freq);
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}
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if (clk_period_ns > period_ns) {
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/* Errata: cannot use slow clk on some IP revisions */
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if ((chip->errata && chip->errata->slow_clk_erratum) ||
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clk_period_ns > period_ns) {
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new_clk = hlcdc->sys_clk;
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clk_freq = clk_get_rate(new_clk);
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clk_period_ns = (u64)NSEC_PER_SEC * 256;
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do_div(clk_period_ns, clk_freq);
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}
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for (pres = 0; pres <= ATMEL_HLCDC_PWMPS_MAX; pres++)
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for (pres = 0; pres <= ATMEL_HLCDC_PWMPS_MAX; pres++) {
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/* Errata: cannot divide by 1 on some IP revisions */
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if (!pres && chip->errata && chip->errata->div1_clk_erratum)
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continue;
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if ((clk_period_ns << pres) >= period_ns)
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break;
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}
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if (pres > ATMEL_HLCDC_PWMPS_MAX)
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return -EINVAL;
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@ -187,8 +202,29 @@ static const struct pwm_ops atmel_hlcdc_pwm_ops = {
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.owner = THIS_MODULE,
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};
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static const struct atmel_hlcdc_pwm_errata atmel_hlcdc_pwm_at91sam9x5_errata = {
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.slow_clk_erratum = true,
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};
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static const struct atmel_hlcdc_pwm_errata atmel_hlcdc_pwm_sama5d3_errata = {
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.div1_clk_erratum = true,
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};
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static const struct of_device_id atmel_hlcdc_dt_ids[] = {
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{
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.compatible = "atmel,at91sam9x5-hlcdc",
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.data = &atmel_hlcdc_pwm_at91sam9x5_errata,
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},
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{
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.compatible = "atmel,sama5d3-hlcdc",
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.data = &atmel_hlcdc_pwm_sama5d3_errata,
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},
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{ /* sentinel */ },
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};
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static int atmel_hlcdc_pwm_probe(struct platform_device *pdev)
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{
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const struct of_device_id *match;
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struct device *dev = &pdev->dev;
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struct atmel_hlcdc_pwm *chip;
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struct atmel_hlcdc *hlcdc;
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@ -204,6 +240,10 @@ static int atmel_hlcdc_pwm_probe(struct platform_device *pdev)
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if (ret)
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return ret;
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match = of_match_node(atmel_hlcdc_dt_ids, dev->parent->of_node);
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if (match)
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chip->errata = match->data;
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chip->hlcdc = hlcdc;
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chip->chip.ops = &atmel_hlcdc_pwm_ops;
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chip->chip.dev = dev;
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