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https://github.com/torvalds/linux.git
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Merge branch 'mlx4-fixes'
Tariq Toukan says:
====================
mlx4 fixes
This patchset contains several bug fixes from the team to the
mlx4 Eth driver.
Series generated against net commit:
c2f57fb97d
"drivers: net: phy: mdio-xgene: Add hardware dependency"
v2:
* excluded some cleanup patches.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
373df3131a
@ -94,7 +94,7 @@ static u8 mlx4_en_dcbnl_getcap(struct net_device *dev, int capid, u8 *cap)
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*cap = true;
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break;
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case DCB_CAP_ATTR_DCBX:
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*cap = priv->cee_params.dcbx_cap;
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*cap = priv->dcbx_cap;
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break;
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case DCB_CAP_ATTR_PFC_TCS:
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*cap = 1 << mlx4_max_tc(priv->mdev->dev);
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@ -111,14 +111,14 @@ static u8 mlx4_en_dcbnl_getpfcstate(struct net_device *netdev)
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{
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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return priv->cee_params.dcb_cfg.pfc_state;
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return priv->cee_config.pfc_state;
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}
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static void mlx4_en_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
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{
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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priv->cee_params.dcb_cfg.pfc_state = state;
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priv->cee_config.pfc_state = state;
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}
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static void mlx4_en_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
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@ -126,7 +126,7 @@ static void mlx4_en_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
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{
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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*setting = priv->cee_params.dcb_cfg.tc_config[priority].dcb_pfc;
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*setting = priv->cee_config.dcb_pfc[priority];
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}
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static void mlx4_en_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
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@ -134,8 +134,8 @@ static void mlx4_en_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
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{
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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priv->cee_params.dcb_cfg.tc_config[priority].dcb_pfc = setting;
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priv->cee_params.dcb_cfg.pfc_state = true;
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priv->cee_config.dcb_pfc[priority] = setting;
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priv->cee_config.pfc_state = true;
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}
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static int mlx4_en_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
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@ -157,13 +157,11 @@ static u8 mlx4_en_dcbnl_set_all(struct net_device *netdev)
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{
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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struct mlx4_en_dev *mdev = priv->mdev;
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struct mlx4_en_cee_config *dcb_cfg = &priv->cee_params.dcb_cfg;
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int err = 0;
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if (!(priv->cee_params.dcbx_cap & DCB_CAP_DCBX_VER_CEE))
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return -EINVAL;
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if (!(priv->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
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return 1;
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if (dcb_cfg->pfc_state) {
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if (priv->cee_config.pfc_state) {
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int tc;
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priv->prof->rx_pause = 0;
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@ -171,7 +169,7 @@ static u8 mlx4_en_dcbnl_set_all(struct net_device *netdev)
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for (tc = 0; tc < CEE_DCBX_MAX_PRIO; tc++) {
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u8 tc_mask = 1 << tc;
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switch (dcb_cfg->tc_config[tc].dcb_pfc) {
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switch (priv->cee_config.dcb_pfc[tc]) {
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case pfc_disabled:
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priv->prof->tx_ppp &= ~tc_mask;
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priv->prof->rx_ppp &= ~tc_mask;
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@ -199,15 +197,17 @@ static u8 mlx4_en_dcbnl_set_all(struct net_device *netdev)
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en_dbg(DRV, priv, "Set pfc off\n");
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}
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err = mlx4_SET_PORT_general(mdev->dev, priv->port,
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if (mlx4_SET_PORT_general(mdev->dev, priv->port,
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priv->rx_skb_size + ETH_FCS_LEN,
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priv->prof->tx_pause,
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priv->prof->tx_ppp,
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priv->prof->rx_pause,
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priv->prof->rx_ppp);
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if (err)
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priv->prof->rx_ppp)) {
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en_err(priv, "Failed setting pause params\n");
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return err;
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return 1;
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}
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return 0;
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}
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static u8 mlx4_en_dcbnl_get_state(struct net_device *dev)
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@ -225,7 +225,7 @@ static u8 mlx4_en_dcbnl_set_state(struct net_device *dev, u8 state)
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struct mlx4_en_priv *priv = netdev_priv(dev);
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int num_tcs = 0;
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if (!(priv->cee_params.dcbx_cap & DCB_CAP_DCBX_VER_CEE))
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if (!(priv->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
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return 1;
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if (!!(state) == !!(priv->flags & MLX4_EN_FLAG_DCB_ENABLED))
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@ -238,7 +238,10 @@ static u8 mlx4_en_dcbnl_set_state(struct net_device *dev, u8 state)
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priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED;
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}
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return mlx4_en_setup_tc(dev, num_tcs);
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if (mlx4_en_setup_tc(dev, num_tcs))
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return 1;
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return 0;
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}
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/* On success returns a non-zero 802.1p user priority bitmap
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@ -252,7 +255,7 @@ static int mlx4_en_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id)
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.selector = idtype,
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.protocol = id,
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};
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if (!(priv->cee_params.dcbx_cap & DCB_CAP_DCBX_VER_CEE))
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if (!(priv->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
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return 0;
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return dcb_getapp(netdev, &app);
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@ -264,7 +267,7 @@ static int mlx4_en_dcbnl_setapp(struct net_device *netdev, u8 idtype,
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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struct dcb_app app;
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if (!(priv->cee_params.dcbx_cap & DCB_CAP_DCBX_VER_CEE))
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if (!(priv->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
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return -EINVAL;
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memset(&app, 0, sizeof(struct dcb_app));
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@ -433,7 +436,7 @@ static u8 mlx4_en_dcbnl_getdcbx(struct net_device *dev)
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{
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struct mlx4_en_priv *priv = netdev_priv(dev);
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return priv->cee_params.dcbx_cap;
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return priv->dcbx_cap;
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}
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static u8 mlx4_en_dcbnl_setdcbx(struct net_device *dev, u8 mode)
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@ -442,7 +445,7 @@ static u8 mlx4_en_dcbnl_setdcbx(struct net_device *dev, u8 mode)
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struct ieee_ets ets = {0};
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struct ieee_pfc pfc = {0};
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if (mode == priv->cee_params.dcbx_cap)
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if (mode == priv->dcbx_cap)
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return 0;
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if ((mode & DCB_CAP_DCBX_LLD_MANAGED) ||
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@ -451,7 +454,7 @@ static u8 mlx4_en_dcbnl_setdcbx(struct net_device *dev, u8 mode)
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!(mode & DCB_CAP_DCBX_HOST))
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goto err;
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priv->cee_params.dcbx_cap = mode;
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priv->dcbx_cap = mode;
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ets.ets_cap = IEEE_8021QAZ_MAX_TCS;
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pfc.pfc_cap = IEEE_8021QAZ_MAX_TCS;
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@ -71,10 +71,11 @@ int mlx4_en_setup_tc(struct net_device *dev, u8 up)
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#ifdef CONFIG_MLX4_EN_DCB
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if (!mlx4_is_slave(priv->mdev->dev)) {
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if (up) {
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if (priv->dcbx_cap)
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priv->flags |= MLX4_EN_FLAG_DCB_ENABLED;
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} else {
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priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED;
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priv->cee_params.dcb_cfg.pfc_state = false;
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priv->cee_config.pfc_state = false;
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}
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}
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#endif /* CONFIG_MLX4_EN_DCB */
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@ -3048,9 +3049,6 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
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struct mlx4_en_priv *priv;
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int i;
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int err;
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#ifdef CONFIG_MLX4_EN_DCB
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struct tc_configuration *tc;
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#endif
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dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
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MAX_TX_RINGS, MAX_RX_RINGS);
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@ -3117,16 +3115,13 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
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priv->msg_enable = MLX4_EN_MSG_LEVEL;
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#ifdef CONFIG_MLX4_EN_DCB
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if (!mlx4_is_slave(priv->mdev->dev)) {
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priv->cee_params.dcbx_cap = DCB_CAP_DCBX_VER_CEE |
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DCB_CAP_DCBX_HOST |
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priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST |
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DCB_CAP_DCBX_VER_IEEE;
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priv->flags |= MLX4_EN_DCB_ENABLED;
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priv->cee_params.dcb_cfg.pfc_state = false;
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priv->cee_config.pfc_state = false;
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for (i = 0; i < MLX4_EN_NUM_UP; i++) {
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tc = &priv->cee_params.dcb_cfg.tc_config[i];
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tc->dcb_pfc = pfc_disabled;
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}
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for (i = 0; i < MLX4_EN_NUM_UP; i++)
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priv->cee_config.dcb_pfc[i] = pfc_disabled;
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if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
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dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
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@ -818,7 +818,7 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
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real_size = get_real_size(skb, shinfo, dev, &lso_header_size,
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&inline_ok, &fragptr);
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if (unlikely(!real_size))
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goto tx_drop;
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goto tx_drop_count;
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/* Align descriptor to TXBB size */
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desc_size = ALIGN(real_size, TXBB_SIZE);
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@ -826,7 +826,7 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
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if (unlikely(nr_txbb > MAX_DESC_TXBBS)) {
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if (netif_msg_tx_err(priv))
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en_warn(priv, "Oversized header or SG list\n");
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goto tx_drop;
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goto tx_drop_count;
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}
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bf_ok = ring->bf_enabled;
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@ -1071,9 +1071,10 @@ tx_drop_unmap:
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PCI_DMA_TODEVICE);
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}
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tx_drop_count:
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ring->tx_dropped++;
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tx_drop:
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dev_kfree_skb_any(skb);
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ring->tx_dropped++;
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return NETDEV_TX_OK;
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}
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@ -1106,7 +1107,7 @@ netdev_tx_t mlx4_en_xmit_frame(struct mlx4_en_rx_alloc *frame,
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goto tx_drop;
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if (mlx4_en_is_tx_ring_full(ring))
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goto tx_drop;
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goto tx_drop_count;
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/* fetch ring->cons far ahead before needing it to avoid stall */
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ring_cons = READ_ONCE(ring->cons);
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@ -1176,7 +1177,8 @@ netdev_tx_t mlx4_en_xmit_frame(struct mlx4_en_rx_alloc *frame,
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return NETDEV_TX_OK;
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tx_drop:
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tx_drop_count:
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ring->tx_dropped++;
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tx_drop:
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return NETDEV_TX_BUSY;
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}
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@ -482,20 +482,10 @@ enum dcb_pfc_type {
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pfc_enabled_rx
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};
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struct tc_configuration {
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enum dcb_pfc_type dcb_pfc;
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};
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struct mlx4_en_cee_config {
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bool pfc_state;
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struct tc_configuration tc_config[MLX4_EN_NUM_UP];
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enum dcb_pfc_type dcb_pfc[MLX4_EN_NUM_UP];
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};
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struct mlx4_en_cee_params {
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u8 dcbx_cap;
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struct mlx4_en_cee_config dcb_cfg;
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};
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#endif
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struct ethtool_flow_id {
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@ -624,7 +614,8 @@ struct mlx4_en_priv {
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struct ieee_ets ets;
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u16 maxrate[IEEE_8021QAZ_MAX_TCS];
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enum dcbnl_cndd_states cndd_state[IEEE_8021QAZ_MAX_TCS];
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struct mlx4_en_cee_params cee_params;
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struct mlx4_en_cee_config cee_config;
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u8 dcbx_cap;
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#endif
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#ifdef CONFIG_RFS_ACCEL
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spinlock_t filters_lock;
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@ -52,7 +52,7 @@
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#define MLX4_FLAG_V_IGNORE_FCS_MASK 0x2
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#define MLX4_IGNORE_FCS_MASK 0x1
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#define MLNX4_TX_MAX_NUMBER 8
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#define MLX4_TC_MAX_NUMBER 8
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void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table)
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{
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@ -2022,7 +2022,7 @@ int mlx4_max_tc(struct mlx4_dev *dev)
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u8 num_tc = dev->caps.max_tc_eth;
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if (!num_tc)
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num_tc = MLNX4_TX_MAX_NUMBER;
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num_tc = MLX4_TC_MAX_NUMBER;
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return num_tc;
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}
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