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MIPS: Lantiq: Falcon: add cpu-feature-override.h
Add cpu-feature-override.h for the GPON SoC Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5658/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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/*
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* Lantiq FALCON specific CPU feature overrides
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*
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* Copyright (C) 2013 Thomas Langer, Lantiq Deutschland
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*
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* This file was derived from: include/asm-mips/cpu-features.h
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* Copyright (C) 2003, 2004 Ralf Baechle
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* Copyright (C) 2004 Maciej W. Rozycki
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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*/
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#ifndef __ASM_MACH_FALCON_CPU_FEATURE_OVERRIDES_H
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#define __ASM_MACH_FALCON_CPU_FEATURE_OVERRIDES_H
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#define cpu_has_tlb 1
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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_sb1_cache 0
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#define cpu_has_fpu 0
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#define cpu_has_32fpr 0
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#define cpu_has_counter 1
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#define cpu_has_watch 1
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#define cpu_has_divec 1
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#define cpu_has_prefetch 1
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#define cpu_has_ejtag 1
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#define cpu_has_llsc 1
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#define cpu_has_mips16 1
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#define cpu_has_mdmx 0
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#define cpu_has_mips3d 0
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#define cpu_has_smartmips 0
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#define cpu_has_mips32r1 1
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#define cpu_has_mips32r2 1
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#define cpu_has_mips64r1 0
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#define cpu_has_mips64r2 0
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#define cpu_has_dsp 1
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#define cpu_has_mipsmt 1
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#define cpu_has_vint 1
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#define cpu_has_veic 1
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#define cpu_has_64bits 0
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#define cpu_has_64bit_zero_reg 0
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#define cpu_has_64bit_gp_regs 0
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#define cpu_has_64bit_addresses 0
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#define cpu_dcache_line_size() 32
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#define cpu_icache_line_size() 32
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#endif /* __ASM_MACH_FALCON_CPU_FEATURE_OVERRIDES_H */
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