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fsl/qe: Add QE TDM lib
QE has module to support TDM, some other protocols supported by QE are based on TDM. add a qe-tdm lib, this lib provides functions to the protocols using TDM to configurate QE-TDM. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Zhao Qiang
David S. Miller
parent
19163ac312
commit
35ef1c20fd
@ -22,7 +22,7 @@ config UCC_SLOW
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config UCC_FAST
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bool
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default y if UCC_GETH
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default y if UCC_GETH || QE_TDM
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help
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This option provides qe_lib support to UCC fast
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protocols: HDLC, Ethernet, ATM, transparent
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@ -31,6 +31,10 @@ config UCC
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bool
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default y if UCC_FAST || UCC_SLOW
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config QE_TDM
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bool
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default y if FSL_UCC_HDLC
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config QE_USB
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bool
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default y if USB_FSL_QE
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@ -6,5 +6,6 @@ obj-$(CONFIG_CPM) += qe_common.o
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obj-$(CONFIG_UCC) += ucc.o
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obj-$(CONFIG_UCC_SLOW) += ucc_slow.o
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obj-$(CONFIG_UCC_FAST) += ucc_fast.o
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obj-$(CONFIG_QE_TDM) += qe_tdm.o
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obj-$(CONFIG_QE_USB) += usb.o
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obj-$(CONFIG_QE_GPIO) += gpio.o
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276
drivers/soc/fsl/qe/qe_tdm.c
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276
drivers/soc/fsl/qe/qe_tdm.c
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@ -0,0 +1,276 @@
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/*
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* Copyright (C) 2015 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Authors: Zhao Qiang <qiang.zhao@nxp.com>
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*
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* Description:
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* QE TDM API Set - TDM specific routines implementations.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <soc/fsl/qe/qe_tdm.h>
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static int set_tdm_framer(const char *tdm_framer_type)
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{
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if (strcmp(tdm_framer_type, "e1") == 0)
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return TDM_FRAMER_E1;
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else if (strcmp(tdm_framer_type, "t1") == 0)
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return TDM_FRAMER_T1;
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else
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return -EINVAL;
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}
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static void set_si_param(struct ucc_tdm *utdm, struct ucc_tdm_info *ut_info)
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{
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struct si_mode_info *si_info = &ut_info->si_info;
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if (utdm->tdm_mode == TDM_INTERNAL_LOOPBACK) {
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si_info->simr_crt = 1;
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si_info->simr_rfsd = 0;
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}
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}
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int ucc_of_parse_tdm(struct device_node *np, struct ucc_tdm *utdm,
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struct ucc_tdm_info *ut_info)
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{
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const char *sprop;
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int ret = 0;
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u32 val;
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struct resource *res;
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struct device_node *np2;
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static int siram_init_flag;
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struct platform_device *pdev;
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sprop = of_get_property(np, "fsl,rx-sync-clock", NULL);
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if (sprop) {
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ut_info->uf_info.rx_sync = qe_clock_source(sprop);
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if ((ut_info->uf_info.rx_sync < QE_CLK_NONE) ||
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(ut_info->uf_info.rx_sync > QE_RSYNC_PIN)) {
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pr_err("QE-TDM: Invalid rx-sync-clock property\n");
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return -EINVAL;
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}
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} else {
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pr_err("QE-TDM: Invalid rx-sync-clock property\n");
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return -EINVAL;
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}
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sprop = of_get_property(np, "fsl,tx-sync-clock", NULL);
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if (sprop) {
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ut_info->uf_info.tx_sync = qe_clock_source(sprop);
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if ((ut_info->uf_info.tx_sync < QE_CLK_NONE) ||
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(ut_info->uf_info.tx_sync > QE_TSYNC_PIN)) {
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pr_err("QE-TDM: Invalid tx-sync-clock property\n");
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return -EINVAL;
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}
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} else {
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pr_err("QE-TDM: Invalid tx-sync-clock property\n");
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return -EINVAL;
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}
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ret = of_property_read_u32_index(np, "fsl,tx-timeslot-mask", 0, &val);
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if (ret) {
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pr_err("QE-TDM: Invalid tx-timeslot-mask property\n");
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return -EINVAL;
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}
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utdm->tx_ts_mask = val;
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ret = of_property_read_u32_index(np, "fsl,rx-timeslot-mask", 0, &val);
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if (ret) {
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ret = -EINVAL;
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pr_err("QE-TDM: Invalid rx-timeslot-mask property\n");
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return ret;
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}
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utdm->rx_ts_mask = val;
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ret = of_property_read_u32_index(np, "fsl,tdm-id", 0, &val);
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if (ret) {
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ret = -EINVAL;
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pr_err("QE-TDM: No fsl,tdm-id property for this UCC\n");
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return ret;
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}
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utdm->tdm_port = val;
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ut_info->uf_info.tdm_num = utdm->tdm_port;
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if (of_get_property(np, "fsl,tdm-internal-loopback", NULL))
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utdm->tdm_mode = TDM_INTERNAL_LOOPBACK;
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else
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utdm->tdm_mode = TDM_NORMAL;
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sprop = of_get_property(np, "fsl,tdm-framer-type", NULL);
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if (!sprop) {
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ret = -EINVAL;
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pr_err("QE-TDM: No tdm-framer-type property for UCC\n");
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return ret;
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}
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ret = set_tdm_framer(sprop);
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if (ret < 0)
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return -EINVAL;
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utdm->tdm_framer_type = ret;
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ret = of_property_read_u32_index(np, "fsl,siram-entry-id", 0, &val);
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if (ret) {
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ret = -EINVAL;
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pr_err("QE-TDM: No siram entry id for UCC\n");
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return ret;
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}
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utdm->siram_entry_id = val;
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set_si_param(utdm, ut_info);
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np2 = of_find_compatible_node(NULL, NULL, "fsl,t1040-qe-si");
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if (!np2)
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return -EINVAL;
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pdev = of_find_device_by_node(np2);
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if (!pdev) {
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pr_err("%s: failed to lookup pdev\n", np2->name);
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of_node_put(np2);
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return -EINVAL;
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}
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of_node_put(np2);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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utdm->si_regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(utdm->si_regs)) {
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ret = PTR_ERR(utdm->si_regs);
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goto err_miss_siram_property;
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}
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np2 = of_find_compatible_node(NULL, NULL, "fsl,t1040-qe-siram");
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if (!np2) {
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ret = -EINVAL;
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goto err_miss_siram_property;
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}
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pdev = of_find_device_by_node(np2);
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if (!pdev) {
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ret = -EINVAL;
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pr_err("%s: failed to lookup pdev\n", np2->name);
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of_node_put(np2);
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goto err_miss_siram_property;
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}
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of_node_put(np2);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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utdm->siram = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(utdm->siram)) {
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ret = PTR_ERR(utdm->siram);
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goto err_miss_siram_property;
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}
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if (siram_init_flag == 0) {
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memset_io(utdm->siram, 0, res->end - res->start + 1);
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siram_init_flag = 1;
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}
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return ret;
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err_miss_siram_property:
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devm_iounmap(&pdev->dev, utdm->si_regs);
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return ret;
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}
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void ucc_tdm_init(struct ucc_tdm *utdm, struct ucc_tdm_info *ut_info)
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{
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struct si1 __iomem *si_regs;
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u16 __iomem *siram;
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u16 siram_entry_valid;
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u16 siram_entry_closed;
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u16 ucc_num;
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u8 csel;
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u16 sixmr;
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u16 tdm_port;
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u32 siram_entry_id;
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u32 mask;
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int i;
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si_regs = utdm->si_regs;
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siram = utdm->siram;
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ucc_num = ut_info->uf_info.ucc_num;
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tdm_port = utdm->tdm_port;
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siram_entry_id = utdm->siram_entry_id;
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if (utdm->tdm_framer_type == TDM_FRAMER_T1)
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utdm->num_of_ts = 24;
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if (utdm->tdm_framer_type == TDM_FRAMER_E1)
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utdm->num_of_ts = 32;
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/* set siram table */
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csel = (ucc_num < 4) ? ucc_num + 9 : ucc_num - 3;
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siram_entry_valid = SIR_CSEL(csel) | SIR_BYTE | SIR_CNT(0);
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siram_entry_closed = SIR_IDLE | SIR_BYTE | SIR_CNT(0);
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for (i = 0; i < utdm->num_of_ts; i++) {
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mask = 0x01 << i;
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if (utdm->tx_ts_mask & mask)
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iowrite16be(siram_entry_valid,
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&siram[siram_entry_id * 32 + i]);
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else
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iowrite16be(siram_entry_closed,
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&siram[siram_entry_id * 32 + i]);
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if (utdm->rx_ts_mask & mask)
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iowrite16be(siram_entry_valid,
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&siram[siram_entry_id * 32 + 0x200 + i]);
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else
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iowrite16be(siram_entry_closed,
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&siram[siram_entry_id * 32 + 0x200 + i]);
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}
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setbits16(&siram[(siram_entry_id * 32) + (utdm->num_of_ts - 1)],
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SIR_LAST);
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setbits16(&siram[(siram_entry_id * 32) + 0x200 + (utdm->num_of_ts - 1)],
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SIR_LAST);
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/* Set SIxMR register */
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sixmr = SIMR_SAD(siram_entry_id);
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sixmr &= ~SIMR_SDM_MASK;
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if (utdm->tdm_mode == TDM_INTERNAL_LOOPBACK)
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sixmr |= SIMR_SDM_INTERNAL_LOOPBACK;
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else
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sixmr |= SIMR_SDM_NORMAL;
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sixmr |= SIMR_RFSD(ut_info->si_info.simr_rfsd) |
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SIMR_TFSD(ut_info->si_info.simr_tfsd);
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if (ut_info->si_info.simr_crt)
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sixmr |= SIMR_CRT;
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if (ut_info->si_info.simr_sl)
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sixmr |= SIMR_SL;
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if (ut_info->si_info.simr_ce)
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sixmr |= SIMR_CE;
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if (ut_info->si_info.simr_fe)
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sixmr |= SIMR_FE;
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if (ut_info->si_info.simr_gm)
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sixmr |= SIMR_GM;
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switch (tdm_port) {
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case 0:
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iowrite16be(sixmr, &si_regs->sixmr1[0]);
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break;
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case 1:
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iowrite16be(sixmr, &si_regs->sixmr1[1]);
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break;
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case 2:
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iowrite16be(sixmr, &si_regs->sixmr1[2]);
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break;
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case 3:
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iowrite16be(sixmr, &si_regs->sixmr1[3]);
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break;
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default:
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pr_err("QE-TDM: can not find tdm sixmr reg\n");
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break;
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}
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}
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@ -159,10 +159,7 @@ struct spi {
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/* SI */
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struct si1 {
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__be16 siamr1; /* SI1 TDMA mode register */
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__be16 sibmr1; /* SI1 TDMB mode register */
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__be16 sicmr1; /* SI1 TDMC mode register */
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__be16 sidmr1; /* SI1 TDMD mode register */
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__be16 sixmr1[4]; /* SI1 TDMx (x = A B C D) mode register */
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u8 siglmr1_h; /* SI1 global mode register high */
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u8 res0[0x1];
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u8 sicmdr1_h; /* SI1 command register high */
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94
include/soc/fsl/qe/qe_tdm.h
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94
include/soc/fsl/qe/qe_tdm.h
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@ -0,0 +1,94 @@
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/*
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* Internal header file for QE TDM mode routines.
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*
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* Copyright (C) 2016 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Authors: Zhao Qiang <qiang.zhao@nxp.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version
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*/
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#ifndef CONFIG_QE_TDM_H
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#define CONFIG_QE_TDM_H
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <soc/fsl/qe/immap_qe.h>
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#include <soc/fsl/qe/qe.h>
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#include <soc/fsl/qe/ucc.h>
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#include <soc/fsl/qe/ucc_fast.h>
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/* SI RAM entries */
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#define SIR_LAST 0x0001
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#define SIR_BYTE 0x0002
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#define SIR_CNT(x) ((x) << 2)
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#define SIR_CSEL(x) ((x) << 5)
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#define SIR_SGS 0x0200
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#define SIR_SWTR 0x4000
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#define SIR_MCC 0x8000
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#define SIR_IDLE 0
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/* SIxMR fields */
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#define SIMR_SAD(x) ((x) << 12)
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#define SIMR_SDM_NORMAL 0x0000
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#define SIMR_SDM_INTERNAL_LOOPBACK 0x0800
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#define SIMR_SDM_MASK 0x0c00
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#define SIMR_CRT 0x0040
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#define SIMR_SL 0x0020
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#define SIMR_CE 0x0010
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#define SIMR_FE 0x0008
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#define SIMR_GM 0x0004
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#define SIMR_TFSD(n) (n)
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#define SIMR_RFSD(n) ((n) << 8)
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enum tdm_ts_t {
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TDM_TX_TS,
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TDM_RX_TS
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};
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enum tdm_framer_t {
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TDM_FRAMER_T1,
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TDM_FRAMER_E1
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};
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enum tdm_mode_t {
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TDM_INTERNAL_LOOPBACK,
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TDM_NORMAL
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};
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struct si_mode_info {
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u8 simr_rfsd;
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u8 simr_tfsd;
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u8 simr_crt;
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u8 simr_sl;
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u8 simr_ce;
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u8 simr_fe;
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u8 simr_gm;
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};
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struct ucc_tdm_info {
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struct ucc_fast_info uf_info;
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struct si_mode_info si_info;
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};
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struct ucc_tdm {
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u16 tdm_port; /* port for this tdm:TDMA,TDMB */
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u32 siram_entry_id;
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u16 __iomem *siram;
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struct si1 __iomem *si_regs;
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enum tdm_framer_t tdm_framer_type;
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enum tdm_mode_t tdm_mode;
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u8 num_of_ts; /* the number of timeslots in this tdm frame */
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u32 tx_ts_mask; /* tx time slot mask */
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u32 rx_ts_mask; /* rx time slot mask */
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};
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int ucc_of_parse_tdm(struct device_node *np, struct ucc_tdm *utdm,
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struct ucc_tdm_info *ut_info);
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void ucc_tdm_init(struct ucc_tdm *utdm, struct ucc_tdm_info *ut_info);
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#endif
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