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remoteproc: qcom: q6v5_wpss: Add support for sc7280 WPSS
Add support for PIL loading of WPSS processor for SC7280 - WPSS boot will be requested by the wifi driver and hence disable auto-boot for WPSS. - Add a separate shutdown sequence handler for WPSS. - Add multiple power-domain voting support - Parse firmware-name from dtsi entry Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Rakesh Pillai <pillair@codeaurora.org> Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1643712724-12436-4-git-send-email-quic_mpubbise@quicinc.com
This commit is contained in:
Rakesh Pillai
Bjorn Andersson
parent
2630504894
commit
358b586fb3
@ -32,6 +32,7 @@
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/* time out value */
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#define ACK_TIMEOUT 1000
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#define ACK_TIMEOUT_US 1000000
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#define BOOT_FSM_TIMEOUT 10000
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/* mask values */
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#define EVB_MASK GENMASK(27, 4)
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@ -51,6 +52,8 @@
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#define QDSP6SS_CORE_CBCR 0x20
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#define QDSP6SS_SLEEP_CBCR 0x3c
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#define QCOM_Q6V5_RPROC_PROXY_PD_MAX 3
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struct adsp_pil_data {
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int crash_reason_smem;
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const char *firmware_name;
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@ -58,9 +61,13 @@ struct adsp_pil_data {
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const char *ssr_name;
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const char *sysmon_name;
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int ssctl_id;
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bool is_wpss;
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bool auto_boot;
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const char **clk_ids;
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int num_clks;
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const char **proxy_pd_names;
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const char *load_state;
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};
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struct qcom_adsp {
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@ -93,11 +100,151 @@ struct qcom_adsp {
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void *mem_region;
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size_t mem_size;
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struct device *proxy_pds[QCOM_Q6V5_RPROC_PROXY_PD_MAX];
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size_t proxy_pd_count;
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struct qcom_rproc_glink glink_subdev;
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struct qcom_rproc_ssr ssr_subdev;
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struct qcom_sysmon *sysmon;
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int (*shutdown)(struct qcom_adsp *adsp);
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};
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static int qcom_rproc_pds_attach(struct device *dev, struct qcom_adsp *adsp,
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const char **pd_names)
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{
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struct device **devs = adsp->proxy_pds;
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size_t num_pds = 0;
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int ret;
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int i;
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if (!pd_names)
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return 0;
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/* Handle single power domain */
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if (dev->pm_domain) {
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devs[0] = dev;
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pm_runtime_enable(dev);
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return 1;
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}
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while (pd_names[num_pds])
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num_pds++;
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if (num_pds > ARRAY_SIZE(adsp->proxy_pds))
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return -E2BIG;
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for (i = 0; i < num_pds; i++) {
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devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
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if (IS_ERR_OR_NULL(devs[i])) {
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ret = PTR_ERR(devs[i]) ? : -ENODATA;
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goto unroll_attach;
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}
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}
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return num_pds;
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unroll_attach:
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for (i--; i >= 0; i--)
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dev_pm_domain_detach(devs[i], false);
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return ret;
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}
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static void qcom_rproc_pds_detach(struct qcom_adsp *adsp, struct device **pds,
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size_t pd_count)
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{
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struct device *dev = adsp->dev;
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int i;
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/* Handle single power domain */
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if (dev->pm_domain && pd_count) {
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pm_runtime_disable(dev);
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return;
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}
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for (i = 0; i < pd_count; i++)
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dev_pm_domain_detach(pds[i], false);
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}
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static int qcom_rproc_pds_enable(struct qcom_adsp *adsp, struct device **pds,
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size_t pd_count)
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{
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int ret;
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int i;
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for (i = 0; i < pd_count; i++) {
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dev_pm_genpd_set_performance_state(pds[i], INT_MAX);
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ret = pm_runtime_get_sync(pds[i]);
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if (ret < 0) {
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pm_runtime_put_noidle(pds[i]);
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dev_pm_genpd_set_performance_state(pds[i], 0);
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goto unroll_pd_votes;
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}
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}
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return 0;
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unroll_pd_votes:
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for (i--; i >= 0; i--) {
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dev_pm_genpd_set_performance_state(pds[i], 0);
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pm_runtime_put(pds[i]);
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}
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return ret;
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}
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static void qcom_rproc_pds_disable(struct qcom_adsp *adsp, struct device **pds,
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size_t pd_count)
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{
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int i;
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for (i = 0; i < pd_count; i++) {
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dev_pm_genpd_set_performance_state(pds[i], 0);
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pm_runtime_put(pds[i]);
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}
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}
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static int qcom_wpss_shutdown(struct qcom_adsp *adsp)
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{
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unsigned int val;
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regmap_write(adsp->halt_map, adsp->halt_lpass + LPASS_HALTREQ_REG, 1);
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/* Wait for halt ACK from QDSP6 */
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regmap_read_poll_timeout(adsp->halt_map,
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adsp->halt_lpass + LPASS_HALTACK_REG, val,
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val, 1000, ACK_TIMEOUT_US);
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/* Assert the WPSS PDC Reset */
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reset_control_assert(adsp->pdc_sync_reset);
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/* Place the WPSS processor into reset */
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reset_control_assert(adsp->restart);
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/* wait after asserting subsystem restart from AOSS */
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usleep_range(200, 205);
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/* Remove the WPSS reset */
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reset_control_deassert(adsp->restart);
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/* De-assert the WPSS PDC Reset */
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reset_control_deassert(adsp->pdc_sync_reset);
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usleep_range(100, 105);
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clk_bulk_disable_unprepare(adsp->num_clks, adsp->clks);
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regmap_write(adsp->halt_map, adsp->halt_lpass + LPASS_HALTREQ_REG, 0);
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/* Wait for halt ACK from QDSP6 */
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regmap_read_poll_timeout(adsp->halt_map,
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adsp->halt_lpass + LPASS_HALTACK_REG, val,
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!val, 1000, ACK_TIMEOUT_US);
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return 0;
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}
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static int qcom_adsp_shutdown(struct qcom_adsp *adsp)
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{
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unsigned long timeout;
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@ -193,12 +340,10 @@ static int adsp_start(struct rproc *rproc)
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if (ret)
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goto disable_irqs;
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dev_pm_genpd_set_performance_state(adsp->dev, INT_MAX);
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ret = pm_runtime_get_sync(adsp->dev);
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if (ret) {
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pm_runtime_put_noidle(adsp->dev);
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ret = qcom_rproc_pds_enable(adsp, adsp->proxy_pds,
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adsp->proxy_pd_count);
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if (ret < 0)
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goto disable_xo_clk;
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}
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ret = clk_bulk_prepare_enable(adsp->num_clks, adsp->clks);
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if (ret) {
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@ -243,8 +388,7 @@ static int adsp_start(struct rproc *rproc)
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disable_adsp_clks:
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clk_bulk_disable_unprepare(adsp->num_clks, adsp->clks);
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disable_power_domain:
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dev_pm_genpd_set_performance_state(adsp->dev, 0);
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pm_runtime_put(adsp->dev);
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qcom_rproc_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
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disable_xo_clk:
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clk_disable_unprepare(adsp->xo);
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disable_irqs:
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@ -258,8 +402,7 @@ static void qcom_adsp_pil_handover(struct qcom_q6v5 *q6v5)
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struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
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clk_disable_unprepare(adsp->xo);
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dev_pm_genpd_set_performance_state(adsp->dev, 0);
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pm_runtime_put(adsp->dev);
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qcom_rproc_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
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}
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static int adsp_stop(struct rproc *rproc)
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@ -272,7 +415,7 @@ static int adsp_stop(struct rproc *rproc)
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if (ret == -ETIMEDOUT)
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dev_err(adsp->dev, "timed out on wait\n");
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ret = qcom_adsp_shutdown(adsp);
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ret = adsp->shutdown(adsp);
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if (ret)
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dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
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@ -428,6 +571,7 @@ static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
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static int adsp_probe(struct platform_device *pdev)
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{
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const struct adsp_pil_data *desc;
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const char *firmware_name;
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struct qcom_adsp *adsp;
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struct rproc *rproc;
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int ret;
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@ -436,12 +580,22 @@ static int adsp_probe(struct platform_device *pdev)
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if (!desc)
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return -EINVAL;
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firmware_name = desc->firmware_name;
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ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
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&firmware_name);
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if (ret < 0 && ret != -EINVAL) {
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dev_err(&pdev->dev, "unable to read firmware-name\n");
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return ret;
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}
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rproc = rproc_alloc(&pdev->dev, pdev->name, &adsp_ops,
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desc->firmware_name, sizeof(*adsp));
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firmware_name, sizeof(*adsp));
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if (!rproc) {
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dev_err(&pdev->dev, "unable to allocate remoteproc\n");
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return -ENOMEM;
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}
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rproc->auto_boot = desc->auto_boot;
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rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
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adsp = (struct qcom_adsp *)rproc->priv;
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@ -450,6 +604,11 @@ static int adsp_probe(struct platform_device *pdev)
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adsp->info_name = desc->sysmon_name;
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platform_set_drvdata(pdev, adsp);
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if (desc->is_wpss)
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adsp->shutdown = qcom_wpss_shutdown;
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else
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adsp->shutdown = qcom_adsp_shutdown;
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ret = adsp_alloc_memory_region(adsp);
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if (ret)
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goto free_rproc;
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@ -458,7 +617,13 @@ static int adsp_probe(struct platform_device *pdev)
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if (ret)
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goto free_rproc;
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pm_runtime_enable(adsp->dev);
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ret = qcom_rproc_pds_attach(adsp->dev, adsp,
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desc->proxy_pd_names);
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if (ret < 0) {
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dev_err(&pdev->dev, "Failed to attach proxy power domains\n");
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goto free_rproc;
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}
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adsp->proxy_pd_count = ret;
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ret = adsp_init_reset(adsp);
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if (ret)
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@ -468,8 +633,8 @@ static int adsp_probe(struct platform_device *pdev)
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if (ret)
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goto disable_pm;
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ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, NULL,
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qcom_adsp_pil_handover);
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ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem,
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desc->load_state, qcom_adsp_pil_handover);
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if (ret)
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goto disable_pm;
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@ -490,7 +655,8 @@ static int adsp_probe(struct platform_device *pdev)
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return 0;
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disable_pm:
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pm_runtime_disable(adsp->dev);
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qcom_rproc_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
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free_rproc:
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rproc_free(rproc);
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@ -507,7 +673,7 @@ static int adsp_remove(struct platform_device *pdev)
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qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
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qcom_remove_sysmon_subdev(adsp->sysmon);
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qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
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pm_runtime_disable(adsp->dev);
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qcom_rproc_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
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rproc_free(adsp->rproc);
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return 0;
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@ -519,11 +685,16 @@ static const struct adsp_pil_data adsp_resource_init = {
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.ssr_name = "lpass",
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.sysmon_name = "adsp",
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.ssctl_id = 0x14,
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.is_wpss = false,
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.auto_boot = true,
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.clk_ids = (const char*[]) {
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"sway_cbcr", "lpass_ahbs_aon_cbcr", "lpass_ahbm_aon_cbcr",
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"qdsp6ss_xo", "qdsp6ss_sleep", "qdsp6ss_core", NULL
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},
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.num_clks = 7,
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.proxy_pd_names = (const char*[]) {
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"cx", NULL
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},
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};
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static const struct adsp_pil_data cdsp_resource_init = {
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@ -532,15 +703,39 @@ static const struct adsp_pil_data cdsp_resource_init = {
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.ssr_name = "cdsp",
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.sysmon_name = "cdsp",
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.ssctl_id = 0x17,
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.is_wpss = false,
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.auto_boot = true,
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.clk_ids = (const char*[]) {
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"sway", "tbu", "bimc", "ahb_aon", "q6ss_slave", "q6ss_master",
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"q6_axim", NULL
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},
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.num_clks = 7,
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.proxy_pd_names = (const char*[]) {
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"cx", NULL
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},
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};
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static const struct adsp_pil_data wpss_resource_init = {
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.crash_reason_smem = 626,
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.firmware_name = "wpss.mdt",
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.ssr_name = "wpss",
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.sysmon_name = "wpss",
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.ssctl_id = 0x19,
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.is_wpss = true,
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.auto_boot = false,
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.load_state = "wpss",
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.clk_ids = (const char*[]) {
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"ahb_bdg", "ahb", "rscp", NULL
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},
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.num_clks = 3,
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.proxy_pd_names = (const char*[]) {
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"cx", "mx", NULL
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},
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};
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static const struct of_device_id adsp_of_match[] = {
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{ .compatible = "qcom,qcs404-cdsp-pil", .data = &cdsp_resource_init },
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{ .compatible = "qcom,sc7280-wpss-pil", .data = &wpss_resource_init },
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{ .compatible = "qcom,sdm845-adsp-pil", .data = &adsp_resource_init },
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{ },
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};
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