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MIPS: Octeon: Fix fixup_irqs for HOTPLUG_CPU
The original version went behind the back of everything, leaving things in an inconsistent state. Now we use the irq_set_affinity() to do the work for us. This has the advantage that the IRQ core's view of the affinity stays consistent. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1486/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -788,54 +788,84 @@ asmlinkage void plat_irq_dispatch(void)
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static int is_irq_enabled_on_cpu(unsigned int irq, unsigned int cpu)
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{
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unsigned int isset;
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int coreid = octeon_coreid_for_cpu(cpu);
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int bit = (irq < OCTEON_IRQ_WDOG0) ?
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irq - OCTEON_IRQ_WORKQ0 : irq - OCTEON_IRQ_WDOG0;
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if (irq < 64) {
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isset = (cvmx_read_csr(CVMX_CIU_INTX_EN0(coreid * 2)) &
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(1ull << bit)) >> bit;
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} else {
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isset = (cvmx_read_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1)) &
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(1ull << bit)) >> bit;
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}
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return isset;
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}
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void fixup_irqs(void)
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{
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int irq;
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int irq;
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struct irq_desc *desc;
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cpumask_t new_affinity;
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unsigned long flags;
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int do_set_affinity;
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int cpu;
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cpu = smp_processor_id();
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for (irq = OCTEON_IRQ_SW0; irq <= OCTEON_IRQ_TIMER; irq++)
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octeon_irq_core_disable_local(irq);
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for (irq = OCTEON_IRQ_WORKQ0; irq <= OCTEON_IRQ_GPIO15; irq++) {
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if (is_irq_enabled_on_cpu(irq, smp_processor_id())) {
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/* ciu irq migrates to next cpu */
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octeon_irq_chip_ciu0.disable(irq);
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octeon_irq_ciu0_set_affinity(irq, &cpu_online_map);
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}
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}
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for (irq = OCTEON_IRQ_WORKQ0; irq < OCTEON_IRQ_LAST; irq++) {
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desc = irq_to_desc(irq);
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switch (irq) {
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case OCTEON_IRQ_MBOX0:
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case OCTEON_IRQ_MBOX1:
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/* The eoi function will disable them on this CPU. */
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desc->chip->eoi(irq);
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break;
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case OCTEON_IRQ_WDOG0:
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case OCTEON_IRQ_WDOG1:
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case OCTEON_IRQ_WDOG2:
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case OCTEON_IRQ_WDOG3:
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case OCTEON_IRQ_WDOG4:
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case OCTEON_IRQ_WDOG5:
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case OCTEON_IRQ_WDOG6:
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case OCTEON_IRQ_WDOG7:
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case OCTEON_IRQ_WDOG8:
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case OCTEON_IRQ_WDOG9:
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case OCTEON_IRQ_WDOG10:
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case OCTEON_IRQ_WDOG11:
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case OCTEON_IRQ_WDOG12:
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case OCTEON_IRQ_WDOG13:
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case OCTEON_IRQ_WDOG14:
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case OCTEON_IRQ_WDOG15:
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/*
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* These have special per CPU semantics and
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* are handled in the watchdog driver.
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*/
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break;
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default:
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raw_spin_lock_irqsave(&desc->lock, flags);
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/*
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* If this irq has an action, it is in use and
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* must be migrated if it has affinity to this
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* cpu.
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*/
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if (desc->action && cpumask_test_cpu(cpu, desc->affinity)) {
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if (cpumask_weight(desc->affinity) > 1) {
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/*
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* It has multi CPU affinity,
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* just remove this CPU from
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* the affinity set.
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*/
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cpumask_copy(&new_affinity, desc->affinity);
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cpumask_clear_cpu(cpu, &new_affinity);
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} else {
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/*
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* Otherwise, put it on lowest
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* numbered online CPU.
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*/
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cpumask_clear(&new_affinity);
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cpumask_set_cpu(cpumask_first(cpu_online_mask), &new_affinity);
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}
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do_set_affinity = 1;
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} else {
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do_set_affinity = 0;
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}
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raw_spin_unlock_irqrestore(&desc->lock, flags);
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#if 0
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for (irq = OCTEON_IRQ_MBOX0; irq <= OCTEON_IRQ_MBOX1; irq++)
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octeon_irq_mailbox_mask(irq);
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#endif
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for (irq = OCTEON_IRQ_UART0; irq <= OCTEON_IRQ_BOOTDMA; irq++) {
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if (is_irq_enabled_on_cpu(irq, smp_processor_id())) {
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/* ciu irq migrates to next cpu */
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octeon_irq_chip_ciu0.disable(irq);
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octeon_irq_ciu0_set_affinity(irq, &cpu_online_map);
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}
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}
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if (do_set_affinity)
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irq_set_affinity(irq, &new_affinity);
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for (irq = OCTEON_IRQ_UART2; irq <= OCTEON_IRQ_RESERVED135; irq++) {
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if (is_irq_enabled_on_cpu(irq, smp_processor_id())) {
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/* ciu irq migrates to next cpu */
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octeon_irq_chip_ciu1.disable(irq);
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octeon_irq_ciu1_set_affinity(irq, &cpu_online_map);
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break;
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}
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}
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}
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