mirror of
https://github.com/torvalds/linux.git
synced 2024-12-27 21:33:00 +00:00
ARM: SoC fixes
We didn't have a batch last week, so this one is slightly larger.
None of them are scary though, a handful of fixes for small DT pieces,
replacing properties with newer conventions.
Highlights:
- N900 fix for setting system revision
- onenand init fix to avoid filesystem corruption
- Clock fix for audio on Beaglebone-x15
- Fixes on shmobile to deal with CONFIG_DEBUG_RODATA (default y in 4.6)
+ misc smaller stuff.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJW0jMpAAoJEIwa5zzehBx3nGgP/3wlhTrIyFWTu2Oa3s+0dwFJ
nXNcHc/7egzRlcPZ/dWfyrQfVC4/Zko7tI+76vJ8vSZ5oZ+la6CC1ZymlVpxUo9y
mF8wyFnRU5sc5yeSSNH91RzJg2fSJWvcUJ/5zeUBkjKLc1AEAfyMXEjxDHptDI/L
s+/JRqhrF8xsnfBymSW2mW6u34Sxn76dVsofWNrSCge/+kVAM4km/PDneWKz/14Q
oLY9eFl6b0O5DJ/+5OSME0pnnRnJC/eD5+HYQSBIu3+RKgP5CH+xQDNeqf0GIdlI
7Y0cKbjFxT5fXfvE4KOKQuLKgAzCSRe1PwuJ8MTDE73kWsUAWN8McWkCYtCSufxU
KSPlgjfO1xWoSkVneK3NzcRWJoi6Ev0lZ0s6HuMvZJAoce9XrcIbZRQ7CP3Iu3Oj
iC8GxIgHyIJV95XABpliH5IVTRERTbXIOgR82dKQPxLU6cbCRbFs/GU2v7JQEjOS
exJDM5R08SSBC8MRxvWp09pwcfO44XIkQu4pdRJfpaFVwJYejTYOUDVYCcCg3s9O
ApXzQj6/A0QMnp1SAvPHbc3LqLq5mTzvt1j59TNA8Q0O4U4r20CBF+D7lb9KMlu/
GyJ2wSsxCwnBDVWDPtXGdE3z/K81H7nPRBzuL0dM80cF5gQNglOdAN47UoD/bBP6
1pR5h9K92LbV5NiToyPY
=xeuW
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"We didn't have a batch last week, so this one is slightly larger.
None of them are scary though, a handful of fixes for small DT pieces,
replacing properties with newer conventions.
Highlights:
- N900 fix for setting system revision
- onenand init fix to avoid filesystem corruption
- Clock fix for audio on Beaglebone-x15
- Fixes on shmobile to deal with CONFIG_DEBUG_RODATA (default y in 4.6)
+ misc smaller stuff"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
MAINTAINERS: Extend info, add wiki and ml for meson arch
MAINTAINERS: alpine: add a new maintainer and update the entry
ARM: at91/dt: fix typo in sama5d2 pinmux descriptions
ARM: OMAP2+: Fix onenand initialization to avoid filesystem corruption
Revert "regulator: tps65217: remove tps65217.dtsi file"
ARM: shmobile: Remove shmobile_boot_arg
ARM: shmobile: Move shmobile_smp_{mpidr, fn, arg}[] from .text to .bss
ARM: shmobile: r8a7779: Remove remainings of removed SCU boot setup code
ARM: shmobile: Move shmobile_scu_base from .text to .bss
ARM: OMAP2+: Fix omap_device for module reload on PM runtime forbid
ARM: OMAP2+: Improve omap_device error for driver writers
ARM: DTS: am57xx-beagle-x15: Select SYS_CLK2 for audio clocks
ARM: dts: am335x/am57xx: replace gpio-key,wakeup with wakeup-source property
ARM: OMAP2+: Set system_rev from ATAGS for n900
ARM: dts: orion5x: fix the missing mtd flash on linkstation lswtgl
ARM: dts: kirkwood: use unique machine name for ds112
ARM: dts: imx6: remove bogus interrupt-parent from CAAM node
This commit is contained in:
Linus Torvalds
commit
340b3a5b35
@ -26,11 +26,7 @@ Example:
|
||||
ti,pmic-shutdown-controller;
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: dcdc1 {
|
||||
reg = <0>;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
@ -38,7 +34,6 @@ Example:
|
||||
};
|
||||
|
||||
dcdc2_reg: dcdc2 {
|
||||
reg = <1>;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
@ -46,7 +41,6 @@ Example:
|
||||
};
|
||||
|
||||
dcdc3_reg: dcc3 {
|
||||
reg = <2>;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-boot-on;
|
||||
@ -54,7 +48,6 @@ Example:
|
||||
};
|
||||
|
||||
ldo1_reg: ldo1 {
|
||||
reg = <3>;
|
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regulator-min-microvolt = <1000000>;
|
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regulator-max-microvolt = <3300000>;
|
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regulator-boot-on;
|
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@ -62,7 +55,6 @@ Example:
|
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};
|
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|
||||
ldo2_reg: ldo2 {
|
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reg = <4>;
|
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regulator-min-microvolt = <900000>;
|
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regulator-max-microvolt = <3300000>;
|
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regulator-boot-on;
|
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@ -70,7 +62,6 @@ Example:
|
||||
};
|
||||
|
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ldo3_reg: ldo3 {
|
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reg = <5>;
|
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regulator-min-microvolt = <1800000>;
|
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regulator-max-microvolt = <3300000>;
|
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regulator-boot-on;
|
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@ -78,7 +69,6 @@ Example:
|
||||
};
|
||||
|
||||
ldo4_reg: ldo4 {
|
||||
reg = <6>;
|
||||
regulator-min-microvolt = <1800000>;
|
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regulator-max-microvolt = <3300000>;
|
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regulator-boot-on;
|
||||
|
||||
13
MAINTAINERS
13
MAINTAINERS
@ -920,17 +920,24 @@ M: Emilio López <emilio@elopez.com.ar>
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S: Maintained
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F: drivers/clk/sunxi/
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ARM/Amlogic MesonX SoC support
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ARM/Amlogic Meson SoC support
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M: Carlo Caione <carlo@caione.org>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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L: linux-meson@googlegroups.com
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W: http://linux-meson.com/
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S: Maintained
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F: drivers/media/rc/meson-ir.c
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N: meson[x68]
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F: arch/arm/mach-meson/
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F: arch/arm/boot/dts/meson*
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N: meson
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ARM/Annapurna Labs ALPINE ARCHITECTURE
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M: Tsahee Zidenberg <tsahee@annapurnalabs.com>
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M: Antoine Tenart <antoine.tenart@free-electrons.com>
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S: Maintained
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F: arch/arm/mach-alpine/
|
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F: arch/arm/boot/dts/alpine*
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F: arch/arm64/boot/dts/al/
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F: drivers/*/*alpine*
|
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ARM/ATMEL AT91RM9200, AT91SAM9 AND SAMA5 SOC SUPPORT
|
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M: Nicolas Ferre <nicolas.ferre@atmel.com>
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@ -285,8 +285,10 @@
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};
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};
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/include/ "tps65217.dtsi"
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&tps {
|
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compatible = "ti,tps65217";
|
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/*
|
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* Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
|
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* mode") at poweroff. Most BeagleBone versions do not support RTC-only
|
||||
@ -307,17 +309,12 @@
|
||||
ti,pmic-shutdown-controller;
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-name = "vdds_dpr";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <925000>;
|
||||
@ -327,7 +324,6 @@
|
||||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <925000>;
|
||||
@ -337,25 +333,21 @@
|
||||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-name = "vio,vrtc,vdds";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-name = "vdd_3v3aux";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-name = "vdd_1v8";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-name = "vdd_3v3a";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
@ -128,21 +128,16 @@
|
||||
|
||||
};
|
||||
|
||||
/include/ "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-name = "vdds_dpr";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <925000>;
|
||||
@ -152,7 +147,6 @@
|
||||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <925000>;
|
||||
@ -162,28 +156,24 @@
|
||||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-name = "vio,vrtc,vdds";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-name = "vdd_3v3aux";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-name = "vdd_1v8";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-name = "vdd_3v3d";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
|
||||
@ -375,15 +375,11 @@
|
||||
wp-gpios = <&gpio3 18 0>;
|
||||
};
|
||||
|
||||
#include "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
/* +1.5V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <1450000>;
|
||||
regulator-max-microvolt = <1550000>;
|
||||
@ -392,7 +388,6 @@
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
/* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <915000>;
|
||||
@ -402,7 +397,6 @@
|
||||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <915000>;
|
||||
@ -412,7 +406,6 @@
|
||||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
/* +1.8V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <1750000>;
|
||||
regulator-max-microvolt = <1870000>;
|
||||
@ -421,7 +414,6 @@
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
/* +3.3V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <3175000>;
|
||||
regulator-max-microvolt = <3430000>;
|
||||
@ -430,7 +422,6 @@
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
/* +1.8V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <1750000>;
|
||||
regulator-max-microvolt = <1870000>;
|
||||
@ -439,7 +430,6 @@
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
/* +3.3V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <3175000>;
|
||||
regulator-max-microvolt = <3430000>;
|
||||
|
||||
@ -420,9 +420,9 @@
|
||||
vin-supply = <&vbat>;
|
||||
};
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
/include/ "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
backlight {
|
||||
isel = <1>; /* ISET1 */
|
||||
fdim = <200>; /* TPS65217_BL_FDIM_200HZ */
|
||||
@ -430,17 +430,12 @@
|
||||
};
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
/* VDD_1V8 system supply */
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
/* VDD_CORE voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <925000>;
|
||||
@ -450,7 +445,6 @@
|
||||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
/* VDD_MPU voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <925000>;
|
||||
@ -460,21 +454,18 @@
|
||||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
/* VRTC 1.8V always-on supply */
|
||||
regulator-name = "vrtc,vdds";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
/* 3.3V rail */
|
||||
regulator-name = "vdd_3v3aux";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
/* VDD_3V3A 3.3V rail */
|
||||
regulator-name = "vdd_3v3a";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
@ -482,7 +473,6 @@
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
/* VDD_3V3B 3.3V rail */
|
||||
regulator-name = "vdd_3v3b";
|
||||
regulator-always-on;
|
||||
|
||||
@ -46,7 +46,7 @@
|
||||
gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <KEY_BACK>;
|
||||
debounce-interval = <1000>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
front_button {
|
||||
@ -54,7 +54,7 @@
|
||||
gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <KEY_FRONT>;
|
||||
debounce-interval = <1000>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -375,19 +375,16 @@
|
||||
pinctrl-0 = <&uart4_pins>;
|
||||
};
|
||||
|
||||
#include "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
ti,pmic-shutdown-controller;
|
||||
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <7>; /* NNMI */
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
/* VDDS_DDR */
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
@ -395,7 +392,6 @@
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <925000>;
|
||||
@ -405,7 +401,6 @@
|
||||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <925000>;
|
||||
@ -415,7 +410,6 @@
|
||||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
/* VRTC / VIO / VDDS*/
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
@ -423,7 +417,6 @@
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
/* VDD_3V3AUX */
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
@ -431,7 +424,6 @@
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
/* VDD_1V8 */
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
@ -439,7 +431,6 @@
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
/* VDD_3V3A */
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
@ -173,6 +173,8 @@
|
||||
|
||||
sound0_master: simple-audio-card,codec {
|
||||
sound-dai = <&tlv320aic3104>;
|
||||
assigned-clocks = <&clkoutmux2_clk_mux>;
|
||||
assigned-clock-parents = <&sys_clk2_dclk_div>;
|
||||
clocks = <&clkout2_clk>;
|
||||
};
|
||||
};
|
||||
@ -796,6 +798,8 @@
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&mcasp3_pins_default>;
|
||||
pinctrl-1 = <&mcasp3_pins_sleep>;
|
||||
assigned-clocks = <&mcasp3_ahclkx_mux>;
|
||||
assigned-clock-parents = <&sys_clkin2>;
|
||||
status = "okay";
|
||||
|
||||
op-mode = <0>; /* MCASP_IIS_MODE */
|
||||
|
||||
@ -545,7 +545,7 @@
|
||||
ti,debounce-tol = /bits/ 16 <10>;
|
||||
ti,debounce-rep = /bits/ 16 <1>;
|
||||
|
||||
linux,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -896,7 +896,6 @@
|
||||
#size-cells = <1>;
|
||||
reg = <0x2100000 0x10000>;
|
||||
ranges = <0 0x2100000 0x10000>;
|
||||
interrupt-parent = <&intc>;
|
||||
clocks = <&clks IMX6QDL_CLK_CAAM_MEM>,
|
||||
<&clks IMX6QDL_CLK_CAAM_ACLK>,
|
||||
<&clks IMX6QDL_CLK_CAAM_IPG>,
|
||||
|
||||
@ -14,7 +14,7 @@
|
||||
#include "kirkwood-synology.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Synology DS111";
|
||||
model = "Synology DS112";
|
||||
compatible = "synology,ds111", "marvell,kirkwood";
|
||||
|
||||
memory {
|
||||
|
||||
@ -228,6 +228,37 @@
|
||||
};
|
||||
};
|
||||
|
||||
&devbus_bootcs {
|
||||
status = "okay";
|
||||
devbus,keep-config;
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec-flash";
|
||||
reg = <0 0x40000>;
|
||||
bank-width = <1>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
header@0 {
|
||||
reg = <0 0x30000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
uboot@30000 {
|
||||
reg = <0x30000 0xF000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
uboot_env@3F000 {
|
||||
reg = <0x3F000 0x1000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
status = "okay";
|
||||
|
||||
|
||||
@ -90,7 +90,7 @@
|
||||
#define PIN_PA14__I2SC1_MCK PINMUX_PIN(PIN_PA14, 4, 2)
|
||||
#define PIN_PA14__FLEXCOM3_IO2 PINMUX_PIN(PIN_PA14, 5, 1)
|
||||
#define PIN_PA14__D9 PINMUX_PIN(PIN_PA14, 6, 2)
|
||||
#define PIN_PA15 14
|
||||
#define PIN_PA15 15
|
||||
#define PIN_PA15__GPIO PINMUX_PIN(PIN_PA15, 0, 0)
|
||||
#define PIN_PA15__SPI0_MOSI PINMUX_PIN(PIN_PA15, 1, 1)
|
||||
#define PIN_PA15__TF1 PINMUX_PIN(PIN_PA15, 2, 1)
|
||||
|
||||
56
arch/arm/boot/dts/tps65217.dtsi
Normal file
56
arch/arm/boot/dts/tps65217.dtsi
Normal file
@ -0,0 +1,56 @@
|
||||
/*
|
||||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Integrated Power Management Chip
|
||||
* http://www.ti.com/lit/ds/symlink/tps65217.pdf
|
||||
*/
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-compatible = "dcdc1";
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
regulator-compatible = "dcdc2";
|
||||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
regulator-compatible = "dcdc3";
|
||||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-compatible = "ldo1";
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-compatible = "ldo2";
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-compatible = "ldo3";
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-compatible = "ldo4";
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -18,6 +18,7 @@
|
||||
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/system_info.h>
|
||||
|
||||
#include "common.h"
|
||||
|
||||
@ -77,12 +78,31 @@ static const char *const n900_boards_compat[] __initconst = {
|
||||
NULL,
|
||||
};
|
||||
|
||||
/* Set system_rev from atags */
|
||||
static void __init rx51_set_system_rev(const struct tag *tags)
|
||||
{
|
||||
const struct tag *tag;
|
||||
|
||||
if (tags->hdr.tag != ATAG_CORE)
|
||||
return;
|
||||
|
||||
for_each_tag(tag, tags) {
|
||||
if (tag->hdr.tag == ATAG_REVISION) {
|
||||
system_rev = tag->u.revision.rev;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Legacy userspace on Nokia N900 needs ATAGS exported in /proc/atags,
|
||||
* save them while the data is still not overwritten
|
||||
*/
|
||||
static void __init rx51_reserve(void)
|
||||
{
|
||||
save_atags((const struct tag *)(PAGE_OFFSET + 0x100));
|
||||
const struct tag *tags = (const struct tag *)(PAGE_OFFSET + 0x100);
|
||||
|
||||
save_atags(tags);
|
||||
rx51_set_system_rev(tags);
|
||||
omap_reserve();
|
||||
}
|
||||
|
||||
|
||||
@ -101,10 +101,8 @@ static void omap2_onenand_set_async_mode(void __iomem *onenand_base)
|
||||
|
||||
static void set_onenand_cfg(void __iomem *onenand_base)
|
||||
{
|
||||
u32 reg;
|
||||
u32 reg = ONENAND_SYS_CFG1_RDY | ONENAND_SYS_CFG1_INT;
|
||||
|
||||
reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
|
||||
reg &= ~((0x7 << ONENAND_SYS_CFG1_BRL_SHIFT) | (0x7 << 9));
|
||||
reg |= (latency << ONENAND_SYS_CFG1_BRL_SHIFT) |
|
||||
ONENAND_SYS_CFG1_BL_16;
|
||||
if (onenand_flags & ONENAND_FLAG_SYNCREAD)
|
||||
@ -123,6 +121,7 @@ static void set_onenand_cfg(void __iomem *onenand_base)
|
||||
reg |= ONENAND_SYS_CFG1_VHF;
|
||||
else
|
||||
reg &= ~ONENAND_SYS_CFG1_VHF;
|
||||
|
||||
writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
|
||||
}
|
||||
|
||||
@ -289,6 +288,7 @@ static int omap2_onenand_setup_async(void __iomem *onenand_base)
|
||||
}
|
||||
}
|
||||
|
||||
onenand_async.sync_write = true;
|
||||
omap2_onenand_calc_async_timings(&t);
|
||||
|
||||
ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &onenand_async);
|
||||
|
||||
@ -191,12 +191,22 @@ static int _omap_device_notifier_call(struct notifier_block *nb,
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
struct omap_device *od;
|
||||
int err;
|
||||
|
||||
switch (event) {
|
||||
case BUS_NOTIFY_DEL_DEVICE:
|
||||
if (pdev->archdata.od)
|
||||
omap_device_delete(pdev->archdata.od);
|
||||
break;
|
||||
case BUS_NOTIFY_UNBOUND_DRIVER:
|
||||
od = to_omap_device(pdev);
|
||||
if (od && (od->_state == OMAP_DEVICE_STATE_ENABLED)) {
|
||||
dev_info(dev, "enabled after unload, idling\n");
|
||||
err = omap_device_idle(pdev);
|
||||
if (err)
|
||||
dev_err(dev, "failed to idle\n");
|
||||
}
|
||||
break;
|
||||
case BUS_NOTIFY_ADD_DEVICE:
|
||||
if (pdev->dev.of_node)
|
||||
omap_device_build_from_dt(pdev);
|
||||
@ -602,8 +612,10 @@ static int _od_runtime_resume(struct device *dev)
|
||||
int ret;
|
||||
|
||||
ret = omap_device_enable(pdev);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
dev_err(dev, "use pm_runtime_put_sync_suspend() in driver?\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return pm_generic_runtime_resume(dev);
|
||||
}
|
||||
|
||||
@ -4,7 +4,6 @@
|
||||
extern void shmobile_init_delay(void);
|
||||
extern void shmobile_boot_vector(void);
|
||||
extern unsigned long shmobile_boot_fn;
|
||||
extern unsigned long shmobile_boot_arg;
|
||||
extern unsigned long shmobile_boot_size;
|
||||
extern void shmobile_smp_boot(void);
|
||||
extern void shmobile_smp_sleep(void);
|
||||
|
||||
@ -38,9 +38,3 @@ ENTRY(shmobile_boot_scu)
|
||||
|
||||
b secondary_startup
|
||||
ENDPROC(shmobile_boot_scu)
|
||||
|
||||
.text
|
||||
.align 2
|
||||
.globl shmobile_scu_base
|
||||
shmobile_scu_base:
|
||||
.space 4
|
||||
|
||||
@ -24,7 +24,6 @@
|
||||
.arm
|
||||
.align 12
|
||||
ENTRY(shmobile_boot_vector)
|
||||
ldr r0, 2f
|
||||
ldr r1, 1f
|
||||
bx r1
|
||||
|
||||
@ -34,9 +33,6 @@ ENDPROC(shmobile_boot_vector)
|
||||
.globl shmobile_boot_fn
|
||||
shmobile_boot_fn:
|
||||
1: .space 4
|
||||
.globl shmobile_boot_arg
|
||||
shmobile_boot_arg:
|
||||
2: .space 4
|
||||
.globl shmobile_boot_size
|
||||
shmobile_boot_size:
|
||||
.long . - shmobile_boot_vector
|
||||
@ -46,13 +42,15 @@ shmobile_boot_size:
|
||||
*/
|
||||
|
||||
ENTRY(shmobile_smp_boot)
|
||||
@ r0 = MPIDR_HWID_BITMASK
|
||||
mrc p15, 0, r1, c0, c0, 5 @ r1 = MPIDR
|
||||
and r0, r1, r0 @ r0 = cpu_logical_map() value
|
||||
and r0, r1, #0xffffff @ MPIDR_HWID_BITMASK
|
||||
@ r0 = cpu_logical_map() value
|
||||
mov r1, #0 @ r1 = CPU index
|
||||
adr r5, 1f @ array of per-cpu mpidr values
|
||||
adr r6, 2f @ array of per-cpu functions
|
||||
adr r7, 3f @ array of per-cpu arguments
|
||||
adr r2, 1f
|
||||
ldmia r2, {r5, r6, r7}
|
||||
add r5, r5, r2 @ array of per-cpu mpidr values
|
||||
add r6, r6, r2 @ array of per-cpu functions
|
||||
add r7, r7, r2 @ array of per-cpu arguments
|
||||
|
||||
shmobile_smp_boot_find_mpidr:
|
||||
ldr r8, [r5, r1, lsl #2]
|
||||
@ -80,12 +78,18 @@ ENTRY(shmobile_smp_sleep)
|
||||
b shmobile_smp_boot
|
||||
ENDPROC(shmobile_smp_sleep)
|
||||
|
||||
.align 2
|
||||
1: .long shmobile_smp_mpidr - .
|
||||
.long shmobile_smp_fn - 1b
|
||||
.long shmobile_smp_arg - 1b
|
||||
|
||||
.bss
|
||||
.globl shmobile_smp_mpidr
|
||||
shmobile_smp_mpidr:
|
||||
1: .space NR_CPUS * 4
|
||||
.space NR_CPUS * 4
|
||||
.globl shmobile_smp_fn
|
||||
shmobile_smp_fn:
|
||||
2: .space NR_CPUS * 4
|
||||
.space NR_CPUS * 4
|
||||
.globl shmobile_smp_arg
|
||||
shmobile_smp_arg:
|
||||
3: .space NR_CPUS * 4
|
||||
.space NR_CPUS * 4
|
||||
|
||||
@ -123,7 +123,6 @@ void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
|
||||
{
|
||||
/* install boot code shared by all CPUs */
|
||||
shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
|
||||
shmobile_boot_arg = MPIDR_HWID_BITMASK;
|
||||
|
||||
/* perform per-cpu setup */
|
||||
apmu_parse_cfg(apmu_init_cpu, apmu_config, num);
|
||||
|
||||
@ -17,6 +17,9 @@
|
||||
#include <asm/smp_scu.h>
|
||||
#include "common.h"
|
||||
|
||||
|
||||
void __iomem *shmobile_scu_base;
|
||||
|
||||
static int shmobile_smp_scu_notifier_call(struct notifier_block *nfb,
|
||||
unsigned long action, void *hcpu)
|
||||
{
|
||||
@ -41,7 +44,6 @@ void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus)
|
||||
{
|
||||
/* install boot code shared by all CPUs */
|
||||
shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
|
||||
shmobile_boot_arg = MPIDR_HWID_BITMASK;
|
||||
|
||||
/* enable SCU and cache coherency on booting CPU */
|
||||
scu_enable(shmobile_scu_base);
|
||||
|
||||
@ -92,8 +92,6 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
|
||||
{
|
||||
/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
|
||||
__raw_writel(__pa(shmobile_boot_vector), AVECR);
|
||||
shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
|
||||
shmobile_boot_arg = (unsigned long)shmobile_scu_base;
|
||||
|
||||
/* setup r8a7779 specific SCU bits */
|
||||
shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user