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drm/nouveau/disp: move link training out of supervisor
- preparation for GSP-RM Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Acked-by: Danilo Krummrich <me@dakr.org> Signed-off-by: Lyude Paul <lyude@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230919220442.202488-34-lyude@redhat.com
This commit is contained in:
Ben Skeggs
Lyude Paul
parent
633716501c
commit
3147ce0d07
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@ -35,6 +35,7 @@ union nvif_outp_args {
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#define NVIF_OUTP_V0_DP_AUX_XFER 0x71
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#define NVIF_OUTP_V0_DP_RATES 0x72
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#define NVIF_OUTP_V0_DP_TRAIN 0x73
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#define NVIF_OUTP_V0_DP_DRIVE 0x74
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#define NVIF_OUTP_V0_DP_MST_VCPI 0x78
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union nvif_outp_detect_args {
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@ -211,6 +212,16 @@ union nvif_outp_dp_train_args {
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} v0;
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};
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union nvif_outp_dp_drive_args {
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struct nvif_outp_dp_drive_v0 {
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__u8 version;
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__u8 pad01[2];
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__u8 lanes;
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__u8 pe[4];
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__u8 vs[4];
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} v0;
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};
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union nvif_outp_dp_mst_vcpi_args {
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struct nvif_outp_dp_mst_vcpi_v0 {
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__u8 version;
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@ -67,6 +67,7 @@ int nvif_outp_dp_rates(struct nvif_outp *, struct nvif_outp_dp_rate *rate, int r
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int nvif_outp_dp_train(struct nvif_outp *, u8 dpcd[DP_RECEIVER_CAP_SIZE],
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u8 lttprs, u8 link_nr, u32 link_bw, bool mst, bool post_lt_adj,
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bool retrain);
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int nvif_outp_dp_drive(struct nvif_outp *, u8 link_nr, u8 pe[4], u8 vs[4]);
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int nvif_outp_dp_mst_vcpi(struct nvif_outp *, int head,
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u8 start_slot, u8 num_slots, u16 pbn, u16 aligned_pbn);
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#endif
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@ -320,15 +320,83 @@ nouveau_dp_power_down(struct nouveau_encoder *outp)
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static bool
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nouveau_dp_train_link(struct nouveau_encoder *outp, bool retrain)
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{
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int ret;
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struct drm_dp_aux *aux = &outp->conn->aux;
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bool post_lt = false;
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int ret, retries = 0;
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if ( (outp->dp.dpcd[DP_MAX_LANE_COUNT] & 0x20) &&
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!(outp->dp.dpcd[DP_MAX_DOWNSPREAD] & DP_TPS4_SUPPORTED))
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post_lt = true;
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retry:
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ret = nvif_outp_dp_train(&outp->outp, outp->dp.dpcd,
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outp->dp.lttpr.nr,
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outp->dp.lt.nr,
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outp->dp.lt.bw,
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outp->dp.lt.mst,
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false,
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post_lt,
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retrain);
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if (ret)
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return false;
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if (post_lt) {
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u8 stat[DP_LINK_STATUS_SIZE];
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u8 prev[2];
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u8 time = 0, adjusts = 0, tmp;
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ret = drm_dp_dpcd_read_phy_link_status(aux, DP_PHY_DPRX, stat);
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if (ret)
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return false;
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for (;;) {
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if (!drm_dp_channel_eq_ok(stat, outp->dp.lt.nr)) {
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ret = 1;
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break;
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}
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if (!(stat[2] & 0x02))
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break;
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msleep(5);
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time += 5;
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memcpy(prev, &stat[4], sizeof(prev));
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ret = drm_dp_dpcd_read_phy_link_status(aux, DP_PHY_DPRX, stat);
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if (ret)
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break;
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if (!memcmp(prev, &stat[4], sizeof(prev))) {
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if (time > 200)
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break;
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} else {
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u8 pe[4], vs[4];
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if (adjusts++ == 6)
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break;
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for (int i = 0; i < outp->dp.lt.nr; i++) {
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pe[i] = drm_dp_get_adjust_request_pre_emphasis(stat, i) >>
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DP_TRAIN_PRE_EMPHASIS_SHIFT;
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vs[i] = drm_dp_get_adjust_request_voltage(stat, i) >>
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DP_TRAIN_VOLTAGE_SWING_SHIFT;
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}
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ret = nvif_outp_dp_drive(&outp->outp, outp->dp.lt.nr, pe, vs);
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if (ret)
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break;
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time = 0;
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}
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}
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if (drm_dp_dpcd_readb(aux, DP_LANE_COUNT_SET, &tmp) == 1) {
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tmp &= ~0x20;
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drm_dp_dpcd_writeb(aux, DP_LANE_COUNT_SET, tmp);
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}
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}
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if (ret == 1 && retries++ < 3)
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goto retry;
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return ret == 0;
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}
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@ -336,15 +404,44 @@ nouveau_dp_train_link(struct nouveau_encoder *outp, bool retrain)
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bool
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nouveau_dp_train(struct nouveau_encoder *outp, bool mst, u32 khz, u8 bpc)
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{
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bool ret;
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struct nouveau_drm *drm = nouveau_drm(outp->base.base.dev);
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struct drm_dp_aux *aux = &outp->conn->aux;
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u32 min_rate;
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u8 pwr;
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bool ret = true;
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if (mst)
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min_rate = outp->dp.link_nr * outp->dp.rate[0].rate;
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else
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min_rate = DIV_ROUND_UP(khz * bpc * 3, 8);
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NV_DEBUG(drm, "%s link training (mst:%d min_rate:%d)\n",
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outp->base.base.name, mst, min_rate);
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mutex_lock(&outp->dp.hpd_irq_lock);
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outp->dp.lt.nr = outp->dp.link_nr;
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outp->dp.lt.bw = 0;
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outp->dp.lt.mst = mst;
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ret = nouveau_dp_train_link(outp, false);
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if (drm_dp_dpcd_readb(aux, DP_SET_POWER, &pwr) == 1) {
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if ((pwr & DP_SET_POWER_MASK) != DP_SET_POWER_D0) {
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pwr &= ~DP_SET_POWER_MASK;
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pwr |= DP_SET_POWER_D0;
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drm_dp_dpcd_writeb(aux, DP_SET_POWER, pwr);
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}
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}
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for (int nr = outp->dp.link_nr; nr; nr >>= 1) {
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for (int rate = 0; rate < outp->dp.rate_nr; rate++) {
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if (outp->dp.rate[rate].rate * nr >= min_rate) {
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outp->dp.lt.nr = nr;
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outp->dp.lt.bw = outp->dp.rate[rate].rate;
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outp->dp.lt.mst = mst;
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if (nouveau_dp_train_link(outp, false))
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goto done;
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}
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}
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}
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ret = false;
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done:
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mutex_unlock(&outp->dp.hpd_irq_lock);
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return ret;
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}
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@ -352,6 +449,17 @@ nouveau_dp_train(struct nouveau_encoder *outp, bool mst, u32 khz, u8 bpc)
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static bool
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nouveau_dp_link_check_locked(struct nouveau_encoder *outp)
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{
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u8 link_status[DP_LINK_STATUS_SIZE];
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if (!outp || !outp->dp.lt.nr)
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return true;
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if (drm_dp_dpcd_read_phy_link_status(&outp->conn->aux, DP_PHY_DPRX, link_status) < 0)
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return false;
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if (drm_dp_channel_eq_ok(link_status, outp->dp.lt.nr))
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return true;
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return nouveau_dp_train_link(outp, true);
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}
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@ -46,6 +46,22 @@ nvif_outp_dp_mst_vcpi(struct nvif_outp *outp, int head,
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return ret;
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}
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int
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nvif_outp_dp_drive(struct nvif_outp *outp, u8 link_nr, u8 pe[4], u8 vs[4])
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{
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struct nvif_outp_dp_drive_v0 args;
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int ret;
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args.version = 0;
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args.lanes = link_nr;
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memcpy(args.pe, pe, sizeof(args.pe));
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memcpy(args.vs, vs, sizeof(args.vs));
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ret = nvif_object_mthd(&outp->object, NVIF_OUTP_V0_DP_DRIVE, &args, sizeof(args));
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NVIF_ERRON(ret, &outp->object, "[DP_DRIVE lanes:%d]", args.lanes);
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return ret;
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}
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int
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nvif_outp_dp_train(struct nvif_outp *outp, u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 lttprs,
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u8 link_nr, u32 link_bw, bool mst, bool post_lt_adj, bool retrain)
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@ -315,6 +315,8 @@ nvkm_dp_train_link(struct nvkm_outp *outp, int rate)
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sink[1] = ior->dp.nr;
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if (ior->dp.ef)
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sink[1] |= DPCD_LC01_ENHANCED_FRAME_EN;
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if (outp->dp.lt.post_adj)
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sink[1] |= 0x20;
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ret = nvkm_wraux(outp->dp.aux, DPCD_LC00_LINK_BW_SET, sink, 2);
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if (ret)
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@ -455,71 +457,58 @@ nvkm_dp_train_init(struct nvkm_outp *outp)
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}
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static int
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nvkm_dp_train_(struct nvkm_outp *outp, bool retrain)
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nvkm_dp_drive(struct nvkm_outp *outp, u8 lanes, u8 pe[4], u8 vs[4])
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{
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if (retrain) {
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if (!atomic_read(&outp->dp.lt.done))
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return 0;
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struct lt_state lt = {
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.outp = outp,
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.stat[4] = (pe[0] << 2) | (vs[0] << 0) |
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(pe[1] << 6) | (vs[1] << 4),
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.stat[5] = (pe[2] << 2) | (vs[2] << 0) |
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(pe[3] << 6) | (vs[3] << 4),
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};
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return outp->func->acquire(outp);
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}
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return 0;
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return nvkm_dp_train_drive(<, false);
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}
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static int
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nvkm_dp_train(struct nvkm_outp *outp, u32 dataKBps)
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nvkm_dp_train(struct nvkm_outp *outp, bool retrain)
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{
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struct nvkm_ior *ior = outp->ior;
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int ret = -EINVAL, nr, rate;
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u8 pwr;
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int ret, rate;
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for (rate = 0; rate < outp->dp.rates; rate++) {
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if (outp->dp.rate[rate].rate == (retrain ? ior->dp.bw : outp->dp.lt.bw) * 27000)
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break;
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}
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if (WARN_ON(rate == outp->dp.rates))
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return -EINVAL;
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/* Retraining link? Skip source configuration, it can mess up the active modeset. */
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if (atomic_read(&outp->dp.lt.done)) {
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for (rate = 0; rate < outp->dp.rates; rate++) {
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if (outp->dp.rate[rate].rate == ior->dp.bw * 27000)
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return nvkm_dp_train_link(outp, ret);
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}
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WARN_ON(1);
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return -EINVAL;
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if (retrain) {
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mutex_lock(&outp->dp.mutex);
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ret = nvkm_dp_train_link(outp, rate);
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mutex_unlock(&outp->dp.mutex);
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return ret;
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}
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/* Ensure sink is not in a low-power state. */
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if (!nvkm_rdaux(outp->dp.aux, DPCD_SC00, &pwr, 1)) {
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if ((pwr & DPCD_SC00_SET_POWER) != DPCD_SC00_SET_POWER_D0) {
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pwr &= ~DPCD_SC00_SET_POWER;
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pwr |= DPCD_SC00_SET_POWER_D0;
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nvkm_wraux(outp->dp.aux, DPCD_SC00, &pwr, 1);
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}
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}
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mutex_lock(&outp->dp.mutex);
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OUTP_DBG(outp, "training");
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ior->dp.mst = outp->dp.lt.mst;
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ior->dp.ef = outp->dp.dpcd[DPCD_RC02] & DPCD_RC02_ENHANCED_FRAME_CAP;
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ior->dp.nr = 0;
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ior->dp.bw = outp->dp.lt.bw;
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ior->dp.nr = outp->dp.lt.nr;
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/* Link training. */
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OUTP_DBG(outp, "training");
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nvkm_dp_train_init(outp);
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/* Otherwise, loop through all valid link configurations that support the data rate. */
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for (nr = outp->dp.links; ret < 0 && nr; nr >>= 1) {
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for (rate = 0; ret < 0 && rate < outp->dp.rates; rate++) {
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if (outp->dp.rate[rate].rate * nr >= dataKBps || WARN_ON(!ior->dp.nr)) {
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/* Program selected link configuration. */
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ior->dp.bw = outp->dp.rate[rate].rate / 27000;
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ior->dp.nr = nr;
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ret = nvkm_dp_train_links(outp, rate);
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}
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}
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}
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/* Finish up. */
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ret = nvkm_dp_train_links(outp, rate);
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nvkm_dp_train_fini(outp);
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if (ret < 0)
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OUTP_ERR(outp, "training failed");
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else
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OUTP_DBG(outp, "training done");
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atomic_set(&outp->dp.lt.done, 1);
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mutex_unlock(&outp->dp.mutex);
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return ret;
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}
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@ -537,69 +526,10 @@ nvkm_dp_disable(struct nvkm_outp *outp, struct nvkm_ior *ior)
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static void
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nvkm_dp_release(struct nvkm_outp *outp)
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{
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/* Prevent link from being retrained if sink sends an IRQ. */
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atomic_set(&outp->dp.lt.done, 0);
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outp->ior->dp.nr = 0;
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}
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nvkm_dp_disable(outp, outp->ior);
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static int
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nvkm_dp_acquire(struct nvkm_outp *outp)
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{
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struct nvkm_ior *ior = outp->ior;
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struct nvkm_head *head;
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bool retrain = true;
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u32 datakbps = 0;
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u32 dataKBps;
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u32 linkKBps;
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u8 stat[3];
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int ret, i;
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mutex_lock(&outp->dp.mutex);
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/* Check that link configuration meets current requirements. */
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list_for_each_entry(head, &outp->disp->heads, head) {
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if (ior->asy.head & (1 << head->id)) {
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u32 khz = (head->asy.hz >> ior->asy.rgdiv) / 1000;
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datakbps += khz * head->asy.or.depth;
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}
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}
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linkKBps = ior->dp.bw * 27000 * ior->dp.nr;
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dataKBps = DIV_ROUND_UP(datakbps, 8);
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OUTP_DBG(outp, "data %d KB/s link %d KB/s mst %d->%d",
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dataKBps, linkKBps, ior->dp.mst, outp->dp.lt.mst);
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if (linkKBps < dataKBps || ior->dp.mst != outp->dp.lt.mst) {
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OUTP_DBG(outp, "link requirements changed");
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goto done;
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}
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/* Check that link is still trained. */
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ret = nvkm_rdaux(outp->dp.aux, DPCD_LS02, stat, 3);
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if (ret) {
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OUTP_DBG(outp, "failed to read link status, assuming no sink");
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goto done;
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}
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if (stat[2] & DPCD_LS04_INTERLANE_ALIGN_DONE) {
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for (i = 0; i < ior->dp.nr; i++) {
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u8 lane = (stat[i >> 1] >> ((i & 1) * 4)) & 0x0f;
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if (!(lane & DPCD_LS02_LANE0_CR_DONE) ||
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!(lane & DPCD_LS02_LANE0_CHANNEL_EQ_DONE) ||
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!(lane & DPCD_LS02_LANE0_SYMBOL_LOCKED)) {
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OUTP_DBG(outp, "lane %d not equalised", lane);
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goto done;
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}
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}
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retrain = false;
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} else {
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OUTP_DBG(outp, "no inter-lane alignment");
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}
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done:
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if (retrain || !atomic_read(&outp->dp.lt.done))
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ret = nvkm_dp_train(outp, dataKBps);
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mutex_unlock(&outp->dp.mutex);
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return ret;
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nvkm_outp_release(outp);
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}
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void
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@ -638,7 +568,6 @@ nvkm_dp_enable(struct nvkm_outp *outp, bool auxpwr)
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OUTP_DBG(outp, "aux power -> demand");
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nvkm_i2c_aux_monitor(aux, false);
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outp->dp.aux_pwr = false;
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atomic_set(&outp->dp.lt.done, 0);
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/* Restore eDP panel GPIO to its prior state if we changed it, as
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* it could potentially interfere with other outputs.
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@ -677,14 +606,14 @@ nvkm_dp_func = {
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.fini = nvkm_dp_fini,
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.detect = nvkm_outp_detect,
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.inherit = nvkm_outp_inherit,
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.acquire = nvkm_dp_acquire,
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.acquire = nvkm_outp_acquire,
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.release = nvkm_dp_release,
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.disable = nvkm_dp_disable,
|
||||
.bl.get = nvkm_outp_bl_get,
|
||||
.bl.set = nvkm_outp_bl_set,
|
||||
.dp.aux_pwr = nvkm_dp_aux_pwr,
|
||||
.dp.aux_xfer = nvkm_dp_aux_xfer,
|
||||
.dp.train = nvkm_dp_train_,
|
||||
.dp.train = nvkm_dp_train,
|
||||
.dp.drive = nvkm_dp_drive,
|
||||
};
|
||||
|
||||
int
|
||||
|
|
@ -723,6 +652,5 @@ nvkm_dp_new(struct nvkm_disp *disp, int index, struct dcb_output *dcbE, struct n
|
|||
OUTP_DBG(outp, "bios dp %02x %02x %02x %02x", outp->dp.version, hdr, cnt, len);
|
||||
|
||||
mutex_init(&outp->dp.mutex);
|
||||
atomic_set(&outp->dp.lt.done, 0);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1286,10 +1286,6 @@ nv50_disp_super_2_2(struct nvkm_disp *disp, struct nvkm_head *head)
|
|||
ior->asy.link = outp->lvds.dual ? 3 : 1;
|
||||
}
|
||||
|
||||
/* Handle any link training, etc. */
|
||||
if (outp && outp->func->acquire)
|
||||
outp->func->acquire(outp);
|
||||
|
||||
/* Execute OnInt2 IED script. */
|
||||
nv50_disp_super_ied_on(head, ior, 0, khz);
|
||||
|
||||
|
|
@ -1319,7 +1315,6 @@ nv50_disp_super_2_1(struct nvkm_disp *disp, struct nvkm_head *head)
|
|||
void
|
||||
nv50_disp_super_2_0(struct nvkm_disp *disp, struct nvkm_head *head)
|
||||
{
|
||||
struct nvkm_outp *outp;
|
||||
struct nvkm_ior *ior;
|
||||
|
||||
/* Determine which OR, if any, we're detaching from the head. */
|
||||
|
|
@ -1330,14 +1325,6 @@ nv50_disp_super_2_0(struct nvkm_disp *disp, struct nvkm_head *head)
|
|||
|
||||
/* Execute OffInt2 IED script. */
|
||||
nv50_disp_super_ied_off(head, ior, 2);
|
||||
|
||||
/* If we're shutting down the OR's only active head, execute
|
||||
* the output path's disable function.
|
||||
*/
|
||||
if (ior->arm.head == (1 << head->id)) {
|
||||
if ((outp = ior->arm.outp) && outp->func->disable)
|
||||
outp->func->disable(outp, ior);
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@
|
|||
#include <subdev/gpio.h>
|
||||
#include <subdev/i2c.h>
|
||||
|
||||
void
|
||||
static void
|
||||
nvkm_outp_route(struct nvkm_disp *disp)
|
||||
{
|
||||
struct nvkm_outp *outp;
|
||||
|
|
@ -96,8 +96,6 @@ nvkm_outp_release_or(struct nvkm_outp *outp, u8 user)
|
|||
if (ior) {
|
||||
outp->acquired &= ~user;
|
||||
if (!outp->acquired) {
|
||||
if (outp->func->release && outp->ior)
|
||||
outp->func->release(outp);
|
||||
outp->ior->asy.outp = NULL;
|
||||
outp->ior = NULL;
|
||||
}
|
||||
|
|
@ -277,6 +275,18 @@ nvkm_outp_release(struct nvkm_outp *outp)
|
|||
nvkm_outp_route(outp->disp);
|
||||
}
|
||||
|
||||
int
|
||||
nvkm_outp_acquire(struct nvkm_outp *outp, bool hda)
|
||||
{
|
||||
int ret = nvkm_outp_acquire_or(outp, NVKM_OUTP_USER, hda);
|
||||
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
nvkm_outp_route(outp->disp);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
nvkm_outp_fini(struct nvkm_outp *outp)
|
||||
{
|
||||
|
|
@ -412,6 +422,8 @@ static const struct nvkm_outp_func
|
|||
nvkm_outp = {
|
||||
.detect = nvkm_outp_detect,
|
||||
.inherit = nvkm_outp_inherit,
|
||||
.acquire = nvkm_outp_acquire,
|
||||
.release = nvkm_outp_release,
|
||||
.bl.get = nvkm_outp_bl_get,
|
||||
.bl.set = nvkm_outp_bl_set,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -50,11 +50,9 @@ struct nvkm_outp {
|
|||
u32 rate;
|
||||
} rate[8];
|
||||
int rates;
|
||||
int links;
|
||||
|
||||
struct mutex mutex;
|
||||
struct {
|
||||
atomic_t done;
|
||||
u8 nr;
|
||||
u8 bw;
|
||||
bool mst;
|
||||
|
|
@ -79,11 +77,11 @@ void nvkm_outp_fini(struct nvkm_outp *);
|
|||
int nvkm_outp_detect(struct nvkm_outp *);
|
||||
|
||||
struct nvkm_ior *nvkm_outp_inherit(struct nvkm_outp *);
|
||||
int nvkm_outp_acquire(struct nvkm_outp *, bool hda);
|
||||
int nvkm_outp_acquire_or(struct nvkm_outp *, u8 user, bool hda);
|
||||
int nvkm_outp_acquire_ior(struct nvkm_outp *, u8 user, struct nvkm_ior *);
|
||||
void nvkm_outp_release(struct nvkm_outp *);
|
||||
void nvkm_outp_release_or(struct nvkm_outp *, u8 user);
|
||||
void nvkm_outp_route(struct nvkm_disp *);
|
||||
|
||||
int nvkm_outp_bl_get(struct nvkm_outp *);
|
||||
int nvkm_outp_bl_set(struct nvkm_outp *, int level);
|
||||
|
|
@ -97,9 +95,8 @@ struct nvkm_outp_func {
|
|||
int (*edid_get)(struct nvkm_outp *, u8 *data, u16 *size);
|
||||
|
||||
struct nvkm_ior *(*inherit)(struct nvkm_outp *);
|
||||
int (*acquire)(struct nvkm_outp *);
|
||||
int (*acquire)(struct nvkm_outp *, bool hda);
|
||||
void (*release)(struct nvkm_outp *);
|
||||
void (*disable)(struct nvkm_outp *, struct nvkm_ior *);
|
||||
|
||||
struct {
|
||||
int (*get)(struct nvkm_outp *);
|
||||
|
|
@ -111,6 +108,7 @@ struct nvkm_outp_func {
|
|||
int (*aux_xfer)(struct nvkm_outp *, u8 type, u32 addr, u8 *data, u8 *size);
|
||||
int (*rates)(struct nvkm_outp *);
|
||||
int (*train)(struct nvkm_outp *, bool retrain);
|
||||
int (*drive)(struct nvkm_outp *, u8 lanes, u8 pe[4], u8 vs[4]);
|
||||
} dp;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -45,6 +45,19 @@ nvkm_uoutp_mthd_dp_mst_vcpi(struct nvkm_outp *outp, void *argv, u32 argc)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
nvkm_uoutp_mthd_dp_drive(struct nvkm_outp *outp, void *argv, u32 argc)
|
||||
{
|
||||
union nvif_outp_dp_drive_args *args = argv;
|
||||
|
||||
if (argc != sizeof(args->v0) || args->v0.version != 0)
|
||||
return -ENOSYS;
|
||||
if (!outp->func->dp.drive)
|
||||
return -EINVAL;
|
||||
|
||||
return outp->func->dp.drive(outp, args->v0.lanes, args->v0.pe, args->v0.vs);
|
||||
}
|
||||
|
||||
static int
|
||||
nvkm_uoutp_mthd_dp_train(struct nvkm_outp *outp, void *argv, u32 argc)
|
||||
{
|
||||
|
|
@ -58,9 +71,8 @@ nvkm_uoutp_mthd_dp_train(struct nvkm_outp *outp, void *argv, u32 argc)
|
|||
if (!args->v0.retrain) {
|
||||
memcpy(outp->dp.dpcd, args->v0.dpcd, sizeof(outp->dp.dpcd));
|
||||
outp->dp.lttprs = args->v0.lttprs;
|
||||
outp->dp.links = args->v0.link_nr;
|
||||
outp->dp.lt.nr = 0;
|
||||
outp->dp.lt.bw = 0;
|
||||
outp->dp.lt.nr = args->v0.link_nr;
|
||||
outp->dp.lt.bw = args->v0.link_bw / 27000;
|
||||
outp->dp.lt.mst = args->v0.mst;
|
||||
outp->dp.lt.post_adj = args->v0.post_lt_adj;
|
||||
}
|
||||
|
|
@ -279,7 +291,7 @@ nvkm_uoutp_mthd_release(struct nvkm_outp *outp, void *argv, u32 argc)
|
|||
if (!outp->ior)
|
||||
return -EINVAL;
|
||||
|
||||
nvkm_outp_release(outp);
|
||||
outp->func->release(outp);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -297,10 +309,10 @@ nvkm_uoutp_mthd_acquire(struct nvkm_outp *outp, void *argv, u32 argc)
|
|||
switch (args->v0.type) {
|
||||
case NVIF_OUTP_ACQUIRE_V0_DAC:
|
||||
case NVIF_OUTP_ACQUIRE_V0_PIOR:
|
||||
ret = nvkm_outp_acquire_or(outp, NVKM_OUTP_USER, false);
|
||||
ret = outp->func->acquire(outp, false);
|
||||
break;
|
||||
case NVIF_OUTP_ACQUIRE_V0_SOR:
|
||||
ret = nvkm_outp_acquire_or(outp, NVKM_OUTP_USER, args->v0.sor.hda);
|
||||
ret = outp->func->acquire(outp, args->v0.sor.hda);
|
||||
break;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
|
|
@ -310,8 +322,6 @@ nvkm_uoutp_mthd_acquire(struct nvkm_outp *outp, void *argv, u32 argc)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
nvkm_outp_route(outp->disp);
|
||||
|
||||
args->v0.or = outp->ior->id;
|
||||
args->v0.link = outp->ior->asy.link;
|
||||
return 0;
|
||||
|
|
@ -450,6 +460,7 @@ nvkm_uoutp_mthd_acquired(struct nvkm_outp *outp, u32 mthd, void *argv, u32 argc)
|
|||
case NVIF_OUTP_V0_INFOFRAME : return nvkm_uoutp_mthd_infoframe (outp, argv, argc);
|
||||
case NVIF_OUTP_V0_HDA_ELD : return nvkm_uoutp_mthd_hda_eld (outp, argv, argc);
|
||||
case NVIF_OUTP_V0_DP_TRAIN : return nvkm_uoutp_mthd_dp_train (outp, argv, argc);
|
||||
case NVIF_OUTP_V0_DP_DRIVE : return nvkm_uoutp_mthd_dp_drive (outp, argv, argc);
|
||||
case NVIF_OUTP_V0_DP_MST_VCPI : return nvkm_uoutp_mthd_dp_mst_vcpi (outp, argv, argc);
|
||||
default:
|
||||
break;
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user