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ARM: SoC fixes for 3.4-rc2

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A bunch of fixes for regressions (and a few other problems) in 3.4-rc1:
 
 * Fix for regression of mach/io.h cleanup on platforms with PCI or PCMCIA
   (adding back the include file on those for now)
 * AT91 fixes for usb and spi
 * smsc911x ethernet fixes for i.MX
 * smsc911x fixes for OMAP
 * gpio fixes for Tegra
 * A handful of build error and warning fixes for various platforms
 * cpufreq kconfig dependencies, build and lowlevel debug fixes for
   Samsung platforms
 
 In other words, more or less the regular collection of -rc1/2 type
 material. A few of them, in particular the smsc911x for OMAP series, aren't
 technically regressions for 3.4, but they're valid fixes and we're still
 relatively early in the rc cycle so it seems appropriate to include them.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull "ARM: SoC fixes: from Olof Johansson:
 "A bunch of fixes for regressions (and a few other problems) in
  3.4-rc1:

 - Fix for regression of mach/io.h cleanup on platforms with PCI or
   PCMCIA (adding back the include file on those for now)
 - AT91 fixes for usb and spi
 - smsc911x ethernet fixes for i.MX
 - smsc911x fixes for OMAP
 - gpio fixes for Tegra
 - A handful of build error and warning fixes for various platforms
 - cpufreq kconfig dependencies, build and lowlevel debug fixes for
   Samsung platforms

  In other words, more or less the regular collection of -rc1/2 type
  material.  A few of them, in particular the smsc911x for OMAP series,
  aren't technically regressions for 3.4, but they're valid fixes and
  we're still relatively early in the rc cycle so it seems appropriate
  to include them."

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (60 commits)
  ARM: fix __io macro for PCMCIA
  ARM: EXYNOS: Fix compiler warning in dma.c file
  ARM: EXYNOS: fix ISO C90 warning
  ARM: OMAP2+: hwmod: Fix wrong SYSC_TYPE1_XXX_MASK bit definitions
  ARM: OMAP2+: hwmod: Make omap_hwmod_softreset wait for reset status
  ARM: OMAP2+: hwmod: Restore sysc after a reset
  ARM: OMAP2+: omap_hwmod: Allow io_ring wakeup configuration for all modules
  ARM: OMAP3: clock data: fill in some missing clockdomains
  ARM: OMAP4: clock data: Force a DPLL clkdm/pwrdm ON before a relock
  ARM: OMAP4: clock data: fix mult and div mask for USB_DPLL
  ARM: OMAP2+: powerdomain: Wait for powerdomain transition in pwrdm_state_switch()
  gpio: tegra: Iterate over the correct number of banks
  gpio: tegra: fix register address calculations for Tegra30
  EXYNOS: fix dependency for EXYNOS_CPUFREQ
  ARM: at91: dt: remove unit-address part for memory nodes
  ARM: at91: fix check of valid GPIO for SPI and USB
  USB: ehci-atmel: add needed of.h header file
  ARM: at91/NAND DT bindings: add comments
  ARM: at91/at91sam9x5.dtsi: fix NAND ale/cle in DT file
  USB: ohci-at91: trivial return code name change
  ...
This commit is contained in:
Linus Torvalds 2012-04-05 22:13:39 -07:00
commit 314489bd4c
71 changed files with 603 additions and 342 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
Documentation/devicetree/bindings/mtd/atmel-nand.txt
View File

@ -27,13 +27,13 @@ nand0: nand@40000000,0 {
reg = <0x40000000 0x10000000
0xffffe800 0x200
>;
atmel,nand-addr-offset = <21>;
atmel,nand-cmd-offset = <22>;
atmel,nand-addr-offset = <21>; /* ale */
atmel,nand-cmd-offset = <22>; /* cle */
nand-on-flash-bbt;
nand-ecc-mode = "soft";
gpios = <&pioC 13 0
&pioC 14 0
0
gpios = <&pioC 13 0 /* rdy */
&pioC 14 0 /* nce */
0 /* cd */
>;
partition@0 {
...

1
arch/arm/Kconfig
View File

@ -338,6 +338,7 @@ config ARCH_AT91
select HAVE_CLK
select CLKDEV_LOOKUP
select IRQ_DOMAIN
select NEED_MACH_IO_H if PCCARD
help
This enables support for systems based on the Atmel AT91RM9200,
AT91SAM9 processors.

2
arch/arm/boot/dts/at91sam9g20.dtsi
View File

@ -35,7 +35,7 @@
};
};
memory@20000000 {
memory {
reg = <0x20000000 0x08000000>;
};

4
arch/arm/boot/dts/at91sam9g25ek.dts
View File

@ -37,8 +37,8 @@
usb0: ohci@00600000 {
status = "okay";
num-ports = <2>;
atmel,vbus-gpio = <&pioD 19 0
&pioD 20 0
atmel,vbus-gpio = <&pioD 19 1
&pioD 20 1
>;
};

2
arch/arm/boot/dts/at91sam9g45.dtsi
View File

@ -36,7 +36,7 @@
};
};
memory@70000000 {
memory {
reg = <0x70000000 0x10000000>;
};

6
arch/arm/boot/dts/at91sam9m10g45ek.dts
View File

@ -17,7 +17,7 @@
bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";
};
memory@70000000 {
memory {
reg = <0x70000000 0x4000000>;
};
@ -73,8 +73,8 @@
usb0: ohci@00700000 {
status = "okay";
num-ports = <2>;
atmel,vbus-gpio = <&pioD 1 0
&pioD 3 0>;
atmel,vbus-gpio = <&pioD 1 1
&pioD 3 1>;
};
usb1: ehci@00800000 {

6
arch/arm/boot/dts/at91sam9x5.dtsi
View File

@ -34,7 +34,7 @@
};
};
memory@20000000 {
memory {
reg = <0x20000000 0x10000000>;
};
@ -201,8 +201,8 @@
>;
atmel,nand-addr-offset = <21>;
atmel,nand-cmd-offset = <22>;
gpios = <&pioC 8 0
&pioC 14 0
gpios = <&pioD 5 0
&pioD 4 0
0
>;
status = "disabled";

2
arch/arm/boot/dts/at91sam9x5cm.dtsi
View File

@ -8,7 +8,7 @@
*/
/ {
memory@20000000 {
memory {
reg = <0x20000000 0x8000000>;
};

2
arch/arm/boot/dts/usb_a9g20.dts
View File

@ -16,7 +16,7 @@
bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
};
memory@20000000 {
memory {
reg = <0x20000000 0x4000000>;
};

2
arch/arm/include/asm/barrier.h
View File

@ -2,6 +2,7 @@
#define __ASM_BARRIER_H
#ifndef __ASSEMBLY__
#include <asm/outercache.h>
#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
@ -39,7 +40,6 @@
#ifdef CONFIG_ARCH_HAS_BARRIERS
#include <mach/barriers.h>
#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
#include <asm/outercache.h>
#define mb() do { dsb(); outer_sync(); } while (0)
#define rmb() dsb()
#define wmb() mb()

2
arch/arm/include/asm/io.h
View File

@ -119,7 +119,7 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
#ifdef CONFIG_NEED_MACH_IO_H
#include <mach/io.h>
#else
#define __io(a) ({ (void)(a); __typesafe_io(0); })
#define __io(a) __typesafe_io((a) & IO_SPACE_LIMIT)
#endif
/*

3
arch/arm/mach-at91/at91sam9260_devices.c
View File

@ -598,6 +598,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
else
cs_pin = spi1_standard_cs[devices[i].chip_select];
if (!gpio_is_valid(cs_pin))
continue;
if (devices[i].bus_num == 0)
enable_spi0 = 1;
else

3
arch/arm/mach-at91/at91sam9261_devices.c
View File

@ -415,6 +415,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
else
cs_pin = spi1_standard_cs[devices[i].chip_select];
if (!gpio_is_valid(cs_pin))
continue;
if (devices[i].bus_num == 0)
enable_spi0 = 1;
else

6
arch/arm/mach-at91/at91sam9263_devices.c
View File

@ -72,7 +72,8 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
/* Enable VBus control for UHP ports */
for (i = 0; i < data->ports; i++) {
if (gpio_is_valid(data->vbus_pin[i]))
at91_set_gpio_output(data->vbus_pin[i], 0);
at91_set_gpio_output(data->vbus_pin[i],
data->vbus_pin_active_low[i]);
}
/* Enable overcurrent notification */
@ -671,6 +672,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
else
cs_pin = spi1_standard_cs[devices[i].chip_select];
if (!gpio_is_valid(cs_pin))
continue;
if (devices[i].bus_num == 0)
enable_spi0 = 1;
else

11
arch/arm/mach-at91/at91sam9g45_devices.c
View File

@ -127,12 +127,13 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
/* Enable VBus control for UHP ports */
for (i = 0; i < data->ports; i++) {
if (gpio_is_valid(data->vbus_pin[i]))
at91_set_gpio_output(data->vbus_pin[i], 0);
at91_set_gpio_output(data->vbus_pin[i],
data->vbus_pin_active_low[i]);
}
/* Enable overcurrent notification */
for (i = 0; i < data->ports; i++) {
if (data->overcurrent_pin[i])
if (gpio_is_valid(data->overcurrent_pin[i]))
at91_set_gpio_input(data->overcurrent_pin[i], 1);
}
@ -188,7 +189,8 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data)
/* Enable VBus control for UHP ports */
for (i = 0; i < data->ports; i++) {
if (gpio_is_valid(data->vbus_pin[i]))
at91_set_gpio_output(data->vbus_pin[i], 0);
at91_set_gpio_output(data->vbus_pin[i],
data->vbus_pin_active_low[i]);
}
usbh_ehci_data = *data;
@ -785,6 +787,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
else
cs_pin = spi1_standard_cs[devices[i].chip_select];
if (!gpio_is_valid(cs_pin))
continue;
if (devices[i].bus_num == 0)
enable_spi0 = 1;
else

3
arch/arm/mach-at91/at91sam9rl_devices.c
View File

@ -419,6 +419,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
else
cs_pin = spi_standard_cs[devices[i].chip_select];
if (!gpio_is_valid(cs_pin))
continue;
/* enable chip-select pin */
at91_set_gpio_output(cs_pin, 1);

2
arch/arm/mach-at91/at91sam9x5.c
View File

@ -223,6 +223,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk),
CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk),
CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma0_clk),
CLKDEV_CON_DEV_ID("dma_clk", "ffffee00.dma-controller", &dma1_clk),
CLKDEV_CON_ID("pioA", &pioAB_clk),
CLKDEV_CON_ID("pioB", &pioAB_clk),
CLKDEV_CON_ID("pioC", &pioCD_clk),

1
arch/arm/mach-at91/board-sam9263ek.c
View File

@ -74,6 +74,7 @@ static void __init ek_init_early(void)
static struct at91_usbh_data __initdata ek_usbh_data = {
.ports = 2,
.vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 },
.vbus_pin_active_low = {1, 1},
.overcurrent_pin= {-EINVAL, -EINVAL},
};

1
arch/arm/mach-at91/board-sam9m10g45ek.c
View File

@ -71,6 +71,7 @@ static void __init ek_init_early(void)
static struct at91_usbh_data __initdata ek_usbh_hs_data = {
.ports = 2,
.vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3},
.vbus_pin_active_low = {1, 1},
.overcurrent_pin= {-EINVAL, -EINVAL},
};

13
arch/arm/mach-at91/include/mach/board.h
View File

@ -86,14 +86,15 @@ extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *d
extern void __init at91_add_device_eth(struct macb_platform_data *data);
/* USB Host */
#define AT91_MAX_USBH_PORTS 3
struct at91_usbh_data {
u8 ports; /* number of ports on root hub */
int vbus_pin[2]; /* port power-control pin */
u8 vbus_pin_active_low[2];
int vbus_pin[AT91_MAX_USBH_PORTS]; /* port power-control pin */
int overcurrent_pin[AT91_MAX_USBH_PORTS];
u8 ports; /* number of ports on root hub */
u8 overcurrent_supported;
int overcurrent_pin[2];
u8 overcurrent_status[2];
u8 overcurrent_changed[2];
u8 vbus_pin_active_low[AT91_MAX_USBH_PORTS];
u8 overcurrent_status[AT91_MAX_USBH_PORTS];
u8 overcurrent_changed[AT91_MAX_USBH_PORTS];
};
extern void __init at91_add_device_usbh(struct at91_usbh_data *data);
extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data);

27
arch/arm/mach-at91/include/mach/io.h Normal file
View File

@ -0,0 +1,27 @@
/*
* arch/arm/mach-at91/include/mach/io.h
*
* Copyright (C) 2003 SAN People
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_IO_H
#define __ASM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xFFFFFFFF
#define __io(a) __typesafe_io(a)
#endif

3
arch/arm/mach-exynos/common.c
View File

@ -583,10 +583,11 @@ core_initcall(exynos_core_init);
#ifdef CONFIG_CACHE_L2X0
static int __init exynos4_l2x0_cache_init(void)
{
int ret;
if (soc_is_exynos5250())
return 0;
int ret;
ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK);
if (!ret) {
l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);

2
arch/arm/mach-exynos/dma.c
View File

@ -35,8 +35,6 @@
#include <mach/irqs.h>
#include <mach/dma.h>
static u64 dma_dmamask = DMA_BIT_MASK(32);
static u8 exynos4210_pdma0_peri[] = {
DMACH_PCM0_RX,
DMACH_PCM0_TX,

7
arch/arm/mach-exynos/include/mach/debug-macro.S
View File

@ -21,10 +21,9 @@
*/
.macro addruart, rp, rv, tmp
mov \rp, #0x10000000
ldr \rp, [\rp, #0x0]
and \rp, \rp, #0xf00000
teq \rp, #0x500000 @@ EXYNOS5
mrc p15, 0, \tmp, c0, c0, 0
and \tmp, \tmp, #0xf0
teq \tmp, #0xf0 @@ A15
ldreq \rp, =EXYNOS5_PA_UART
movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4
ldr \rv, =S3C_VA_UART

17
arch/arm/mach-exynos/include/mach/uncompress.h
View File

@ -20,9 +20,24 @@ volatile u8 *uart_base;
#include <plat/uncompress.h>
static unsigned int __raw_readl(unsigned int ptr)
{
return *((volatile unsigned int *)ptr);
}
static void arch_detect_cpu(void)
{
if (machine_is_smdk5250())
u32 chip_id = __raw_readl(EXYNOS_PA_CHIPID);
/*
* product_id is bits 31:12
* bits 23:20 describe the exynosX family
*
*/
chip_id >>= 20;
chip_id &= 0xf;
if (chip_id == 0x5)
uart_base = (volatile u8 *)EXYNOS5_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
else
uart_base = (volatile u8 *)EXYNOS4_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);

1
arch/arm/mach-imx/clock-imx27.c
View File

@ -662,6 +662,7 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK(NULL, "dma", dma_clk)
_REGISTER_CLOCK(NULL, "rtic", rtic_clk)
_REGISTER_CLOCK(NULL, "brom", brom_clk)
_REGISTER_CLOCK(NULL, "emma", emma_clk)
_REGISTER_CLOCK("m2m-emmaprp.0", NULL, emma_clk)
_REGISTER_CLOCK(NULL, "slcdc", slcdc_clk)
_REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)

2
arch/arm/mach-imx/clock-imx35.c
View File

@ -483,7 +483,7 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)
_REGISTER_CLOCK(NULL, "max", max_clk)
_REGISTER_CLOCK(NULL, "audmux", audmux_clk)
_REGISTER_CLOCK(NULL, "csi", csi_clk)
_REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk)
_REGISTER_CLOCK(NULL, "iim", iim_clk)
_REGISTER_CLOCK(NULL, "gpu2d", gpu2d_clk)
_REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)

9
arch/arm/mach-imx/mach-armadillo5x0.c
View File

@ -38,6 +38,8 @@
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/delay.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
@ -479,6 +481,11 @@ static struct platform_device *devices[] __initdata = {
&armadillo5x0_smc911x_device,
};
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
REGULATOR_SUPPLY("vddvario", "smsc911x"),
};
/*
* Perform board specific initializations
*/
@ -489,6 +496,8 @@ static void __init armadillo5x0_init(void)
mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
platform_add_devices(devices, ARRAY_SIZE(devices));
imx_add_gpio_keys(&armadillo5x0_button_data);
imx31_add_imx_i2c1(NULL);

9
arch/arm/mach-imx/mach-kzm_arm11_01.c
View File

@ -24,6 +24,8 @@
#include <linux/serial_8250.h>
#include <linux/smsc911x.h>
#include <linux/types.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
@ -166,6 +168,11 @@ static struct platform_device kzm_smsc9118_device = {
},
};
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
REGULATOR_SUPPLY("vddvario", "smsc911x"),
};
static int __init kzm_init_smsc9118(void)
{
/*
@ -175,6 +182,8 @@ static int __init kzm_init_smsc9118(void)
gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int");
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
return platform_device_register(&kzm_smsc9118_device);
}
#else

9
arch/arm/mach-imx/mach-mx31lilly.c
View File

@ -34,6 +34,8 @@
#include <linux/mfd/mc13783.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -242,6 +244,11 @@ static struct platform_device *devices[] __initdata = {
static int mx31lilly_baseboard;
core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444);
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
REGULATOR_SUPPLY("vddvario", "smsc911x"),
};
static void __init mx31lilly_board_init(void)
{
imx31_soc_init();
@ -280,6 +287,8 @@ static void __init mx31lilly_board_init(void)
imx31_add_spi_imx1(&spi1_pdata);
spi_register_board_info(&mc13783_dev, 1);
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
platform_add_devices(devices, ARRAY_SIZE(devices));
/* USB */

9
arch/arm/mach-imx/mach-mx31lite.c
View File

@ -29,6 +29,8 @@
#include <linux/usb/ulpi.h>
#include <linux/mtd/physmap.h>
#include <linux/delay.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -226,6 +228,11 @@ void __init mx31lite_map_io(void)
static int mx31lite_baseboard;
core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
REGULATOR_SUPPLY("vddvario", "smsc911x"),
};
static void __init mx31lite_init(void)
{
int ret;
@ -259,6 +266,8 @@ static void __init mx31lite_init(void)
if (usbh2_pdata.otg)
imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
/* SMSC9117 IRQ pin */
ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
if (ret)

2
arch/arm/mach-imx/mach-mx35_3ds.c
View File

@ -97,7 +97,7 @@ static struct i2c_board_info __initdata i2c_devices_3ds[] = {
static int lcd_power_gpio = -ENXIO;
static int mc9s08dz60_gpiochip_match(struct gpio_chip *chip,
void *data)
const void *data)
{
return !strcmp(chip->label, data);
}

8
arch/arm/mach-imx/mach-mx53_ard.c
View File

@ -23,6 +23,8 @@
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/smsc911x.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <mach/common.h>
#include <mach/hardware.h>
@ -214,6 +216,11 @@ static int weim_cs_config(void)
return 0;
}
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
REGULATOR_SUPPLY("vddvario", "smsc911x"),
};
void __init imx53_ard_common_init(void)
{
mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads,
@ -232,6 +239,7 @@ static void __init mx53_ard_board_init(void)
imx53_ard_common_init();
mx53_ard_io_init();
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
platform_add_devices(devices, ARRAY_SIZE(devices));
imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data);

45
arch/arm/mach-omap1/include/mach/io.h Normal file
View File

@ -0,0 +1,45 @@
/*
* arch/arm/mach-omap1/include/mach/io.h
*
* IO definitions for TI OMAP processors and boards
*
* Copied from arch/arm/mach-sa1100/include/mach/io.h
* Copyright (C) 1997-1999 Russell King
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Modifications:
* 06-12-1997 RMK Created.
* 07-04-1999 RMK Major cleanup
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#endif

16
arch/arm/mach-omap2/board-cm-t35.c
View File

@ -26,6 +26,7 @@
#include <linux/i2c/at24.h>
#include <linux/i2c/twl.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/mmc/host.h>
@ -81,8 +82,23 @@ static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = {
.flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
};
static struct regulator_consumer_supply cm_t35_smsc911x_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
};
static struct regulator_consumer_supply sb_t35_smsc911x_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x.1"),
REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),
};
static void __init cm_t35_init_ethernet(void)
{
regulator_register_fixed(0, cm_t35_smsc911x_supplies,
ARRAY_SIZE(cm_t35_smsc911x_supplies));
regulator_register_fixed(1, sb_t35_smsc911x_supplies,
ARRAY_SIZE(sb_t35_smsc911x_supplies));
gpmc_smsc911x_init(&cm_t35_smsc911x_cfg);
gpmc_smsc911x_init(&sb_t35_smsc911x_cfg);
}

6
arch/arm/mach-omap2/board-igep0020.c
View File

@ -634,8 +634,14 @@ static void __init igep_wlan_bt_init(void)
static inline void __init igep_wlan_bt_init(void) { }
#endif
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
};
static void __init igep_init(void)
{
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
/* Get IGEP2 hardware revision */

7
arch/arm/mach-omap2/board-ldp.c
View File

@ -22,6 +22,7 @@
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/spi/spi.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/i2c/twl.h>
#include <linux/io.h>
@ -410,8 +411,14 @@ static struct mtd_partition ldp_nand_partitions[] = {
};
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
};
static void __init omap_ldp_init(void)
{
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
ldp_init_smsc911x();
omap_i2c_init();

15
arch/arm/mach-omap2/board-omap3evm.c
View File

@ -114,15 +114,6 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = {
static inline void __init omap3evm_init_smsc911x(void)
{
struct clk *l3ck;
unsigned int rate;
l3ck = clk_get(NULL, "l3_ck");
if (IS_ERR(l3ck))
rate = 100000000;
else
rate = clk_get_rate(l3ck);
/* Configure ethernet controller reset gpio */
if (cpu_is_omap3430()) {
if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1)
@ -632,9 +623,15 @@ static void __init omap3_evm_wl12xx_init(void)
#endif
}
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
};
static void __init omap3_evm_init(void)
{
omap3_evm_get_revision();
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
if (cpu_is_omap3630())
omap3_mux_init(omap36x_board_mux, OMAP_PACKAGE_CBB);

7
arch/arm/mach-omap2/board-omap3logic.c
View File

@ -23,6 +23,7 @@
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/i2c/twl.h>
@ -188,8 +189,14 @@ static struct omap_board_mux board_mux[] __initdata = {
};
#endif
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
};
static void __init omap3logic_init(void)
{
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap3torpedo_fix_pbias_voltage();
omap3logic_i2c_init();

16
arch/arm/mach-omap2/board-omap3stalker.c
View File

@ -24,6 +24,7 @@
#include <linux/input.h>
#include <linux/gpio_keys.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/i2c/twl.h>
#include <linux/mmc/host.h>
@ -72,15 +73,6 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = {
static inline void __init omap3stalker_init_eth(void)
{
struct clk *l3ck;
unsigned int rate;
l3ck = clk_get(NULL, "l3_ck");
if (IS_ERR(l3ck))
rate = 100000000;
else
rate = clk_get_rate(l3ck);
omap_mux_init_gpio(19, OMAP_PIN_INPUT_PULLUP);
gpmc_smsc911x_init(&smsc911x_cfg);
}
@ -419,8 +411,14 @@ static struct omap_board_mux board_mux[] __initdata = {
};
#endif
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
};
static void __init omap3_stalker_init(void)
{
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
omap_board_config = omap3_stalker_config;
omap_board_config_size = ARRAY_SIZE(omap3_stalker_config);

8
arch/arm/mach-omap2/board-overo.c
View File

@ -498,10 +498,18 @@ static struct gpio overo_bt_gpios[] __initdata = {
{ OVERO_GPIO_BT_NRESET, GPIOF_OUT_INIT_HIGH, "lcd bl enable" },
};
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
REGULATOR_SUPPLY("vddvario", "smsc911x.1"),
REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),
};
static void __init overo_init(void)
{
int ret;
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap_hsmmc_init(mmc);
overo_i2c_init();

9
arch/arm/mach-omap2/board-zoom-debugboard.c
View File

@ -14,6 +14,9 @@
#include <linux/smsc911x.h>
#include <linux/interrupt.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <plat/gpmc.h>
#include <plat/gpmc-smsc911x.h>
@ -117,11 +120,17 @@ static struct platform_device *zoom_devices[] __initdata = {
&zoom_debugboard_serial_device,
};
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
};
int __init zoom_debugboard_init(void)
{
if (!omap_zoom_debugboard_detect())
return 0;
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
zoom_init_smsc911x();
zoom_init_quaduart();
return platform_add_devices(zoom_devices, ARRAY_SIZE(zoom_devices));

18
arch/arm/mach-omap2/clock3xxx_data.c
View File

@ -747,7 +747,7 @@ static struct clk dpll4_m3_ck = {
.parent = &dpll4_ck,
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL),
.clksel_mask = OMAP3430_CLKSEL_TV_MASK,
.clksel_mask = OMAP3630_CLKSEL_TV_MASK,
.clksel = dpll4_clksel,
.clkdm_name = "dpll4_clkdm",
.recalc = &omap2_clksel_recalc,
@ -832,7 +832,7 @@ static struct clk dpll4_m4_ck = {
.parent = &dpll4_ck,
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL),
.clksel_mask = OMAP3430_CLKSEL_DSS1_MASK,
.clksel_mask = OMAP3630_CLKSEL_DSS1_MASK,
.clksel = dpll4_clksel,
.clkdm_name = "dpll4_clkdm",
.recalc = &omap2_clksel_recalc,
@ -859,7 +859,7 @@ static struct clk dpll4_m5_ck = {
.parent = &dpll4_ck,
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_CLKSEL),
.clksel_mask = OMAP3430_CLKSEL_CAM_MASK,
.clksel_mask = OMAP3630_CLKSEL_CAM_MASK,
.clksel = dpll4_clksel,
.clkdm_name = "dpll4_clkdm",
.set_rate = &omap2_clksel_set_rate,
@ -886,7 +886,7 @@ static struct clk dpll4_m6_ck = {
.parent = &dpll4_ck,
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_DIV_DPLL4_MASK,
.clksel_mask = OMAP3630_DIV_DPLL4_MASK,
.clksel = dpll4_clksel,
.clkdm_name = "dpll4_clkdm",
.recalc = &omap2_clksel_recalc,
@ -1394,6 +1394,7 @@ static struct clk cpefuse_fck = {
.name = "cpefuse_fck",
.ops = &clkops_omap2_dflt,
.parent = &sys_ck,
.clkdm_name = "core_l4_clkdm",
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
.enable_bit = OMAP3430ES2_EN_CPEFUSE_SHIFT,
.recalc = &followparent_recalc,
@ -1403,6 +1404,7 @@ static struct clk ts_fck = {
.name = "ts_fck",
.ops = &clkops_omap2_dflt,
.parent = &omap_32k_fck,
.clkdm_name = "core_l4_clkdm",
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
.enable_bit = OMAP3430ES2_EN_TS_SHIFT,
.recalc = &followparent_recalc,
@ -1412,6 +1414,7 @@ static struct clk usbtll_fck = {
.name = "usbtll_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &dpll5_m2_ck,
.clkdm_name = "core_l4_clkdm",
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
.enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT,
.recalc = &followparent_recalc,
@ -1617,6 +1620,7 @@ static struct clk fshostusb_fck = {
.name = "fshostusb_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_48m_fck,
.clkdm_name = "core_l4_clkdm",
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_bit = OMAP3430ES1_EN_FSHOSTUSB_SHIFT,
.recalc = &followparent_recalc,
@ -2043,6 +2047,7 @@ static struct clk omapctrl_ick = {
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
.enable_bit = OMAP3430_EN_OMAPCTRL_SHIFT,
.flags = ENABLE_ON_INIT,
.clkdm_name = "core_l4_clkdm",
.recalc = &followparent_recalc,
};
@ -2094,6 +2099,7 @@ static struct clk usb_l4_ick = {
.clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL),
.clksel_mask = OMAP3430ES1_CLKSEL_FSHOSTUSB_MASK,
.clksel = usb_l4_clksel,
.clkdm_name = "core_l4_clkdm",
.recalc = &omap2_clksel_recalc,
};
@ -3467,8 +3473,8 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(NULL, "ipss_ick", &ipss_ick, CK_AM35XX),
CLK(NULL, "rmii_ck", &rmii_ck, CK_AM35XX),
CLK(NULL, "pclk_ck", &pclk_ck, CK_AM35XX),
CLK("davinci_emac", "emac_clk", &emac_ick, CK_AM35XX),
CLK("davinci_emac", "phy_clk", &emac_fck, CK_AM35XX),
CLK("davinci_emac", NULL, &emac_ick, CK_AM35XX),
CLK("davinci_mdio.0", NULL, &emac_fck, CK_AM35XX),
CLK("vpfe-capture", "master", &vpfe_ick, CK_AM35XX),
CLK("vpfe-capture", "slave", &vpfe_fck, CK_AM35XX),
CLK("musb-am35x", "ick", &hsotgusb_ick_am35xx, CK_AM35XX),

5
arch/arm/mach-omap2/clock44xx_data.c
View File

@ -957,8 +957,8 @@ static struct dpll_data dpll_usb_dd = {
.modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED),
.autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_USB,
.idlest_reg = OMAP4430_CM_IDLEST_DPLL_USB,
.mult_mask = OMAP4430_DPLL_MULT_MASK,
.div1_mask = OMAP4430_DPLL_DIV_MASK,
.mult_mask = OMAP4430_DPLL_MULT_USB_MASK,
.div1_mask = OMAP4430_DPLL_DIV_0_7_MASK,
.enable_mask = OMAP4430_DPLL_EN_MASK,
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
@ -978,6 +978,7 @@ static struct clk dpll_usb_ck = {
.recalc = &omap3_dpll_recalc,
.round_rate = &omap2_dpll_round_rate,
.set_rate = &omap3_noncore_dpll_set_rate,
.clkdm_name = "l3_init_clkdm",
};
static struct clk dpll_usb_clkdcoldo_ck = {

2
arch/arm/mach-omap2/clockdomains44xx_data.c
View File

@ -390,7 +390,7 @@ static struct clockdomain emu_sys_44xx_clkdm = {
.prcm_partition = OMAP4430_PRM_PARTITION,
.cm_inst = OMAP4430_PRM_EMU_CM_INST,
.clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS,
.flags = CLKDM_CAN_HWSUP,
.flags = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_FORCE_WAKEUP,
};
static struct clockdomain l3_dma_44xx_clkdm = {

65
arch/arm/mach-omap2/gpmc-smsc911x.c
View File

@ -19,15 +19,11 @@
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/smsc911x.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <plat/board.h>
#include <plat/gpmc.h>
#include <plat/gpmc-smsc911x.h>
static struct omap_smsc911x_platform_data *gpmc_cfg;
static struct resource gpmc_smsc911x_resources[] = {
[0] = {
.flags = IORESOURCE_MEM,
@ -41,51 +37,6 @@ static struct smsc911x_platform_config gpmc_smsc911x_config = {
.phy_interface = PHY_INTERFACE_MODE_MII,
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
.flags = SMSC911X_USE_16BIT,
};
static struct regulator_consumer_supply gpmc_smsc911x_supply[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
};
/* Generic regulator definition to satisfy smsc911x */
static struct regulator_init_data gpmc_smsc911x_reg_init_data = {
.constraints = {
.min_uV = 3300000,
.max_uV = 3300000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(gpmc_smsc911x_supply),
.consumer_supplies = gpmc_smsc911x_supply,
};
static struct fixed_voltage_config gpmc_smsc911x_fixed_reg_data = {
.supply_name = "gpmc_smsc911x",
.microvolts = 3300000,
.gpio = -EINVAL,
.startup_delay = 0,
.enable_high = 0,
.enabled_at_boot = 1,
.init_data = &gpmc_smsc911x_reg_init_data,
};
/*
* Platform device id of 42 is a temporary fix to avoid conflicts
* with other reg-fixed-voltage devices. The real fix should
* involve the driver core providing a way of dynamically
* assigning a unique id on registration for platform devices
* in the same name space.
*/
static struct platform_device gpmc_smsc911x_regulator = {
.name = "reg-fixed-voltage",
.id = 42,
.dev = {
.platform_data = &gpmc_smsc911x_fixed_reg_data,
},
};
/*
@ -93,23 +44,12 @@ static struct platform_device gpmc_smsc911x_regulator = {
* assume that pin multiplexing is done in the board-*.c file,
* or in the bootloader.
*/
void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data)
void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *gpmc_cfg)
{
struct platform_device *pdev;
unsigned long cs_mem_base;
int ret;
gpmc_cfg = board_data;
if (!gpmc_cfg->id) {
ret = platform_device_register(&gpmc_smsc911x_regulator);
if (ret < 0) {
pr_err("Unable to register smsc911x regulators: %d\n",
ret);
return;
}
}
if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) {
pr_err("Failed to request GPMC mem region\n");
return;
@ -139,8 +79,7 @@ void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data)
gpio_set_value(gpmc_cfg->gpio_reset, 1);
}
if (gpmc_cfg->flags)
gpmc_smsc911x_config.flags = gpmc_cfg->flags;
gpmc_smsc911x_config.flags = gpmc_cfg->flags ? : SMSC911X_USE_16BIT;
pdev = platform_device_register_resndata(NULL, "smsc911x", gpmc_cfg->id,
gpmc_smsc911x_resources, ARRAY_SIZE(gpmc_smsc911x_resources),

7
arch/arm/mach-omap2/hsmmc.c
View File

@ -506,6 +506,13 @@ static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo,
if (oh->dev_attr != NULL) {
mmc_dev_attr = oh->dev_attr;
mmc_data->controller_flags = mmc_dev_attr->flags;
/*
* erratum 2.1.1.128 doesn't apply if board has
* a transceiver is attached
*/
if (hsmmcinfo->transceiver)
mmc_data->controller_flags &=
~OMAP_HSMMC_BROKEN_MULTIBLOCK_READ;
}
pdev = platform_device_alloc(name, ctrl_nr - 1);

96
arch/arm/mach-omap2/omap_hwmod.c
View File

@ -1395,7 +1395,7 @@ static int _read_hardreset(struct omap_hwmod *oh, const char *name)
*/
static int _ocp_softreset(struct omap_hwmod *oh)
{
u32 v;
u32 v, softrst_mask;
int c = 0;
int ret = 0;
@ -1427,11 +1427,13 @@ static int _ocp_softreset(struct omap_hwmod *oh)
oh->class->sysc->syss_offs)
& SYSS_RESETDONE_MASK),
MAX_MODULE_SOFTRESET_WAIT, c);
else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
omap_test_timeout(!(omap_hwmod_read(oh,
oh->class->sysc->sysc_offs)
& SYSC_TYPE2_SOFTRESET_MASK),
& softrst_mask),
MAX_MODULE_SOFTRESET_WAIT, c);
}
if (c == MAX_MODULE_SOFTRESET_WAIT)
pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
@ -1477,6 +1479,11 @@ static int _reset(struct omap_hwmod *oh)
ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
if (oh->class->sysc) {
_update_sysc_cache(oh);
_enable_sysc(oh);
}
return ret;
}
@ -1786,20 +1793,9 @@ static int _setup(struct omap_hwmod *oh, void *data)
return 0;
}
if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
if (!(oh->flags & HWMOD_INIT_NO_RESET))
_reset(oh);
/*
* OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
* The _enable() function should be split to
* avoid the rewrite of the OCP_SYSCONFIG register.
*/
if (oh->class->sysc) {
_update_sysc_cache(oh);
_enable_sysc(oh);
}
}
postsetup_state = oh->_postsetup_state;
if (postsetup_state == _HWMOD_STATE_UNKNOWN)
postsetup_state = _HWMOD_STATE_ENABLED;
@ -1907,20 +1903,10 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
*/
int omap_hwmod_softreset(struct omap_hwmod *oh)
{
u32 v;
int ret;
if (!oh || !(oh->_sysc_cache))
if (!oh)
return -EINVAL;
v = oh->_sysc_cache;
ret = _set_softreset(oh, &v);
if (ret)
goto error;
_write_sysconfig(v, oh);
error:
return ret;
return _ocp_softreset(oh);
}
/**
@ -2463,26 +2449,28 @@ int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
* @oh: struct omap_hwmod *
*
* Sets the module OCP socket ENAWAKEUP bit to allow the module to
* send wakeups to the PRCM. Eventually this should sets PRCM wakeup
* registers to cause the PRCM to receive wakeup events from the
* module. Does not set any wakeup routing registers beyond this
* point - if the module is to wake up any other module or subsystem,
* that must be set separately. Called by omap_device code. Returns
* -EINVAL on error or 0 upon success.
* send wakeups to the PRCM, and enable I/O ring wakeup events for
* this IP block if it has dynamic mux entries. Eventually this
* should set PRCM wakeup registers to cause the PRCM to receive
* wakeup events from the module. Does not set any wakeup routing
* registers beyond this point - if the module is to wake up any other
* module or subsystem, that must be set separately. Called by
* omap_device code. Returns -EINVAL on error or 0 upon success.
*/
int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
{
unsigned long flags;
u32 v;
if (!oh->class->sysc ||
!(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
return -EINVAL;
spin_lock_irqsave(&oh->_lock, flags);
v = oh->_sysc_cache;
_enable_wakeup(oh, &v);
_write_sysconfig(v, oh);
if (oh->class->sysc &&
(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
v = oh->_sysc_cache;
_enable_wakeup(oh, &v);
_write_sysconfig(v, oh);
}
_set_idle_ioring_wakeup(oh, true);
spin_unlock_irqrestore(&oh->_lock, flags);
@ -2494,26 +2482,28 @@ int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
* @oh: struct omap_hwmod *
*
* Clears the module OCP socket ENAWAKEUP bit to prevent the module
* from sending wakeups to the PRCM. Eventually this should clear
* PRCM wakeup registers to cause the PRCM to ignore wakeup events
* from the module. Does not set any wakeup routing registers beyond
* this point - if the module is to wake up any other module or
* subsystem, that must be set separately. Called by omap_device
* code. Returns -EINVAL on error or 0 upon success.
* from sending wakeups to the PRCM, and disable I/O ring wakeup
* events for this IP block if it has dynamic mux entries. Eventually
* this should clear PRCM wakeup registers to cause the PRCM to ignore
* wakeup events from the module. Does not set any wakeup routing
* registers beyond this point - if the module is to wake up any other
* module or subsystem, that must be set separately. Called by
* omap_device code. Returns -EINVAL on error or 0 upon success.
*/
int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
{
unsigned long flags;
u32 v;
if (!oh->class->sysc ||
!(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
return -EINVAL;
spin_lock_irqsave(&oh->_lock, flags);
v = oh->_sysc_cache;
_disable_wakeup(oh, &v);
_write_sysconfig(v, oh);
if (oh->class->sysc &&
(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
v = oh->_sysc_cache;
_disable_wakeup(oh, &v);
_write_sysconfig(v, oh);
}
_set_idle_ioring_wakeup(oh, false);
spin_unlock_irqrestore(&oh->_lock, flags);

28
arch/arm/mach-omap2/omap_hwmod_44xx_data.c
View File

@ -2996,6 +2996,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = {
&omap44xx_l4_abe__mcbsp1_dma,
};
static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = {
{ .role = "pad_fck", .clk = "pad_clks_ck" },
{ .role = "prcm_clk", .clk = "mcbsp1_sync_mux_ck" },
};
static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
.name = "mcbsp1",
.class = &omap44xx_mcbsp_hwmod_class,
@ -3012,6 +3017,8 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
},
.slaves = omap44xx_mcbsp1_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp1_slaves),
.opt_clks = mcbsp1_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp1_opt_clks),
};
/* mcbsp2 */
@ -3071,6 +3078,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = {
&omap44xx_l4_abe__mcbsp2_dma,
};
static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = {
{ .role = "pad_fck", .clk = "pad_clks_ck" },
{ .role = "prcm_clk", .clk = "mcbsp2_sync_mux_ck" },
};
static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
.name = "mcbsp2",
.class = &omap44xx_mcbsp_hwmod_class,
@ -3087,6 +3099,8 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
},
.slaves = omap44xx_mcbsp2_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp2_slaves),
.opt_clks = mcbsp2_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp2_opt_clks),
};
/* mcbsp3 */
@ -3146,6 +3160,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = {
&omap44xx_l4_abe__mcbsp3_dma,
};
static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = {
{ .role = "pad_fck", .clk = "pad_clks_ck" },
{ .role = "prcm_clk", .clk = "mcbsp3_sync_mux_ck" },
};
static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
.name = "mcbsp3",
.class = &omap44xx_mcbsp_hwmod_class,
@ -3162,6 +3181,8 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
},
.slaves = omap44xx_mcbsp3_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp3_slaves),
.opt_clks = mcbsp3_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp3_opt_clks),
};
/* mcbsp4 */
@ -3200,6 +3221,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = {
&omap44xx_l4_per__mcbsp4,
};
static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = {
{ .role = "pad_fck", .clk = "pad_clks_ck" },
{ .role = "prcm_clk", .clk = "mcbsp4_sync_mux_ck" },
};
static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
.name = "mcbsp4",
.class = &omap44xx_mcbsp_hwmod_class,
@ -3216,6 +3242,8 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
},
.slaves = omap44xx_mcbsp4_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp4_slaves),
.opt_clks = mcbsp4_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp4_opt_clks),
};
/*

4
arch/arm/mach-omap2/opp.c
View File

@ -64,10 +64,10 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def,
}
oh = omap_hwmod_lookup(opp_def->hwmod_name);
if (!oh || !oh->od) {
pr_warn("%s: no hwmod or odev for %s, [%d] "
pr_debug("%s: no hwmod or odev for %s, [%d] "
"cannot add OPPs.\n", __func__,
opp_def->hwmod_name, i);
return -EINVAL;
continue;
}
dev = &oh->od->pdev->dev;

38
arch/arm/mach-omap2/pm34xx.c
View File

@ -153,8 +153,7 @@ static void omap3_save_secure_ram_context(void)
pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);
/* Following is for error tracking, it should not happen */
if (ret) {
printk(KERN_ERR "save_secure_sram() returns %08x\n",
ret);
pr_err("save_secure_sram() returns %08x\n", ret);
while (1)
;
}
@ -289,7 +288,7 @@ void omap_sram_idle(void)
break;
default:
/* Invalid state */
printk(KERN_ERR "Invalid mpu state in sram_idle\n");
pr_err("Invalid mpu state in sram_idle\n");
return;
}
@ -439,18 +438,17 @@ restore:
list_for_each_entry(pwrst, &pwrst_list, node) {
state = pwrdm_read_prev_pwrst(pwrst->pwrdm);
if (state > pwrst->next_state) {
printk(KERN_INFO "Powerdomain (%s) didn't enter "
"target state %d\n",
pr_info("Powerdomain (%s) didn't enter "
"target state %d\n",
pwrst->pwrdm->name, pwrst->next_state);
ret = -1;
}
omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state);
}
if (ret)
printk(KERN_ERR "Could not enter target state in pm_suspend\n");
pr_err("Could not enter target state in pm_suspend\n");
else
printk(KERN_INFO "Successfully put all powerdomains "
"to target state\n");
pr_info("Successfully put all powerdomains to target state\n");
return ret;
}
@ -734,21 +732,22 @@ static int __init omap3_pm_init(void)
if (ret) {
pr_err("pm: Failed to request pm_io irq\n");
goto err1;
goto err2;
}
ret = pwrdm_for_each(pwrdms_setup, NULL);
if (ret) {
printk(KERN_ERR "Failed to setup powerdomains\n");
goto err2;
pr_err("Failed to setup powerdomains\n");
goto err3;
}
(void) clkdm_for_each(omap_pm_clkdms_setup, NULL);
mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
if (mpu_pwrdm == NULL) {
printk(KERN_ERR "Failed to get mpu_pwrdm\n");
goto err2;
pr_err("Failed to get mpu_pwrdm\n");
ret = -EINVAL;
goto err3;
}
neon_pwrdm = pwrdm_lookup("neon_pwrdm");
@ -781,8 +780,8 @@ static int __init omap3_pm_init(void)
omap3_secure_ram_storage =
kmalloc(0x803F, GFP_KERNEL);
if (!omap3_secure_ram_storage)
printk(KERN_ERR "Memory allocation failed when"
"allocating for secure sram context\n");
pr_err("Memory allocation failed when "
"allocating for secure sram context\n");
local_irq_disable();
local_fiq_disable();
@ -796,14 +795,17 @@ static int __init omap3_pm_init(void)
}
omap3_save_scratchpad_contents();
err1:
return ret;
err2:
free_irq(INT_34XX_PRCM_MPU_IRQ, NULL);
err3:
list_for_each_entry_safe(pwrst, tmp, &pwrst_list, node) {
list_del(&pwrst->node);
kfree(pwrst);
}
free_irq(omap_prcm_event_to_irq("io"), omap3_pm_init);
err2:
free_irq(omap_prcm_event_to_irq("wkup"), NULL);
err1:
return ret;
}

10
arch/arm/mach-omap2/pm44xx.c
View File

@ -144,7 +144,7 @@ static void omap_default_idle(void)
static int __init omap4_pm_init(void)
{
int ret;
struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm;
struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm, *l4wkup;
struct clockdomain *ducati_clkdm, *l3_2_clkdm, *l4_per_clkdm;
if (!cpu_is_omap44xx())
@ -168,14 +168,19 @@ static int __init omap4_pm_init(void)
* MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as
* expected. The hardware recommendation is to enable static
* dependencies for these to avoid system lock ups or random crashes.
* The L4 wakeup depedency is added to workaround the OCP sync hardware
* BUG with 32K synctimer which lead to incorrect timer value read
* from the 32K counter. The BUG applies for GPTIMER1 and WDT2 which
* are part of L4 wakeup clockdomain.
*/
mpuss_clkdm = clkdm_lookup("mpuss_clkdm");
emif_clkdm = clkdm_lookup("l3_emif_clkdm");
l3_1_clkdm = clkdm_lookup("l3_1_clkdm");
l3_2_clkdm = clkdm_lookup("l3_2_clkdm");
l4_per_clkdm = clkdm_lookup("l4_per_clkdm");
l4wkup = clkdm_lookup("l4_wkup_clkdm");
ducati_clkdm = clkdm_lookup("ducati_clkdm");
if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) ||
if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) || (!l4wkup) ||
(!l3_2_clkdm) || (!ducati_clkdm) || (!l4_per_clkdm))
goto err2;
@ -183,6 +188,7 @@ static int __init omap4_pm_init(void)
ret |= clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm);
ret |= clkdm_add_wkdep(mpuss_clkdm, l3_2_clkdm);
ret |= clkdm_add_wkdep(mpuss_clkdm, l4_per_clkdm);
ret |= clkdm_add_wkdep(mpuss_clkdm, l4wkup);
ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm);
ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm);
if (ret) {

8
arch/arm/mach-omap2/powerdomain.c
View File

@ -972,7 +972,13 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm)
int pwrdm_state_switch(struct powerdomain *pwrdm)
{
return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
int ret;
ret = pwrdm_wait_transition(pwrdm);
if (!ret)
ret = _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
return ret;
}
int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)

21
arch/arm/mach-omap2/prm44xx.c
View File

@ -147,8 +147,9 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs)
u32 mask, st;
/* XXX read mask from RAM? */
mask = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, irqen_offs);
st = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, irqst_offs);
mask = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
irqen_offs);
st = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, irqst_offs);
return mask & st;
}
@ -180,7 +181,7 @@ void omap44xx_prm_read_pending_irqs(unsigned long *events)
*/
void omap44xx_prm_ocp_barrier(void)
{
omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_REVISION_PRM_OFFSET);
}
@ -198,19 +199,19 @@ void omap44xx_prm_ocp_barrier(void)
void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
{
saved_mask[0] =
omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQSTATUS_MPU_OFFSET);
saved_mask[1] =
omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET);
omap4_prm_write_inst_reg(0, OMAP4430_PRM_DEVICE_INST,
omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQENABLE_MPU_OFFSET);
omap4_prm_write_inst_reg(0, OMAP4430_PRM_DEVICE_INST,
omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
/* OCP barrier */
omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_REVISION_PRM_OFFSET);
}
@ -226,9 +227,9 @@ void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
*/
void omap44xx_prm_restore_irqen(u32 *saved_mask)
{
omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_DEVICE_INST,
omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQENABLE_MPU_OFFSET);
omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_DEVICE_INST,
omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
}

2
arch/arm/mach-omap2/prm_common.c
View File

@ -290,7 +290,7 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
goto err;
}
for (i = 0; i <= irq_setup->nr_regs; i++) {
for (i = 0; i < irq_setup->nr_regs; i++) {
gc = irq_alloc_generic_chip("PRCM", 1,
irq_setup->base_irq + i * 32, prm_base,
handle_level_irq);

10
arch/arm/mach-omap2/usb-host.c
View File

@ -54,7 +54,7 @@ static struct omap_device_pm_latency omap_uhhtll_latency[] = {
/*
* setup_ehci_io_mux - initialize IO pad mux for USBHOST
*/
static void setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
static void __init setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
{
switch (port_mode[0]) {
case OMAP_EHCI_PORT_MODE_PHY:
@ -197,7 +197,8 @@ static void setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
return;
}
static void setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
static
void __init setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
{
switch (port_mode[0]) {
case OMAP_EHCI_PORT_MODE_PHY:
@ -315,7 +316,7 @@ static void setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
}
}
static void setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
static void __init setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
{
switch (port_mode[0]) {
case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
@ -412,7 +413,8 @@ static void setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
}
}
static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
static
void __init setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
{
switch (port_mode[0]) {
case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:

1
arch/arm/mach-pxa/Kconfig
View File

@ -113,6 +113,7 @@ config MACH_ARMCORE
select IWMMXT
select PXA25x
select MIGHT_HAVE_PCI
select NEED_MACH_IO_H if PCI
config MACH_EM_X270
bool "CompuLab EM-x270 platform"

17
arch/arm/mach-pxa/include/mach/io.h Normal file
View File

@ -0,0 +1,17 @@
/*
* arch/arm/mach-pxa/include/mach/io.h
*
* Copied from asm/arch/sa1100/io.h
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#endif

18
arch/arm/mach-s3c24xx/common.h Normal file
View File

@ -0,0 +1,18 @@
/*
* Copyright (c) 2012 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Common Header for S3C24XX SoCs
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ARCH_ARM_MACH_S3C24XX_COMMON_H
#define __ARCH_ARM_MACH_S3C24XX_COMMON_H __FILE__
void s3c2410_restart(char mode, const char *cmd);
void s3c244x_restart(char mode, const char *cmd);
#endif /* __ARCH_ARM_MACH_S3C24XX_COMMON_H */

4
arch/arm/mach-sa1100/collie.c
View File

@ -313,6 +313,10 @@ static struct sa1100fb_mach_info collie_lcd_info = {
.lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
.lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
#ifdef CONFIG_BACKLIGHT_LOCOMO
.lcd_power = locomolcd_power
#endif
};
static void __init collie_init(void)

3
arch/arm/mach-sa1100/include/mach/collie.h
View File

@ -1,7 +1,7 @@
/*
* arch/arm/mach-sa1100/include/mach/collie.h
*
* This file contains the hardware specific definitions for Assabet
* This file contains the hardware specific definitions for Collie
* Only include this file from SA1100-specific files.
*
* ChangeLog:
@ -13,6 +13,7 @@
#ifndef __ASM_ARCH_COLLIE_H
#define __ASM_ARCH_COLLIE_H
extern void locomolcd_power(int on);
#define COLLIE_SCOOP_GPIO_BASE (GPIO_MAX + 1)
#define COLLIE_GPIO_CHARGE_ON (COLLIE_SCOOP_GPIO_BASE + 0)

10
arch/arm/mach-versatile/pci.c
View File

@ -190,7 +190,7 @@ static struct resource pre_mem = {
.flags = IORESOURCE_MEM | IORESOURCE_PREFETCH,
};
static int __init pci_versatile_setup_resources(struct list_head *resources)
static int __init pci_versatile_setup_resources(struct pci_sys_data *sys)
{
int ret = 0;
@ -218,9 +218,9 @@ static int __init pci_versatile_setup_resources(struct list_head *resources)
* the mem resource for this bus
* the prefetch mem resource for this bus
*/
pci_add_resource_offset(resources, &io_mem, sys->io_offset);
pci_add_resource_offset(resources, &non_mem, sys->mem_offset);
pci_add_resource_offset(resources, &pre_mem, sys->mem_offset);
pci_add_resource_offset(&sys->resources, &io_mem, sys->io_offset);
pci_add_resource_offset(&sys->resources, &non_mem, sys->mem_offset);
pci_add_resource_offset(&sys->resources, &pre_mem, sys->mem_offset);
goto out;
@ -249,7 +249,7 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
if (nr == 0) {
sys->mem_offset = 0;
ret = pci_versatile_setup_resources(&sys->resources);
ret = pci_versatile_setup_resources(sys);
if (ret < 0) {
printk("pci_versatile_setup: resources... oops?\n");
goto out;

2
arch/arm/plat-mxc/3ds_debugboard.c
View File

@ -80,7 +80,7 @@ static struct smsc911x_platform_config smsc911x_config = {
static struct platform_device smsc_lan9217_device = {
.name = "smsc911x",
.id = 0,
.id = -1,
.dev = {
.platform_data = &smsc911x_config,
},

1
arch/arm/plat-omap/Kconfig
View File

@ -17,6 +17,7 @@ config ARCH_OMAP1
select IRQ_DOMAIN
select HAVE_IDE
select NEED_MACH_MEMORY_H
select NEED_MACH_IO_H if PCCARD
help
"Systems based on omap7xx, omap15xx or omap16xx"

5
arch/arm/plat-omap/clock.c
View File

@ -441,6 +441,8 @@ static int __init clk_disable_unused(void)
return 0;
pr_info("clock: disabling unused clocks to save power\n");
spin_lock_irqsave(&clockfw_lock, flags);
list_for_each_entry(ck, &clocks, node) {
if (ck->ops == &clkops_null)
continue;
@ -448,10 +450,9 @@ static int __init clk_disable_unused(void)
if (ck->usecount > 0 || !ck->enable_reg)
continue;
spin_lock_irqsave(&clockfw_lock, flags);
arch_clock->clk_disable_unused(ck);
spin_unlock_irqrestore(&clockfw_lock, flags);
}
spin_unlock_irqrestore(&clockfw_lock, flags);
return 0;
}

12
arch/arm/plat-omap/include/plat/omap_hwmod.h
View File

@ -47,17 +47,17 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
* with the original PRCM protocol defined for OMAP2420
*/
#define SYSC_TYPE1_MIDLEMODE_SHIFT 12
#define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT)
#define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_TYPE1_MIDLEMODE_SHIFT)
#define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8
#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_TYPE1_CLOCKACTIVITY_SHIFT)
#define SYSC_TYPE1_SIDLEMODE_SHIFT 3
#define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT)
#define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_TYPE1_SIDLEMODE_SHIFT)
#define SYSC_TYPE1_ENAWAKEUP_SHIFT 2
#define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT)
#define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_TYPE1_ENAWAKEUP_SHIFT)
#define SYSC_TYPE1_SOFTRESET_SHIFT 1
#define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT)
#define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_TYPE1_SOFTRESET_SHIFT)
#define SYSC_TYPE1_AUTOIDLE_SHIFT 0
#define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_AUTOIDLE_SHIFT)
#define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_TYPE1_AUTOIDLE_SHIFT)
/*
* OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant

10
drivers/cpufreq/Kconfig.arm
View File

@ -51,9 +51,6 @@ config ARM_S5PV210_CPUFREQ
config ARM_EXYNOS_CPUFREQ
bool "SAMSUNG EXYNOS SoCs"
depends on ARCH_EXYNOS
select ARM_EXYNOS4210_CPUFREQ if CPU_EXYNOS4210
select ARM_EXYNOS4X12_CPUFREQ if (SOC_EXYNOS4212 || SOC_EXYNOS4412)
select ARM_EXYNOS5250_CPUFREQ if SOC_EXYNOS5250
default y
help
This adds the CPUFreq driver common part for Samsung
@ -62,20 +59,19 @@ config ARM_EXYNOS_CPUFREQ
If in doubt, say N.
config ARM_EXYNOS4210_CPUFREQ
bool "Samsung EXYNOS4210"
depends on ARCH_EXYNOS
def_bool CPU_EXYNOS4210
help
This adds the CPUFreq driver for Samsung EXYNOS4210
SoC (S5PV310 or S5PC210).
config ARM_EXYNOS4X12_CPUFREQ
bool "Samsung EXYNOS4X12"
def_bool (SOC_EXYNOS4212 || SOC_EXYNOS4412)
help
This adds the CPUFreq driver for Samsung EXYNOS4X12
SoC (EXYNOS4212 or EXYNOS4412).
config ARM_EXYNOS5250_CPUFREQ
bool "Samsung EXYNOS5250"
def_bool SOC_EXYNOS5250
help
This adds the CPUFreq driver for Samsung EXYNOS5250
SoC.

59
drivers/gpio/gpio-tegra.c
View File

@ -22,7 +22,7 @@
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/irqdomain.h>
@ -37,7 +37,8 @@
#define GPIO_PORT(x) (((x) >> 3) & 0x3)
#define GPIO_BIT(x) ((x) & 0x7)
#define GPIO_REG(x) (GPIO_BANK(x) * 0x80 + GPIO_PORT(x) * 4)
#define GPIO_REG(x) (GPIO_BANK(x) * tegra_gpio_bank_stride + \
GPIO_PORT(x) * 4)
#define GPIO_CNF(x) (GPIO_REG(x) + 0x00)
#define GPIO_OE(x) (GPIO_REG(x) + 0x10)
@ -48,12 +49,12 @@
#define GPIO_INT_LVL(x) (GPIO_REG(x) + 0x60)
#define GPIO_INT_CLR(x) (GPIO_REG(x) + 0x70)
#define GPIO_MSK_CNF(x) (GPIO_REG(x) + 0x800)
#define GPIO_MSK_OE(x) (GPIO_REG(x) + 0x810)
#define GPIO_MSK_OUT(x) (GPIO_REG(x) + 0X820)
#define GPIO_MSK_INT_STA(x) (GPIO_REG(x) + 0x840)
#define GPIO_MSK_INT_ENB(x) (GPIO_REG(x) + 0x850)
#define GPIO_MSK_INT_LVL(x) (GPIO_REG(x) + 0x860)
#define GPIO_MSK_CNF(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x00)
#define GPIO_MSK_OE(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x10)
#define GPIO_MSK_OUT(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0X20)
#define GPIO_MSK_INT_STA(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x40)
#define GPIO_MSK_INT_ENB(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x50)
#define GPIO_MSK_INT_LVL(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x60)
#define GPIO_INT_LVL_MASK 0x010101
#define GPIO_INT_LVL_EDGE_RISING 0x000101
@ -78,6 +79,8 @@ struct tegra_gpio_bank {
static struct irq_domain *irq_domain;
static void __iomem *regs;
static u32 tegra_gpio_bank_count;
static u32 tegra_gpio_bank_stride;
static u32 tegra_gpio_upper_offset;
static struct tegra_gpio_bank *tegra_gpio_banks;
static inline void tegra_gpio_writel(u32 val, u32 reg)
@ -333,6 +336,26 @@ static struct irq_chip tegra_gpio_irq_chip = {
#endif
};
struct tegra_gpio_soc_config {
u32 bank_stride;
u32 upper_offset;
};
static struct tegra_gpio_soc_config tegra20_gpio_config = {
.bank_stride = 0x80,
.upper_offset = 0x800,
};
static struct tegra_gpio_soc_config tegra30_gpio_config = {
.bank_stride = 0x100,
.upper_offset = 0x80,
};
static struct of_device_id tegra_gpio_of_match[] __devinitdata = {
{ .compatible = "nvidia,tegra30-gpio", .data = &tegra30_gpio_config },
{ .compatible = "nvidia,tegra20-gpio", .data = &tegra20_gpio_config },
{ },
};
/* This lock class tells lockdep that GPIO irqs are in a different
* category than their parents, so it won't report false recursion.
@ -341,6 +364,8 @@ static struct lock_class_key gpio_lock_class;
static int __devinit tegra_gpio_probe(struct platform_device *pdev)
{
const struct of_device_id *match;
struct tegra_gpio_soc_config *config;
int irq_base;
struct resource *res;
struct tegra_gpio_bank *bank;
@ -348,6 +373,15 @@ static int __devinit tegra_gpio_probe(struct platform_device *pdev)
int i;
int j;
match = of_match_device(tegra_gpio_of_match, &pdev->dev);
if (match)
config = (struct tegra_gpio_soc_config *)match->data;
else
config = &tegra20_gpio_config;
tegra_gpio_bank_stride = config->bank_stride;
tegra_gpio_upper_offset = config->upper_offset;
for (;;) {
res = platform_get_resource(pdev, IORESOURCE_IRQ, tegra_gpio_bank_count);
if (!res)
@ -402,7 +436,7 @@ static int __devinit tegra_gpio_probe(struct platform_device *pdev)
return -ENODEV;
}
for (i = 0; i < 7; i++) {
for (i = 0; i < tegra_gpio_bank_count; i++) {
for (j = 0; j < 4; j++) {
int gpio = tegra_gpio_compose(i, j, 0);
tegra_gpio_writel(0x00, GPIO_INT_ENB(gpio));
@ -441,11 +475,6 @@ static int __devinit tegra_gpio_probe(struct platform_device *pdev)
return 0;
}
static struct of_device_id tegra_gpio_of_match[] __devinitdata = {
{ .compatible = "nvidia,tegra20-gpio", },
{ },
};
static struct platform_driver tegra_gpio_driver = {
.driver = {
.name = "tegra-gpio",
@ -485,7 +514,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
int i;
int j;
for (i = 0; i < 7; i++) {
for (i = 0; i < tegra_gpio_bank_count; i++) {
for (j = 0; j < 4; j++) {
int gpio = tegra_gpio_compose(i, j, 0);
seq_printf(s,

1
drivers/usb/host/ehci-atmel.c
View File

@ -13,6 +13,7 @@
#include <linux/clk.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_platform.h>
/* interface and function clocks */

163
drivers/usb/host/ohci-at91.c
View File

@ -27,6 +27,10 @@
#error "CONFIG_ARCH_AT91 must be defined."
#endif
#define valid_port(index) ((index) >= 0 && (index) < AT91_MAX_USBH_PORTS)
#define at91_for_each_port(index) \
for ((index) = 0; (index) < AT91_MAX_USBH_PORTS; (index)++)
/* interface and function clocks; sometimes also an AHB clock */
static struct clk *iclk, *fclk, *hclk;
static int clocked;
@ -240,26 +244,26 @@ ohci_at91_start (struct usb_hcd *hcd)
static void ohci_at91_usb_set_power(struct at91_usbh_data *pdata, int port, int enable)
{
if (port < 0 || port >= 2)
if (!valid_port(port))
return;
if (!gpio_is_valid(pdata->vbus_pin[port]))
return;
gpio_set_value(pdata->vbus_pin[port],
!pdata->vbus_pin_active_low[port] ^ enable);
pdata->vbus_pin_active_low[port] ^ enable);
}
static int ohci_at91_usb_get_power(struct at91_usbh_data *pdata, int port)
{
if (port < 0 || port >= 2)
if (!valid_port(port))
return -EINVAL;
if (!gpio_is_valid(pdata->vbus_pin[port]))
return -EINVAL;
return gpio_get_value(pdata->vbus_pin[port]) ^
!pdata->vbus_pin_active_low[port];
pdata->vbus_pin_active_low[port];
}
/*
@ -271,9 +275,9 @@ static int ohci_at91_hub_status_data(struct usb_hcd *hcd, char *buf)
int length = ohci_hub_status_data(hcd, buf);
int port;
for (port = 0; port < ARRAY_SIZE(pdata->overcurrent_pin); port++) {
at91_for_each_port(port) {
if (pdata->overcurrent_changed[port]) {
if (! length)
if (!length)
length = 1;
buf[0] |= 1 << (port + 1);
}
@ -297,11 +301,17 @@ static int ohci_at91_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
"ohci_at91_hub_control(%p,0x%04x,0x%04x,0x%04x,%p,%04x)\n",
hcd, typeReq, wValue, wIndex, buf, wLength);
wIndex--;
switch (typeReq) {
case SetPortFeature:
if (wValue == USB_PORT_FEAT_POWER) {
dev_dbg(hcd->self.controller, "SetPortFeat: POWER\n");
ohci_at91_usb_set_power(pdata, wIndex - 1, 1);
if (valid_port(wIndex)) {
ohci_at91_usb_set_power(pdata, wIndex, 1);
ret = 0;
}
goto out;
}
break;
@ -312,9 +322,9 @@ static int ohci_at91_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
dev_dbg(hcd->self.controller,
"ClearPortFeature: C_OVER_CURRENT\n");
if (wIndex == 1 || wIndex == 2) {
pdata->overcurrent_changed[wIndex-1] = 0;
pdata->overcurrent_status[wIndex-1] = 0;
if (valid_port(wIndex)) {
pdata->overcurrent_changed[wIndex] = 0;
pdata->overcurrent_status[wIndex] = 0;
}
goto out;
@ -323,9 +333,8 @@ static int ohci_at91_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
dev_dbg(hcd->self.controller,
"ClearPortFeature: OVER_CURRENT\n");
if (wIndex == 1 || wIndex == 2) {
pdata->overcurrent_status[wIndex-1] = 0;
}
if (valid_port(wIndex))
pdata->overcurrent_status[wIndex] = 0;
goto out;
@ -333,15 +342,15 @@ static int ohci_at91_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
dev_dbg(hcd->self.controller,
"ClearPortFeature: POWER\n");
if (wIndex == 1 || wIndex == 2) {
ohci_at91_usb_set_power(pdata, wIndex - 1, 0);
if (valid_port(wIndex)) {
ohci_at91_usb_set_power(pdata, wIndex, 0);
return 0;
}
}
break;
}
ret = ohci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
ret = ohci_hub_control(hcd, typeReq, wValue, wIndex + 1, buf, wLength);
if (ret)
goto out;
@ -377,18 +386,15 @@ static int ohci_at91_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
dev_dbg(hcd->self.controller, "GetPortStatus(%d)\n", wIndex);
if (wIndex == 1 || wIndex == 2) {
if (! ohci_at91_usb_get_power(pdata, wIndex-1)) {
if (valid_port(wIndex)) {
if (!ohci_at91_usb_get_power(pdata, wIndex))
*data &= ~cpu_to_le32(RH_PS_PPS);
}
if (pdata->overcurrent_changed[wIndex-1]) {
if (pdata->overcurrent_changed[wIndex])
*data |= cpu_to_le32(RH_PS_OCIC);
}
if (pdata->overcurrent_status[wIndex-1]) {
if (pdata->overcurrent_status[wIndex])
*data |= cpu_to_le32(RH_PS_POCI);
}
}
}
@ -450,14 +456,14 @@ static irqreturn_t ohci_hcd_at91_overcurrent_irq(int irq, void *data)
/* From the GPIO notifying the over-current situation, find
* out the corresponding port */
for (port = 0; port < ARRAY_SIZE(pdata->overcurrent_pin); port++) {
at91_for_each_port(port) {
if (gpio_to_irq(pdata->overcurrent_pin[port]) == irq) {
gpio = pdata->overcurrent_pin[port];
break;
}
}
if (port == ARRAY_SIZE(pdata->overcurrent_pin)) {
if (port == AT91_MAX_USBH_PORTS) {
dev_err(& pdev->dev, "overcurrent interrupt from unknown GPIO\n");
return IRQ_HANDLED;
}
@ -467,7 +473,7 @@ static irqreturn_t ohci_hcd_at91_overcurrent_irq(int irq, void *data)
/* When notified of an over-current situation, disable power
on the corresponding port, and mark this port in
over-current. */
if (! val) {
if (!val) {
ohci_at91_usb_set_power(pdata, port, 0);
pdata->overcurrent_status[port] = 1;
pdata->overcurrent_changed[port] = 1;
@ -492,7 +498,7 @@ static u64 at91_ohci_dma_mask = DMA_BIT_MASK(32);
static int __devinit ohci_at91_of_init(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
int i, ret, gpio;
int i, gpio;
enum of_gpio_flags flags;
struct at91_usbh_data *pdata;
u32 ports;
@ -514,48 +520,17 @@ static int __devinit ohci_at91_of_init(struct platform_device *pdev)
if (!of_property_read_u32(np, "num-ports", &ports))
pdata->ports = ports;
for (i = 0; i < 2; i++) {
at91_for_each_port(i) {
gpio = of_get_named_gpio_flags(np, "atmel,vbus-gpio", i, &flags);
pdata->vbus_pin[i] = gpio;
if (!gpio_is_valid(gpio))
continue;
pdata->vbus_pin_active_low[i] = flags & OF_GPIO_ACTIVE_LOW;
ret = gpio_request(gpio, "ohci_vbus");
if (ret) {
dev_warn(&pdev->dev, "can't request vbus gpio %d", gpio);
continue;
}
ret = gpio_direction_output(gpio, !(flags & OF_GPIO_ACTIVE_LOW) ^ 1);
if (ret)
dev_warn(&pdev->dev, "can't put vbus gpio %d as output %d",
!(flags & OF_GPIO_ACTIVE_LOW) ^ 1, gpio);
}
for (i = 0; i < 2; i++) {
gpio = of_get_named_gpio_flags(np, "atmel,oc-gpio", i, &flags);
pdata->overcurrent_pin[i] = gpio;
if (!gpio_is_valid(gpio))
continue;
ret = gpio_request(gpio, "ohci_overcurrent");
if (ret) {
dev_err(&pdev->dev, "can't request overcurrent gpio %d", gpio);
continue;
}
ret = gpio_direction_input(gpio);
if (ret) {
dev_err(&pdev->dev, "can't configure overcurrent gpio %d as input", gpio);
continue;
}
ret = request_irq(gpio_to_irq(gpio),
ohci_hcd_at91_overcurrent_irq,
IRQF_SHARED, "ohci_overcurrent", pdev);
if (ret) {
gpio_free(gpio);
dev_warn(& pdev->dev, "cannot get GPIO IRQ for overcurrent\n");
}
}
at91_for_each_port(i)
pdata->overcurrent_pin[i] =
of_get_named_gpio_flags(np, "atmel,oc-gpio", i, &flags);
pdev->dev.platform_data = pdata;
@ -574,35 +549,69 @@ static int ohci_hcd_at91_drv_probe(struct platform_device *pdev)
{
struct at91_usbh_data *pdata;
int i;
int gpio;
int ret;
i = ohci_at91_of_init(pdev);
if (i)
return i;
ret = ohci_at91_of_init(pdev);
if (ret)
return ret;
pdata = pdev->dev.platform_data;
if (pdata) {
for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) {
at91_for_each_port(i) {
if (!gpio_is_valid(pdata->vbus_pin[i]))
continue;
gpio_request(pdata->vbus_pin[i], "ohci_vbus");
gpio = pdata->vbus_pin[i];
ret = gpio_request(gpio, "ohci_vbus");
if (ret) {
dev_err(&pdev->dev,
"can't request vbus gpio %d\n", gpio);
continue;
}
ret = gpio_direction_output(gpio,
!pdata->vbus_pin_active_low[i]);
if (ret) {
dev_err(&pdev->dev,
"can't put vbus gpio %d as output %d\n",
gpio, !pdata->vbus_pin_active_low[i]);
gpio_free(gpio);
continue;
}
ohci_at91_usb_set_power(pdata, i, 1);
}
for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) {
int ret;
at91_for_each_port(i) {
if (!gpio_is_valid(pdata->overcurrent_pin[i]))
continue;
gpio_request(pdata->overcurrent_pin[i], "ohci_overcurrent");
gpio = pdata->overcurrent_pin[i];
ret = request_irq(gpio_to_irq(pdata->overcurrent_pin[i]),
ret = gpio_request(gpio, "ohci_overcurrent");
if (ret) {
dev_err(&pdev->dev,
"can't request overcurrent gpio %d\n",
gpio);
continue;
}
ret = gpio_direction_input(gpio);
if (ret) {
dev_err(&pdev->dev,
"can't configure overcurrent gpio %d as input\n",
gpio);
gpio_free(gpio);
continue;
}
ret = request_irq(gpio_to_irq(gpio),
ohci_hcd_at91_overcurrent_irq,
IRQF_SHARED, "ohci_overcurrent", pdev);
if (ret) {
gpio_free(pdata->overcurrent_pin[i]);
dev_warn(& pdev->dev, "cannot get GPIO IRQ for overcurrent\n");
gpio_free(gpio);
dev_err(&pdev->dev,
"can't get gpio IRQ for overcurrent\n");
}
}
}
@ -617,14 +626,14 @@ static int ohci_hcd_at91_drv_remove(struct platform_device *pdev)
int i;
if (pdata) {
for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) {
at91_for_each_port(i) {
if (!gpio_is_valid(pdata->vbus_pin[i]))
continue;
ohci_at91_usb_set_power(pdata, i, 0);
gpio_free(pdata->vbus_pin[i]);
}
for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) {
at91_for_each_port(i) {
if (!gpio_is_valid(pdata->overcurrent_pin[i]))
continue;
free_irq(gpio_to_irq(pdata->overcurrent_pin[i]), pdev);

9
drivers/video/backlight/locomolcd.c
View File

@ -229,14 +229,7 @@ static struct locomo_driver poodle_lcd_driver = {
static int __init locomolcd_init(void)
{
int ret = locomo_driver_register(&poodle_lcd_driver);
if (ret)
return ret;
#ifdef CONFIG_SA1100_COLLIE
sa1100fb_lcd_power = locomolcd_power;
#endif
return 0;
return locomo_driver_register(&poodle_lcd_driver);
}
static void __exit locomolcd_exit(void)