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Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next

Browse Source 
- GF117 acceleration support
- GK110 acceleration-with-blob-ucode support, and initial work towards
fixing our own ucode to be suitable.
- Large cleanups of fermi/kepler context handling

* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (22 commits)
  drm/nva3/disp: Fix HDMI audio regression
  drm/nv50-/disp: Use output specific mask in interrupt
  drm/nouveau: use vmalloc for pgt allocation
  drm/nvc0-/gr: remove some more of the hardcoded register writes
  drm/nvc0-/gr: factor out yet more unknown magic into versioned functions
  drm/nvd7/devinit: use fermi class, not tesla
  drm/nvf0-/gr: ctxsw scratch reg count got bumped to 16
  drm/nvc0-/gr: remove hardcoding of UNK count/mask in GPCCS ucode
  drm/nvf0/gr: build cs ucode for GK110
  drm/nvc0-/gr: extend one of the magic calculations for >4 GPCs
  drm/nvf0/gr: fix ddx shaders locking up on me
  drm/nvc0/devinit: minor typo
  drm/nvf0/gr: enable support, if external cs ucode is available
  drm/nvf0/gr: magic sequence that makes PGRAPH come out of hiding
  drm/nvf0/ce: enable support
  drm/nvf0/fifo: enable support
  drm/nvd7/gr: initial support
  drm/nvc0-/gr: generate cs register lists from grctx data
  drm/nvc0-/gr: tpc regs a subset of gpc, add separate list for gpc/unk regs
  drm/nve0-/gr: some new gpc registers can have multiple copies
  ...
This commit is contained in:
Dave Airlie 2013-07-05 15:55:12 +10:00
commit 30f83b3716
48 changed files with 11592 additions and 11010 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
drivers/gpu/drm/nouveau/Makefile
View File

@ -200,7 +200,13 @@ nouveau-y += core/engine/fifo/nve0.o
nouveau-y += core/engine/graph/ctxnv40.o
nouveau-y += core/engine/graph/ctxnv50.o
nouveau-y += core/engine/graph/ctxnvc0.o
nouveau-y += core/engine/graph/ctxnve0.o
nouveau-y += core/engine/graph/ctxnvc1.o
nouveau-y += core/engine/graph/ctxnvc3.o
nouveau-y += core/engine/graph/ctxnvc8.o
nouveau-y += core/engine/graph/ctxnvd7.o
nouveau-y += core/engine/graph/ctxnvd9.o
nouveau-y += core/engine/graph/ctxnve4.o
nouveau-y += core/engine/graph/ctxnvf0.o
nouveau-y += core/engine/graph/nv04.o
nouveau-y += core/engine/graph/nv10.o
nouveau-y += core/engine/graph/nv20.o
@ -212,7 +218,13 @@ nouveau-y += core/engine/graph/nv35.o
nouveau-y += core/engine/graph/nv40.o
nouveau-y += core/engine/graph/nv50.o
nouveau-y += core/engine/graph/nvc0.o
nouveau-y += core/engine/graph/nve0.o
nouveau-y += core/engine/graph/nvc1.o
nouveau-y += core/engine/graph/nvc3.o
nouveau-y += core/engine/graph/nvc8.o
nouveau-y += core/engine/graph/nvd7.o
nouveau-y += core/engine/graph/nvd9.o
nouveau-y += core/engine/graph/nve4.o
nouveau-y += core/engine/graph/nvf0.o
nouveau-y += core/engine/mpeg/nv31.o
nouveau-y += core/engine/mpeg/nv40.o
nouveau-y += core/engine/mpeg/nv50.o

20
drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
View File

@ -75,7 +75,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = &nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nvc0_graph_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvc0_graph_oclass;
device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
@ -104,7 +104,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = &nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nvc0_graph_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvc3_graph_oclass;
device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
@ -133,7 +133,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = &nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nvc0_graph_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvc3_graph_oclass;
device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
@ -161,7 +161,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = &nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nvc0_graph_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvc3_graph_oclass;
device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
@ -190,7 +190,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = &nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nvc0_graph_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvc3_graph_oclass;
device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
@ -219,7 +219,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = &nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nvc0_graph_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvc1_graph_oclass;
device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
@ -247,7 +247,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = &nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nvc0_graph_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvc8_graph_oclass;
device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
@ -276,7 +276,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = &nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nvc0_graph_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvd9_graph_oclass;
device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
@ -291,7 +291,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLOCK ] = &nvc0_clock_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = &nvc0_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = &nvc0_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
@ -304,7 +304,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = &nvc0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nvc0_graph_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nvd7_graph_oclass;
device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;

12
drivers/gpu/drm/nouveau/core/engine/device/nve0.c
View File

@ -75,7 +75,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = &nve0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nve0_graph_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nve4_graph_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = &nve0_disp_oclass;
device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
@ -105,7 +105,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = &nve0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nve0_graph_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nve4_graph_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = &nve0_disp_oclass;
device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
@ -135,7 +135,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = &nve0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nve0_graph_oclass;
device->oclass[NVDEV_ENGINE_GR ] = nve4_graph_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = &nve0_disp_oclass;
device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
@ -163,16 +163,14 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;
#if 0
device->oclass[NVDEV_ENGINE_FIFO ] = &nve0_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nve0_graph_oclass;
#endif
device->oclass[NVDEV_ENGINE_GR ] = nvf0_graph_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = &nvf0_disp_oclass;
#if 0
device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass;
#if 0
device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass;
device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;

4
drivers/gpu/drm/nouveau/core/engine/disp/hdminva3.c
View File

@ -55,6 +55,10 @@ nva3_hdmi_ctrl(struct nv50_disp_priv *priv, int head, int or, u32 data)
nv_wr32(priv, 0x61c510 + soff, 0x00000000);
nv_mask(priv, 0x61c500 + soff, 0x00000001, 0x00000001);
nv_mask(priv, 0x61c5d0 + soff, 0x00070001, 0x00010001); /* SPARE, HW_CTS */
nv_mask(priv, 0x61c568 + soff, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */
nv_mask(priv, 0x61c578 + soff, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */
/* ??? */
nv_mask(priv, 0x61733c, 0x00100000, 0x00100000); /* RESETF */
nv_mask(priv, 0x61733c, 0x10000000, 0x10000000); /* LOOKUP_EN */

6
drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
View File

@ -1107,6 +1107,7 @@ nv50_disp_intr_unk20_2(struct nv50_disp_priv *priv, int head)
u32 pclk = nv_rd32(priv, 0x610ad0 + (head * 0x540)) & 0x3fffff;
u32 hval, hreg = 0x614200 + (head * 0x800);
u32 oval, oreg;
u32 mask;
u32 conf = exec_clkcmp(priv, head, 0xff, pclk, &outp);
if (conf != ~0) {
if (outp.location == 0 && outp.type == DCB_OUTPUT_DP) {
@ -1133,6 +1134,7 @@ nv50_disp_intr_unk20_2(struct nv50_disp_priv *priv, int head)
oreg = 0x614280 + (ffs(outp.or) - 1) * 0x800;
oval = 0x00000000;
hval = 0x00000000;
mask = 0xffffffff;
} else
if (!outp.location) {
if (outp.type == DCB_OUTPUT_DP)
@ -1140,14 +1142,16 @@ nv50_disp_intr_unk20_2(struct nv50_disp_priv *priv, int head)
oreg = 0x614300 + (ffs(outp.or) - 1) * 0x800;
oval = (conf & 0x0100) ? 0x00000101 : 0x00000000;
hval = 0x00000000;
mask = 0x00000707;
} else {
oreg = 0x614380 + (ffs(outp.or) - 1) * 0x800;
oval = 0x00000001;
hval = 0x00000001;
mask = 0x00000707;
}
nv_mask(priv, hreg, 0x0000000f, hval);
nv_mask(priv, oreg, 0x00000707, oval);
nv_mask(priv, oreg, mask, oval);
}
}

4
drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c
View File

@ -221,8 +221,10 @@ nve0_fifo_chan_ctor(struct nouveau_object *parent,
}
}
if (i == FIFO_ENGINE_NR)
if (i == FIFO_ENGINE_NR) {
nv_error(priv, "unsupported engines 0x%08x\n", args->engine);
return -ENODEV;
}
ret = nouveau_fifo_channel_create(parent, engine, oclass, 1,
priv->user.bar.offset, 0x200,

4508
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c
View File

File diff suppressed because it is too large Load Diff

823
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c Normal file
View File

@ -0,0 +1,823 @@
/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "nvc0.h"
static struct nvc0_graph_init
nvc1_grctx_init_icmd[] = {
{ 0x001000, 1, 0x01, 0x00000004 },
{ 0x0000a9, 1, 0x01, 0x0000ffff },
{ 0x000038, 1, 0x01, 0x0fac6881 },
{ 0x00003d, 1, 0x01, 0x00000001 },
{ 0x0000e8, 8, 0x01, 0x00000400 },
{ 0x000078, 8, 0x01, 0x00000300 },
{ 0x000050, 1, 0x01, 0x00000011 },
{ 0x000058, 8, 0x01, 0x00000008 },
{ 0x000208, 8, 0x01, 0x00000001 },
{ 0x000081, 1, 0x01, 0x00000001 },
{ 0x000085, 1, 0x01, 0x00000004 },
{ 0x000088, 1, 0x01, 0x00000400 },
{ 0x000090, 1, 0x01, 0x00000300 },
{ 0x000098, 1, 0x01, 0x00001001 },
{ 0x0000e3, 1, 0x01, 0x00000001 },
{ 0x0000da, 1, 0x01, 0x00000001 },
{ 0x0000f8, 1, 0x01, 0x00000003 },
{ 0x0000fa, 1, 0x01, 0x00000001 },
{ 0x00009f, 4, 0x01, 0x0000ffff },
{ 0x0000b1, 1, 0x01, 0x00000001 },
{ 0x0000b2, 40, 0x01, 0x00000000 },
{ 0x000210, 8, 0x01, 0x00000040 },
{ 0x000218, 8, 0x01, 0x0000c080 },
{ 0x0000ad, 1, 0x01, 0x0000013e },
{ 0x0000e1, 1, 0x01, 0x00000010 },
{ 0x000290, 16, 0x01, 0x00000000 },
{ 0x0003b0, 16, 0x01, 0x00000000 },
{ 0x0002a0, 16, 0x01, 0x00000000 },
{ 0x000420, 16, 0x01, 0x00000000 },
{ 0x0002b0, 16, 0x01, 0x00000000 },
{ 0x000430, 16, 0x01, 0x00000000 },
{ 0x0002c0, 16, 0x01, 0x00000000 },
{ 0x0004d0, 16, 0x01, 0x00000000 },
{ 0x000720, 16, 0x01, 0x00000000 },
{ 0x0008c0, 16, 0x01, 0x00000000 },
{ 0x000890, 16, 0x01, 0x00000000 },
{ 0x0008e0, 16, 0x01, 0x00000000 },
{ 0x0008a0, 16, 0x01, 0x00000000 },
{ 0x0008f0, 16, 0x01, 0x00000000 },
{ 0x00094c, 1, 0x01, 0x000000ff },
{ 0x00094d, 1, 0x01, 0xffffffff },
{ 0x00094e, 1, 0x01, 0x00000002 },
{ 0x0002ec, 1, 0x01, 0x00000001 },
{ 0x000303, 1, 0x01, 0x00000001 },
{ 0x0002e6, 1, 0x01, 0x00000001 },
{ 0x000466, 1, 0x01, 0x00000052 },
{ 0x000301, 1, 0x01, 0x3f800000 },
{ 0x000304, 1, 0x01, 0x30201000 },
{ 0x000305, 1, 0x01, 0x70605040 },
{ 0x000306, 1, 0x01, 0xb8a89888 },
{ 0x000307, 1, 0x01, 0xf8e8d8c8 },
{ 0x00030a, 1, 0x01, 0x00ffff00 },
{ 0x00030b, 1, 0x01, 0x0000001a },
{ 0x00030c, 1, 0x01, 0x00000001 },
{ 0x000318, 1, 0x01, 0x00000001 },
{ 0x000340, 1, 0x01, 0x00000000 },
{ 0x000375, 1, 0x01, 0x00000001 },
{ 0x000351, 1, 0x01, 0x00000100 },
{ 0x00037d, 1, 0x01, 0x00000006 },
{ 0x0003a0, 1, 0x01, 0x00000002 },
{ 0x0003aa, 1, 0x01, 0x00000001 },
{ 0x0003a9, 1, 0x01, 0x00000001 },
{ 0x000380, 1, 0x01, 0x00000001 },
{ 0x000360, 1, 0x01, 0x00000040 },
{ 0x000366, 2, 0x01, 0x00000000 },
{ 0x000368, 1, 0x01, 0x00001fff },
{ 0x000370, 2, 0x01, 0x00000000 },
{ 0x000372, 1, 0x01, 0x003fffff },
{ 0x00037a, 1, 0x01, 0x00000012 },
{ 0x0005e0, 5, 0x01, 0x00000022 },
{ 0x000619, 1, 0x01, 0x00000003 },
{ 0x000811, 1, 0x01, 0x00000003 },
{ 0x000812, 1, 0x01, 0x00000004 },
{ 0x000813, 1, 0x01, 0x00000006 },
{ 0x000814, 1, 0x01, 0x00000008 },
{ 0x000815, 1, 0x01, 0x0000000b },
{ 0x000800, 6, 0x01, 0x00000001 },
{ 0x000632, 1, 0x01, 0x00000001 },
{ 0x000633, 1, 0x01, 0x00000002 },
{ 0x000634, 1, 0x01, 0x00000003 },
{ 0x000635, 1, 0x01, 0x00000004 },
{ 0x000654, 1, 0x01, 0x3f800000 },
{ 0x000657, 1, 0x01, 0x3f800000 },
{ 0x000655, 2, 0x01, 0x3f800000 },
{ 0x0006cd, 1, 0x01, 0x3f800000 },
{ 0x0007f5, 1, 0x01, 0x3f800000 },
{ 0x0007dc, 1, 0x01, 0x39291909 },
{ 0x0007dd, 1, 0x01, 0x79695949 },
{ 0x0007de, 1, 0x01, 0xb9a99989 },
{ 0x0007df, 1, 0x01, 0xf9e9d9c9 },
{ 0x0007e8, 1, 0x01, 0x00003210 },
{ 0x0007e9, 1, 0x01, 0x00007654 },
{ 0x0007ea, 1, 0x01, 0x00000098 },
{ 0x0007ec, 1, 0x01, 0x39291909 },
{ 0x0007ed, 1, 0x01, 0x79695949 },
{ 0x0007ee, 1, 0x01, 0xb9a99989 },
{ 0x0007ef, 1, 0x01, 0xf9e9d9c9 },
{ 0x0007f0, 1, 0x01, 0x00003210 },
{ 0x0007f1, 1, 0x01, 0x00007654 },
{ 0x0007f2, 1, 0x01, 0x00000098 },
{ 0x0005a5, 1, 0x01, 0x00000001 },
{ 0x000980, 128, 0x01, 0x00000000 },
{ 0x000468, 1, 0x01, 0x00000004 },
{ 0x00046c, 1, 0x01, 0x00000001 },
{ 0x000470, 96, 0x01, 0x00000000 },
{ 0x000510, 16, 0x01, 0x3f800000 },
{ 0x000520, 1, 0x01, 0x000002b6 },
{ 0x000529, 1, 0x01, 0x00000001 },
{ 0x000530, 16, 0x01, 0xffff0000 },
{ 0x000585, 1, 0x01, 0x0000003f },
{ 0x000576, 1, 0x01, 0x00000003 },
{ 0x00057b, 1, 0x01, 0x00000059 },
{ 0x000586, 1, 0x01, 0x00000040 },
{ 0x000582, 2, 0x01, 0x00000080 },
{ 0x0005c2, 1, 0x01, 0x00000001 },
{ 0x000638, 1, 0x01, 0x00000001 },
{ 0x000639, 1, 0x01, 0x00000001 },
{ 0x00063a, 1, 0x01, 0x00000002 },
{ 0x00063b, 2, 0x01, 0x00000001 },
{ 0x00063d, 1, 0x01, 0x00000002 },
{ 0x00063e, 1, 0x01, 0x00000001 },
{ 0x0008b8, 8, 0x01, 0x00000001 },
{ 0x000900, 8, 0x01, 0x00000001 },
{ 0x000908, 8, 0x01, 0x00000002 },
{ 0x000910, 16, 0x01, 0x00000001 },
{ 0x000920, 8, 0x01, 0x00000002 },
{ 0x000928, 8, 0x01, 0x00000001 },
{ 0x000648, 9, 0x01, 0x00000001 },
{ 0x000658, 1, 0x01, 0x0000000f },
{ 0x0007ff, 1, 0x01, 0x0000000a },
{ 0x00066a, 1, 0x01, 0x40000000 },
{ 0x00066b, 1, 0x01, 0x10000000 },
{ 0x00066c, 2, 0x01, 0xffff0000 },
{ 0x0007af, 2, 0x01, 0x00000008 },
{ 0x0007f6, 1, 0x01, 0x00000001 },
{ 0x0006b2, 1, 0x01, 0x00000055 },
{ 0x0007ad, 1, 0x01, 0x00000003 },
{ 0x000937, 1, 0x01, 0x00000001 },
{ 0x000971, 1, 0x01, 0x00000008 },
{ 0x000972, 1, 0x01, 0x00000040 },
{ 0x000973, 1, 0x01, 0x0000012c },
{ 0x00097c, 1, 0x01, 0x00000040 },
{ 0x000979, 1, 0x01, 0x00000003 },
{ 0x000975, 1, 0x01, 0x00000020 },
{ 0x000976, 1, 0x01, 0x00000001 },
{ 0x000977, 1, 0x01, 0x00000020 },
{ 0x000978, 1, 0x01, 0x00000001 },
{ 0x000957, 1, 0x01, 0x00000003 },
{ 0x00095e, 1, 0x01, 0x20164010 },
{ 0x00095f, 1, 0x01, 0x00000020 },
{ 0x000683, 1, 0x01, 0x00000006 },
{ 0x000685, 1, 0x01, 0x003fffff },
{ 0x000687, 1, 0x01, 0x00000c48 },
{ 0x0006a0, 1, 0x01, 0x00000005 },
{ 0x000840, 1, 0x01, 0x00300008 },
{ 0x000841, 1, 0x01, 0x04000080 },
{ 0x000842, 1, 0x01, 0x00300008 },
{ 0x000843, 1, 0x01, 0x04000080 },
{ 0x000818, 8, 0x01, 0x00000000 },
{ 0x000848, 16, 0x01, 0x00000000 },
{ 0x000738, 1, 0x01, 0x00000000 },
{ 0x0006aa, 1, 0x01, 0x00000001 },
{ 0x0006ab, 1, 0x01, 0x00000002 },
{ 0x0006ac, 1, 0x01, 0x00000080 },
{ 0x0006ad, 2, 0x01, 0x00000100 },
{ 0x0006b1, 1, 0x01, 0x00000011 },
{ 0x0006bb, 1, 0x01, 0x000000cf },
{ 0x0006ce, 1, 0x01, 0x2a712488 },
{ 0x000739, 1, 0x01, 0x4085c000 },
{ 0x00073a, 1, 0x01, 0x00000080 },
{ 0x000786, 1, 0x01, 0x80000100 },
{ 0x00073c, 1, 0x01, 0x00010100 },
{ 0x00073d, 1, 0x01, 0x02800000 },
{ 0x000787, 1, 0x01, 0x000000cf },
{ 0x00078c, 1, 0x01, 0x00000008 },
{ 0x000792, 1, 0x01, 0x00000001 },
{ 0x000794, 1, 0x01, 0x00000001 },
{ 0x000795, 2, 0x01, 0x00000001 },
{ 0x000797, 1, 0x01, 0x000000cf },
{ 0x000836, 1, 0x01, 0x00000001 },
{ 0x00079a, 1, 0x01, 0x00000002 },
{ 0x000833, 1, 0x01, 0x04444480 },
{ 0x0007a1, 1, 0x01, 0x00000001 },
{ 0x0007a3, 1, 0x01, 0x00000001 },
{ 0x0007a4, 2, 0x01, 0x00000001 },
{ 0x000831, 1, 0x01, 0x00000004 },
{ 0x00080c, 1, 0x01, 0x00000002 },
{ 0x00080d, 2, 0x01, 0x00000100 },
{ 0x00080f, 1, 0x01, 0x00000001 },
{ 0x000823, 1, 0x01, 0x00000002 },
{ 0x000824, 2, 0x01, 0x00000100 },
{ 0x000826, 1, 0x01, 0x00000001 },
{ 0x00095d, 1, 0x01, 0x00000001 },
{ 0x00082b, 1, 0x01, 0x00000004 },
{ 0x000942, 1, 0x01, 0x00010001 },
{ 0x000943, 1, 0x01, 0x00000001 },
{ 0x000944, 1, 0x01, 0x00000022 },
{ 0x0007c5, 1, 0x01, 0x00010001 },
{ 0x000834, 1, 0x01, 0x00000001 },
{ 0x0007c7, 1, 0x01, 0x00000001 },
{ 0x00c1b0, 8, 0x01, 0x0000000f },
{ 0x00c1b8, 1, 0x01, 0x0fac6881 },
{ 0x00c1b9, 1, 0x01, 0x00fac688 },
{ 0x01e100, 1, 0x01, 0x00000001 },
{ 0x001000, 1, 0x01, 0x00000002 },
{ 0x0006aa, 1, 0x01, 0x00000001 },
{ 0x0006ad, 2, 0x01, 0x00000100 },
{ 0x0006b1, 1, 0x01, 0x00000011 },
{ 0x00078c, 1, 0x01, 0x00000008 },
{ 0x000792, 1, 0x01, 0x00000001 },
{ 0x000794, 1, 0x01, 0x00000001 },
{ 0x000795, 2, 0x01, 0x00000001 },
{ 0x000797, 1, 0x01, 0x000000cf },
{ 0x00079a, 1, 0x01, 0x00000002 },
{ 0x000833, 1, 0x01, 0x04444480 },
{ 0x0007a1, 1, 0x01, 0x00000001 },
{ 0x0007a3, 1, 0x01, 0x00000001 },
{ 0x0007a4, 2, 0x01, 0x00000001 },
{ 0x000831, 1, 0x01, 0x00000004 },
{ 0x01e100, 1, 0x01, 0x00000001 },
{ 0x001000, 1, 0x01, 0x00000014 },
{ 0x000351, 1, 0x01, 0x00000100 },
{ 0x000957, 1, 0x01, 0x00000003 },
{ 0x00095d, 1, 0x01, 0x00000001 },
{ 0x00082b, 1, 0x01, 0x00000004 },
{ 0x000942, 1, 0x01, 0x00010001 },
{ 0x000943, 1, 0x01, 0x00000001 },
{ 0x0007c5, 1, 0x01, 0x00010001 },
{ 0x000834, 1, 0x01, 0x00000001 },
{ 0x0007c7, 1, 0x01, 0x00000001 },
{ 0x01e100, 1, 0x01, 0x00000001 },
{ 0x001000, 1, 0x01, 0x00000001 },
{ 0x00080c, 1, 0x01, 0x00000002 },
{ 0x00080d, 2, 0x01, 0x00000100 },
{ 0x00080f, 1, 0x01, 0x00000001 },
{ 0x000823, 1, 0x01, 0x00000002 },
{ 0x000824, 2, 0x01, 0x00000100 },
{ 0x000826, 1, 0x01, 0x00000001 },
{ 0x01e100, 1, 0x01, 0x00000001 },
{}
};
struct nvc0_graph_init
nvc1_grctx_init_9097[] = {
{ 0x000800, 8, 0x40, 0x00000000 },
{ 0x000804, 8, 0x40, 0x00000000 },
{ 0x000808, 8, 0x40, 0x00000400 },
{ 0x00080c, 8, 0x40, 0x00000300 },
{ 0x000810, 1, 0x04, 0x000000cf },
{ 0x000850, 7, 0x40, 0x00000000 },
{ 0x000814, 8, 0x40, 0x00000040 },
{ 0x000818, 8, 0x40, 0x00000001 },
{ 0x00081c, 8, 0x40, 0x00000000 },
{ 0x000820, 8, 0x40, 0x00000000 },
{ 0x002700, 8, 0x20, 0x00000000 },
{ 0x002704, 8, 0x20, 0x00000000 },
{ 0x002708, 8, 0x20, 0x00000000 },
{ 0x00270c, 8, 0x20, 0x00000000 },
{ 0x002710, 8, 0x20, 0x00014000 },
{ 0x002714, 8, 0x20, 0x00000040 },
{ 0x001c00, 16, 0x10, 0x00000000 },
{ 0x001c04, 16, 0x10, 0x00000000 },
{ 0x001c08, 16, 0x10, 0x00000000 },
{ 0x001c0c, 16, 0x10, 0x00000000 },
{ 0x001d00, 16, 0x10, 0x00000000 },
{ 0x001d04, 16, 0x10, 0x00000000 },
{ 0x001d08, 16, 0x10, 0x00000000 },
{ 0x001d0c, 16, 0x10, 0x00000000 },
{ 0x001f00, 16, 0x08, 0x00000000 },
{ 0x001f04, 16, 0x08, 0x00000000 },
{ 0x001f80, 16, 0x08, 0x00000000 },
{ 0x001f84, 16, 0x08, 0x00000000 },
{ 0x002200, 5, 0x10, 0x00000022 },
{ 0x002000, 1, 0x04, 0x00000000 },
{ 0x002040, 1, 0x04, 0x00000011 },
{ 0x002080, 1, 0x04, 0x00000020 },
{ 0x0020c0, 1, 0x04, 0x00000030 },
{ 0x002100, 1, 0x04, 0x00000040 },
{ 0x002140, 1, 0x04, 0x00000051 },
{ 0x00200c, 6, 0x40, 0x00000001 },
{ 0x002010, 1, 0x04, 0x00000000 },
{ 0x002050, 1, 0x04, 0x00000000 },
{ 0x002090, 1, 0x04, 0x00000001 },
{ 0x0020d0, 1, 0x04, 0x00000002 },
{ 0x002110, 1, 0x04, 0x00000003 },
{ 0x002150, 1, 0x04, 0x00000004 },
{ 0x000380, 4, 0x20, 0x00000000 },
{ 0x000384, 4, 0x20, 0x00000000 },
{ 0x000388, 4, 0x20, 0x00000000 },
{ 0x00038c, 4, 0x20, 0x00000000 },
{ 0x000700, 4, 0x10, 0x00000000 },
{ 0x000704, 4, 0x10, 0x00000000 },
{ 0x000708, 4, 0x10, 0x00000000 },
{ 0x002800, 128, 0x04, 0x00000000 },
{ 0x000a00, 16, 0x20, 0x00000000 },
{ 0x000a04, 16, 0x20, 0x00000000 },
{ 0x000a08, 16, 0x20, 0x00000000 },
{ 0x000a0c, 16, 0x20, 0x00000000 },
{ 0x000a10, 16, 0x20, 0x00000000 },
{ 0x000a14, 16, 0x20, 0x00000000 },
{ 0x000c00, 16, 0x10, 0x00000000 },
{ 0x000c04, 16, 0x10, 0x00000000 },
{ 0x000c08, 16, 0x10, 0x00000000 },
{ 0x000c0c, 16, 0x10, 0x3f800000 },
{ 0x000d00, 8, 0x08, 0xffff0000 },
{ 0x000d04, 8, 0x08, 0xffff0000 },
{ 0x000e00, 16, 0x10, 0x00000000 },
{ 0x000e04, 16, 0x10, 0xffff0000 },
{ 0x000e08, 16, 0x10, 0xffff0000 },
{ 0x000d40, 4, 0x08, 0x00000000 },
{ 0x000d44, 4, 0x08, 0x00000000 },
{ 0x001e00, 8, 0x20, 0x00000001 },
{ 0x001e04, 8, 0x20, 0x00000001 },
{ 0x001e08, 8, 0x20, 0x00000002 },
{ 0x001e0c, 8, 0x20, 0x00000001 },
{ 0x001e10, 8, 0x20, 0x00000001 },
{ 0x001e14, 8, 0x20, 0x00000002 },
{ 0x001e18, 8, 0x20, 0x00000001 },
{ 0x00030c, 1, 0x04, 0x00000001 },
{ 0x001944, 1, 0x04, 0x00000000 },
{ 0x001514, 1, 0x04, 0x00000000 },
{ 0x000d68, 1, 0x04, 0x0000ffff },
{ 0x00121c, 1, 0x04, 0x0fac6881 },
{ 0x000fac, 1, 0x04, 0x00000001 },
{ 0x001538, 1, 0x04, 0x00000001 },
{ 0x000fe0, 2, 0x04, 0x00000000 },
{ 0x000fe8, 1, 0x04, 0x00000014 },
{ 0x000fec, 1, 0x04, 0x00000040 },
{ 0x000ff0, 1, 0x04, 0x00000000 },
{ 0x00179c, 1, 0x04, 0x00000000 },
{ 0x001228, 1, 0x04, 0x00000400 },
{ 0x00122c, 1, 0x04, 0x00000300 },
{ 0x001230, 1, 0x04, 0x00010001 },
{ 0x0007f8, 1, 0x04, 0x00000000 },
{ 0x0015b4, 1, 0x04, 0x00000001 },
{ 0x0015cc, 1, 0x04, 0x00000000 },
{ 0x001534, 1, 0x04, 0x00000000 },
{ 0x000fb0, 1, 0x04, 0x00000000 },
{ 0x0015d0, 1, 0x04, 0x00000000 },
{ 0x00153c, 1, 0x04, 0x00000000 },
{ 0x0016b4, 1, 0x04, 0x00000003 },
{ 0x000fbc, 4, 0x04, 0x0000ffff },
{ 0x000df8, 2, 0x04, 0x00000000 },
{ 0x001948, 1, 0x04, 0x00000000 },
{ 0x001970, 1, 0x04, 0x00000001 },
{ 0x00161c, 1, 0x04, 0x000009f0 },
{ 0x000dcc, 1, 0x04, 0x00000010 },
{ 0x00163c, 1, 0x04, 0x00000000 },
{ 0x0015e4, 1, 0x04, 0x00000000 },
{ 0x001160, 32, 0x04, 0x25e00040 },
{ 0x001880, 32, 0x04, 0x00000000 },
{ 0x000f84, 2, 0x04, 0x00000000 },
{ 0x0017c8, 2, 0x04, 0x00000000 },
{ 0x0017d0, 1, 0x04, 0x000000ff },
{ 0x0017d4, 1, 0x04, 0xffffffff },
{ 0x0017d8, 1, 0x04, 0x00000002 },
{ 0x0017dc, 1, 0x04, 0x00000000 },
{ 0x0015f4, 2, 0x04, 0x00000000 },
{ 0x001434, 2, 0x04, 0x00000000 },
{ 0x000d74, 1, 0x04, 0x00000000 },
{ 0x000dec, 1, 0x04, 0x00000001 },
{ 0x0013a4, 1, 0x04, 0x00000000 },
{ 0x001318, 1, 0x04, 0x00000001 },
{ 0x001644, 1, 0x04, 0x00000000 },
{ 0x000748, 1, 0x04, 0x00000000 },
{ 0x000de8, 1, 0x04, 0x00000000 },
{ 0x001648, 1, 0x04, 0x00000000 },
{ 0x0012a4, 1, 0x04, 0x00000000 },
{ 0x001120, 4, 0x04, 0x00000000 },
{ 0x001118, 1, 0x04, 0x00000000 },
{ 0x00164c, 1, 0x04, 0x00000000 },
{ 0x001658, 1, 0x04, 0x00000000 },
{ 0x001910, 1, 0x04, 0x00000290 },
{ 0x001518, 1, 0x04, 0x00000000 },
{ 0x00165c, 1, 0x04, 0x00000001 },
{ 0x001520, 1, 0x04, 0x00000000 },
{ 0x001604, 1, 0x04, 0x00000000 },
{ 0x001570, 1, 0x04, 0x00000000 },
{ 0x0013b0, 2, 0x04, 0x3f800000 },
{ 0x00020c, 1, 0x04, 0x00000000 },
{ 0x001670, 1, 0x04, 0x30201000 },
{ 0x001674, 1, 0x04, 0x70605040 },
{ 0x001678, 1, 0x04, 0xb8a89888 },
{ 0x00167c, 1, 0x04, 0xf8e8d8c8 },
{ 0x00166c, 1, 0x04, 0x00000000 },
{ 0x001680, 1, 0x04, 0x00ffff00 },
{ 0x0012d0, 1, 0x04, 0x00000003 },
{ 0x0012d4, 1, 0x04, 0x00000002 },
{ 0x001684, 2, 0x04, 0x00000000 },
{ 0x000dac, 2, 0x04, 0x00001b02 },
{ 0x000db4, 1, 0x04, 0x00000000 },
{ 0x00168c, 1, 0x04, 0x00000000 },
{ 0x0015bc, 1, 0x04, 0x00000000 },
{ 0x00156c, 1, 0x04, 0x00000000 },
{ 0x00187c, 1, 0x04, 0x00000000 },
{ 0x001110, 1, 0x04, 0x00000001 },
{ 0x000dc0, 3, 0x04, 0x00000000 },
{ 0x001234, 1, 0x04, 0x00000000 },
{ 0x001690, 1, 0x04, 0x00000000 },
{ 0x0012ac, 1, 0x04, 0x00000001 },
{ 0x0002c4, 1, 0x04, 0x00000000 },
{ 0x000790, 5, 0x04, 0x00000000 },
{ 0x00077c, 1, 0x04, 0x00000000 },
{ 0x001000, 1, 0x04, 0x00000010 },
{ 0x0010fc, 1, 0x04, 0x00000000 },
{ 0x001290, 1, 0x04, 0x00000000 },
{ 0x000218, 1, 0x04, 0x00000010 },
{ 0x0012d8, 1, 0x04, 0x00000000 },
{ 0x0012dc, 1, 0x04, 0x00000010 },
{ 0x000d94, 1, 0x04, 0x00000001 },
{ 0x00155c, 2, 0x04, 0x00000000 },
{ 0x001564, 1, 0x04, 0x00001fff },
{ 0x001574, 2, 0x04, 0x00000000 },
{ 0x00157c, 1, 0x04, 0x003fffff },
{ 0x001354, 1, 0x04, 0x00000000 },
{ 0x001664, 1, 0x04, 0x00000000 },
{ 0x001610, 1, 0x04, 0x00000012 },
{ 0x001608, 2, 0x04, 0x00000000 },
{ 0x00162c, 1, 0x04, 0x00000003 },
{ 0x000210, 1, 0x04, 0x00000000 },
{ 0x000320, 1, 0x04, 0x00000000 },
{ 0x000324, 6, 0x04, 0x3f800000 },
{ 0x000750, 1, 0x04, 0x00000000 },
{ 0x000760, 1, 0x04, 0x39291909 },
{ 0x000764, 1, 0x04, 0x79695949 },
{ 0x000768, 1, 0x04, 0xb9a99989 },
{ 0x00076c, 1, 0x04, 0xf9e9d9c9 },
{ 0x000770, 1, 0x04, 0x30201000 },
{ 0x000774, 1, 0x04, 0x70605040 },
{ 0x000778, 1, 0x04, 0x00009080 },
{ 0x000780, 1, 0x04, 0x39291909 },
{ 0x000784, 1, 0x04, 0x79695949 },
{ 0x000788, 1, 0x04, 0xb9a99989 },
{ 0x00078c, 1, 0x04, 0xf9e9d9c9 },
{ 0x0007d0, 1, 0x04, 0x30201000 },
{ 0x0007d4, 1, 0x04, 0x70605040 },
{ 0x0007d8, 1, 0x04, 0x00009080 },
{ 0x00037c, 1, 0x04, 0x00000001 },
{ 0x000740, 2, 0x04, 0x00000000 },
{ 0x002600, 1, 0x04, 0x00000000 },
{ 0x001918, 1, 0x04, 0x00000000 },
{ 0x00191c, 1, 0x04, 0x00000900 },
{ 0x001920, 1, 0x04, 0x00000405 },
{ 0x001308, 1, 0x04, 0x00000001 },
{ 0x001924, 1, 0x04, 0x00000000 },
{ 0x0013ac, 1, 0x04, 0x00000000 },
{ 0x00192c, 1, 0x04, 0x00000001 },
{ 0x00193c, 1, 0x04, 0x00002c1c },
{ 0x000d7c, 1, 0x04, 0x00000000 },
{ 0x000f8c, 1, 0x04, 0x00000000 },
{ 0x0002c0, 1, 0x04, 0x00000001 },
{ 0x001510, 1, 0x04, 0x00000000 },
{ 0x001940, 1, 0x04, 0x00000000 },
{ 0x000ff4, 2, 0x04, 0x00000000 },
{ 0x00194c, 2, 0x04, 0x00000000 },
{ 0x001968, 1, 0x04, 0x00000000 },
{ 0x001590, 1, 0x04, 0x0000003f },
{ 0x0007e8, 4, 0x04, 0x00000000 },
{ 0x00196c, 1, 0x04, 0x00000011 },
{ 0x00197c, 1, 0x04, 0x00000000 },
{ 0x000fcc, 2, 0x04, 0x00000000 },
{ 0x0002d8, 1, 0x04, 0x00000040 },
{ 0x001980, 1, 0x04, 0x00000080 },
{ 0x001504, 1, 0x04, 0x00000080 },
{ 0x001984, 1, 0x04, 0x00000000 },
{ 0x000300, 1, 0x04, 0x00000001 },
{ 0x0013a8, 1, 0x04, 0x00000000 },
{ 0x0012ec, 1, 0x04, 0x00000000 },
{ 0x001310, 1, 0x04, 0x00000000 },
{ 0x001314, 1, 0x04, 0x00000001 },
{ 0x001380, 1, 0x04, 0x00000000 },
{ 0x001384, 4, 0x04, 0x00000001 },
{ 0x001394, 1, 0x04, 0x00000000 },
{ 0x00139c, 1, 0x04, 0x00000000 },
{ 0x001398, 1, 0x04, 0x00000000 },
{ 0x001594, 1, 0x04, 0x00000000 },
{ 0x001598, 4, 0x04, 0x00000001 },
{ 0x000f54, 3, 0x04, 0x00000000 },
{ 0x0019bc, 1, 0x04, 0x00000000 },
{ 0x000f9c, 2, 0x04, 0x00000000 },
{ 0x0012cc, 1, 0x04, 0x00000000 },
{ 0x0012e8, 1, 0x04, 0x00000000 },
{ 0x00130c, 1, 0x04, 0x00000001 },
{ 0x001360, 8, 0x04, 0x00000000 },
{ 0x00133c, 2, 0x04, 0x00000001 },
{ 0x001344, 1, 0x04, 0x00000002 },
{ 0x001348, 2, 0x04, 0x00000001 },
{ 0x001350, 1, 0x04, 0x00000002 },
{ 0x001358, 1, 0x04, 0x00000001 },
{ 0x0012e4, 1, 0x04, 0x00000000 },
{ 0x00131c, 1, 0x04, 0x00000000 },
{ 0x001320, 3, 0x04, 0x00000000 },
{ 0x0019c0, 1, 0x04, 0x00000000 },
{ 0x001140, 1, 0x04, 0x00000000 },
{ 0x0019c4, 1, 0x04, 0x00000000 },
{ 0x0019c8, 1, 0x04, 0x00001500 },
{ 0x00135c, 1, 0x04, 0x00000000 },
{ 0x000f90, 1, 0x04, 0x00000000 },
{ 0x0019e0, 8, 0x04, 0x00000001 },
{ 0x0019cc, 1, 0x04, 0x00000001 },
{ 0x0015b8, 1, 0x04, 0x00000000 },
{ 0x001a00, 1, 0x04, 0x00001111 },
{ 0x001a04, 7, 0x04, 0x00000000 },
{ 0x000d6c, 2, 0x04, 0xffff0000 },
{ 0x0010f8, 1, 0x04, 0x00001010 },
{ 0x000d80, 5, 0x04, 0x00000000 },
{ 0x000da0, 1, 0x04, 0x00000000 },
{ 0x001508, 1, 0x04, 0x80000000 },
{ 0x00150c, 1, 0x04, 0x40000000 },
{ 0x001668, 1, 0x04, 0x00000000 },
{ 0x000318, 2, 0x04, 0x00000008 },
{ 0x000d9c, 1, 0x04, 0x00000001 },
{ 0x0007dc, 1, 0x04, 0x00000000 },
{ 0x00074c, 1, 0x04, 0x00000055 },
{ 0x001420, 1, 0x04, 0x00000003 },
{ 0x0017bc, 2, 0x04, 0x00000000 },
{ 0x0017c4, 1, 0x04, 0x00000001 },
{ 0x001008, 1, 0x04, 0x00000008 },
{ 0x00100c, 1, 0x04, 0x00000040 },
{ 0x001010, 1, 0x04, 0x0000012c },
{ 0x000d60, 1, 0x04, 0x00000040 },
{ 0x00075c, 1, 0x04, 0x00000003 },
{ 0x001018, 1, 0x04, 0x00000020 },
{ 0x00101c, 1, 0x04, 0x00000001 },
{ 0x001020, 1, 0x04, 0x00000020 },
{ 0x001024, 1, 0x04, 0x00000001 },
{ 0x001444, 3, 0x04, 0x00000000 },
{ 0x000360, 1, 0x04, 0x20164010 },
{ 0x000364, 1, 0x04, 0x00000020 },
{ 0x000368, 1, 0x04, 0x00000000 },
{ 0x000de4, 1, 0x04, 0x00000000 },
{ 0x000204, 1, 0x04, 0x00000006 },
{ 0x000208, 1, 0x04, 0x00000000 },
{ 0x0002cc, 1, 0x04, 0x003fffff },
{ 0x0002d0, 1, 0x04, 0x00000c48 },
{ 0x001220, 1, 0x04, 0x00000005 },
{ 0x000fdc, 1, 0x04, 0x00000000 },
{ 0x000f98, 1, 0x04, 0x00300008 },
{ 0x001284, 1, 0x04, 0x04000080 },
{ 0x001450, 1, 0x04, 0x00300008 },
{ 0x001454, 1, 0x04, 0x04000080 },
{ 0x000214, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvc1_grctx_init_9197[] = {
{ 0x003400, 128, 0x04, 0x00000000 },
{ 0x0002e4, 1, 0x04, 0x0000b001 },
{}
};
static struct nvc0_graph_init
nvc1_grctx_init_unk58xx[] = {
{ 0x405800, 1, 0x04, 0x0f8000bf },
{ 0x405830, 1, 0x04, 0x02180218 },
{ 0x405834, 2, 0x04, 0x00000000 },
{ 0x405854, 1, 0x04, 0x00000000 },
{ 0x405870, 4, 0x04, 0x00000001 },
{ 0x405a00, 2, 0x04, 0x00000000 },
{ 0x405a18, 1, 0x04, 0x00000000 },
};
static struct nvc0_graph_init
nvc1_grctx_init_rop[] = {
{ 0x408800, 1, 0x04, 0x02802a3c },
{ 0x408804, 1, 0x04, 0x00000040 },
{ 0x408808, 1, 0x04, 0x1003e005 },
{ 0x408900, 1, 0x04, 0x3080b801 },
{ 0x408904, 1, 0x04, 0x62000001 },
{ 0x408908, 1, 0x04, 0x00c80929 },
{ 0x408980, 1, 0x04, 0x0000011d },
};
static struct nvc0_graph_init
nvc1_grctx_init_gpc_0[] = {
{ 0x418380, 1, 0x04, 0x00000016 },
{ 0x418400, 1, 0x04, 0x38004e00 },
{ 0x418404, 1, 0x04, 0x71e0ffff },
{ 0x418408, 1, 0x04, 0x00000000 },
{ 0x41840c, 1, 0x04, 0x00001008 },
{ 0x418410, 1, 0x04, 0x0fff0fff },
{ 0x418414, 1, 0x04, 0x00200fff },
{ 0x418450, 6, 0x04, 0x00000000 },
{ 0x418468, 1, 0x04, 0x00000001 },
{ 0x41846c, 2, 0x04, 0x00000000 },
{ 0x418600, 1, 0x04, 0x0000001f },
{ 0x418684, 1, 0x04, 0x0000000f },
{ 0x418700, 1, 0x04, 0x00000002 },
{ 0x418704, 1, 0x04, 0x00000080 },
{ 0x418708, 1, 0x04, 0x00000000 },
{ 0x41870c, 1, 0x04, 0x07c80000 },
{ 0x418710, 1, 0x04, 0x00000000 },
{ 0x418800, 1, 0x04, 0x0006860a },
{ 0x418808, 3, 0x04, 0x00000000 },
{ 0x418828, 1, 0x04, 0x00008442 },
{ 0x418830, 1, 0x04, 0x10000001 },
{ 0x4188d8, 1, 0x04, 0x00000008 },
{ 0x4188e0, 1, 0x04, 0x01000000 },
{ 0x4188e8, 5, 0x04, 0x00000000 },
{ 0x4188fc, 1, 0x04, 0x00100018 },
{ 0x41891c, 1, 0x04, 0x00ff00ff },
{ 0x418924, 1, 0x04, 0x00000000 },
{ 0x418928, 1, 0x04, 0x00ffff00 },
{ 0x41892c, 1, 0x04, 0x0000ff00 },
{ 0x418a00, 3, 0x04, 0x00000000 },
{ 0x418a0c, 1, 0x04, 0x00010000 },
{ 0x418a10, 3, 0x04, 0x00000000 },
{ 0x418a20, 3, 0x04, 0x00000000 },
{ 0x418a2c, 1, 0x04, 0x00010000 },
{ 0x418a30, 3, 0x04, 0x00000000 },
{ 0x418a40, 3, 0x04, 0x00000000 },
{ 0x418a4c, 1, 0x04, 0x00010000 },
{ 0x418a50, 3, 0x04, 0x00000000 },
{ 0x418a60, 3, 0x04, 0x00000000 },
{ 0x418a6c, 1, 0x04, 0x00010000 },
{ 0x418a70, 3, 0x04, 0x00000000 },
{ 0x418a80, 3, 0x04, 0x00000000 },
{ 0x418a8c, 1, 0x04, 0x00010000 },
{ 0x418a90, 3, 0x04, 0x00000000 },
{ 0x418aa0, 3, 0x04, 0x00000000 },
{ 0x418aac, 1, 0x04, 0x00010000 },
{ 0x418ab0, 3, 0x04, 0x00000000 },
{ 0x418ac0, 3, 0x04, 0x00000000 },
{ 0x418acc, 1, 0x04, 0x00010000 },
{ 0x418ad0, 3, 0x04, 0x00000000 },
{ 0x418ae0, 3, 0x04, 0x00000000 },
{ 0x418aec, 1, 0x04, 0x00010000 },
{ 0x418af0, 3, 0x04, 0x00000000 },
{ 0x418b00, 1, 0x04, 0x00000000 },
{ 0x418b08, 1, 0x04, 0x0a418820 },
{ 0x418b0c, 1, 0x04, 0x062080e6 },
{ 0x418b10, 1, 0x04, 0x020398a4 },
{ 0x418b14, 1, 0x04, 0x0e629062 },
{ 0x418b18, 1, 0x04, 0x0a418820 },
{ 0x418b1c, 1, 0x04, 0x000000e6 },
{ 0x418bb8, 1, 0x04, 0x00000103 },
{ 0x418c08, 1, 0x04, 0x00000001 },
{ 0x418c10, 8, 0x04, 0x00000000 },
{ 0x418c6c, 1, 0x04, 0x00000001 },
{ 0x418c80, 1, 0x04, 0x20200004 },
{ 0x418c8c, 1, 0x04, 0x00000001 },
{ 0x419000, 1, 0x04, 0x00000780 },
{ 0x419004, 2, 0x04, 0x00000000 },
{ 0x419014, 1, 0x04, 0x00000004 },
};
static struct nvc0_graph_init
nvc1_grctx_init_tpc[] = {
{ 0x419818, 1, 0x04, 0x00000000 },
{ 0x41983c, 1, 0x04, 0x00038bc7 },
{ 0x419848, 1, 0x04, 0x00000000 },
{ 0x419864, 1, 0x04, 0x00000129 },
{ 0x419888, 1, 0x04, 0x00000000 },
{ 0x419a00, 1, 0x04, 0x000001f0 },
{ 0x419a04, 1, 0x04, 0x00000001 },
{ 0x419a08, 1, 0x04, 0x00000023 },
{ 0x419a0c, 1, 0x04, 0x00020000 },
{ 0x419a10, 1, 0x04, 0x00000000 },
{ 0x419a14, 1, 0x04, 0x00000200 },
{ 0x419a1c, 1, 0x04, 0x00000000 },
{ 0x419a20, 1, 0x04, 0x00000800 },
{ 0x419ac4, 1, 0x04, 0x0007f440 },
{ 0x419b00, 1, 0x04, 0x0a418820 },
{ 0x419b04, 1, 0x04, 0x062080e6 },
{ 0x419b08, 1, 0x04, 0x020398a4 },
{ 0x419b0c, 1, 0x04, 0x0e629062 },
{ 0x419b10, 1, 0x04, 0x0a418820 },
{ 0x419b14, 1, 0x04, 0x000000e6 },
{ 0x419bd0, 1, 0x04, 0x00900103 },
{ 0x419be0, 1, 0x04, 0x00400001 },
{ 0x419be4, 1, 0x04, 0x00000000 },
{ 0x419c00, 1, 0x04, 0x00000002 },
{ 0x419c04, 1, 0x04, 0x00000006 },
{ 0x419c08, 1, 0x04, 0x00000002 },
{ 0x419c20, 1, 0x04, 0x00000000 },
{ 0x419cb0, 1, 0x04, 0x00020048 },
{ 0x419ce8, 1, 0x04, 0x00000000 },
{ 0x419cf4, 1, 0x04, 0x00000183 },
{ 0x419d20, 1, 0x04, 0x12180000 },
{ 0x419d24, 1, 0x04, 0x00001fff },
{ 0x419d44, 1, 0x04, 0x02180218 },
{ 0x419e04, 3, 0x04, 0x00000000 },
{ 0x419e10, 1, 0x04, 0x00000002 },
{ 0x419e44, 1, 0x04, 0x001beff2 },
{ 0x419e48, 1, 0x04, 0x00000000 },
{ 0x419e4c, 1, 0x04, 0x0000000f },
{ 0x419e50, 17, 0x04, 0x00000000 },
{ 0x419e98, 1, 0x04, 0x00000000 },
{ 0x419ee0, 1, 0x04, 0x00011110 },
{ 0x419f30, 11, 0x04, 0x00000000 },
};
void
nvc1_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
{
int gpc, tpc;
u32 offset;
mmio_data(0x002000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
mmio_data(0x008000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
mmio_data(0x060000, 0x1000, NV_MEM_ACCESS_RW);
mmio_list(0x408004, 0x00000000, 8, 0);
mmio_list(0x408008, 0x80000018, 0, 0);
mmio_list(0x40800c, 0x00000000, 8, 1);
mmio_list(0x408010, 0x80000000, 0, 0);
mmio_list(0x418810, 0x80000000, 12, 2);
mmio_list(0x419848, 0x10000000, 12, 2);
mmio_list(0x419004, 0x00000000, 8, 1);
mmio_list(0x419008, 0x00000000, 0, 0);
mmio_list(0x418808, 0x00000000, 8, 0);
mmio_list(0x41880c, 0x80000018, 0, 0);
mmio_list(0x405830, 0x02180218, 0, 0);
mmio_list(0x4064c4, 0x0086ffff, 0, 0);
for (gpc = 0, offset = 0; gpc < priv->gpc_nr; gpc++) {
for (tpc = 0; tpc < priv->tpc_nr[gpc]; tpc++) {
u32 addr = TPC_UNIT(gpc, tpc, 0x0520);
mmio_list(addr, 0x12180000 | offset, 0, 0);
offset += 0x0324;
}
for (tpc = 0; tpc < priv->tpc_nr[gpc]; tpc++) {
u32 addr = TPC_UNIT(gpc, tpc, 0x0544);
mmio_list(addr, 0x02180000 | offset, 0, 0);
offset += 0x0324;
}
}
}
void
nvc1_grctx_generate_unkn(struct nvc0_graph_priv *priv)
{
nv_mask(priv, 0x418c6c, 0x00000001, 0x00000001);
nv_mask(priv, 0x41980c, 0x00000010, 0x00000010);
nv_mask(priv, 0x419814, 0x00000004, 0x00000004);
nv_mask(priv, 0x4064c0, 0x80000000, 0x80000000);
nv_mask(priv, 0x405800, 0x08000000, 0x08000000);
nv_mask(priv, 0x419c00, 0x00000008, 0x00000008);
}
static struct nvc0_graph_init *
nvc1_grctx_init_hub[] = {
nvc0_grctx_init_base,
nvc0_grctx_init_unk40xx,
nvc0_grctx_init_unk44xx,
nvc0_grctx_init_unk46xx,
nvc0_grctx_init_unk47xx,
nvc1_grctx_init_unk58xx,
nvc0_grctx_init_unk60xx,
nvc0_grctx_init_unk64xx,
nvc0_grctx_init_unk78xx,
nvc0_grctx_init_unk80xx,
nvc1_grctx_init_rop,
NULL
};
struct nvc0_graph_init *
nvc1_grctx_init_gpc[] = {
nvc1_grctx_init_gpc_0,
nvc0_grctx_init_gpc_1,
nvc1_grctx_init_tpc,
NULL
};
static struct nvc0_graph_mthd
nvc1_grctx_init_mthd[] = {
{ 0x9097, nvc1_grctx_init_9097, },
{ 0x9197, nvc1_grctx_init_9197, },
{ 0x902d, nvc0_grctx_init_902d, },
{ 0x9039, nvc0_grctx_init_9039, },
{ 0x90c0, nvc0_grctx_init_90c0, },
{ 0x902d, nvc0_grctx_init_mthd_magic, },
{}
};
struct nouveau_oclass *
nvc1_grctx_oclass = &(struct nvc0_grctx_oclass) {
.base.handle = NV_ENGCTX(GR, 0xc1),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvc0_graph_context_ctor,
.dtor = nvc0_graph_context_dtor,
.init = _nouveau_graph_context_init,
.fini = _nouveau_graph_context_fini,
.rd32 = _nouveau_graph_context_rd32,
.wr32 = _nouveau_graph_context_wr32,
},
.main = nvc0_grctx_generate_main,
.mods = nvc1_grctx_generate_mods,
.unkn = nvc1_grctx_generate_unkn,
.hub = nvc1_grctx_init_hub,
.gpc = nvc1_grctx_init_gpc,
.icmd = nvc1_grctx_init_icmd,
.mthd = nvc1_grctx_init_mthd,
}.base;

99
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@ -0,0 +1,99 @@
/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "nvc0.h"
static struct nvc0_graph_init
nvc3_grctx_init_tpc[] = {
{ 0x419818, 1, 0x04, 0x00000000 },
{ 0x41983c, 1, 0x04, 0x00038bc7 },
{ 0x419848, 1, 0x04, 0x00000000 },
{ 0x419864, 1, 0x04, 0x0000012a },
{ 0x419888, 1, 0x04, 0x00000000 },
{ 0x419a00, 1, 0x04, 0x000001f0 },
{ 0x419a04, 1, 0x04, 0x00000001 },
{ 0x419a08, 1, 0x04, 0x00000023 },
{ 0x419a0c, 1, 0x04, 0x00020000 },
{ 0x419a10, 1, 0x04, 0x00000000 },
{ 0x419a14, 1, 0x04, 0x00000200 },
{ 0x419a1c, 1, 0x04, 0x00000000 },
{ 0x419a20, 1, 0x04, 0x00000800 },
{ 0x419ac4, 1, 0x04, 0x0007f440 },
{ 0x419b00, 1, 0x04, 0x0a418820 },
{ 0x419b04, 1, 0x04, 0x062080e6 },
{ 0x419b08, 1, 0x04, 0x020398a4 },
{ 0x419b0c, 1, 0x04, 0x0e629062 },
{ 0x419b10, 1, 0x04, 0x0a418820 },
{ 0x419b14, 1, 0x04, 0x000000e6 },
{ 0x419bd0, 1, 0x04, 0x00900103 },
{ 0x419be0, 1, 0x04, 0x00000001 },
{ 0x419be4, 1, 0x04, 0x00000000 },
{ 0x419c00, 1, 0x04, 0x00000002 },
{ 0x419c04, 1, 0x04, 0x00000006 },
{ 0x419c08, 1, 0x04, 0x00000002 },
{ 0x419c20, 1, 0x04, 0x00000000 },
{ 0x419cb0, 1, 0x04, 0x00020048 },
{ 0x419ce8, 1, 0x04, 0x00000000 },
{ 0x419cf4, 1, 0x04, 0x00000183 },
{ 0x419d20, 1, 0x04, 0x02180000 },
{ 0x419d24, 1, 0x04, 0x00001fff },
{ 0x419e04, 3, 0x04, 0x00000000 },
{ 0x419e10, 1, 0x04, 0x00000002 },
{ 0x419e44, 1, 0x04, 0x001beff2 },
{ 0x419e48, 1, 0x04, 0x00000000 },
{ 0x419e4c, 1, 0x04, 0x0000000f },
{ 0x419e50, 17, 0x04, 0x00000000 },
{ 0x419e98, 1, 0x04, 0x00000000 },
{ 0x419ee0, 1, 0x04, 0x00011110 },
{ 0x419f30, 11, 0x04, 0x00000000 },
{}
};
struct nvc0_graph_init *
nvc3_grctx_init_gpc[] = {
nvc0_grctx_init_gpc_0,
nvc0_grctx_init_gpc_1,
nvc3_grctx_init_tpc,
NULL
};
struct nouveau_oclass *
nvc3_grctx_oclass = &(struct nvc0_grctx_oclass) {
.base.handle = NV_ENGCTX(GR, 0xc3),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvc0_graph_context_ctor,
.dtor = nvc0_graph_context_dtor,
.init = _nouveau_graph_context_init,
.fini = _nouveau_graph_context_fini,
.rd32 = _nouveau_graph_context_rd32,
.wr32 = _nouveau_graph_context_wr32,
},
.main = nvc0_grctx_generate_main,
.mods = nvc0_grctx_generate_mods,
.unkn = nvc0_grctx_generate_unkn,
.hub = nvc0_grctx_init_hub,
.gpc = nvc3_grctx_init_gpc,
.icmd = nvc0_grctx_init_icmd,
.mthd = nvc0_grctx_init_mthd,
}.base;

370
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/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "nvc0.h"
static struct nvc0_graph_init
nvc8_grctx_init_icmd[] = {
{ 0x001000, 1, 0x01, 0x00000004 },
{ 0x0000a9, 1, 0x01, 0x0000ffff },
{ 0x000038, 1, 0x01, 0x0fac6881 },
{ 0x00003d, 1, 0x01, 0x00000001 },
{ 0x0000e8, 8, 0x01, 0x00000400 },
{ 0x000078, 8, 0x01, 0x00000300 },
{ 0x000050, 1, 0x01, 0x00000011 },
{ 0x000058, 8, 0x01, 0x00000008 },
{ 0x000208, 8, 0x01, 0x00000001 },
{ 0x000081, 1, 0x01, 0x00000001 },
{ 0x000085, 1, 0x01, 0x00000004 },
{ 0x000088, 1, 0x01, 0x00000400 },
{ 0x000090, 1, 0x01, 0x00000300 },
{ 0x000098, 1, 0x01, 0x00001001 },
{ 0x0000e3, 1, 0x01, 0x00000001 },
{ 0x0000da, 1, 0x01, 0x00000001 },
{ 0x0000f8, 1, 0x01, 0x00000003 },
{ 0x0000fa, 1, 0x01, 0x00000001 },
{ 0x00009f, 4, 0x01, 0x0000ffff },
{ 0x0000b1, 1, 0x01, 0x00000001 },
{ 0x0000b2, 40, 0x01, 0x00000000 },
{ 0x000210, 8, 0x01, 0x00000040 },
{ 0x000218, 8, 0x01, 0x0000c080 },
{ 0x0000ad, 1, 0x01, 0x0000013e },
{ 0x0000e1, 1, 0x01, 0x00000010 },
{ 0x000290, 16, 0x01, 0x00000000 },
{ 0x0003b0, 16, 0x01, 0x00000000 },
{ 0x0002a0, 16, 0x01, 0x00000000 },
{ 0x000420, 16, 0x01, 0x00000000 },
{ 0x0002b0, 16, 0x01, 0x00000000 },
{ 0x000430, 16, 0x01, 0x00000000 },
{ 0x0002c0, 16, 0x01, 0x00000000 },
{ 0x0004d0, 16, 0x01, 0x00000000 },
{ 0x000720, 16, 0x01, 0x00000000 },
{ 0x0008c0, 16, 0x01, 0x00000000 },
{ 0x000890, 16, 0x01, 0x00000000 },
{ 0x0008e0, 16, 0x01, 0x00000000 },
{ 0x0008a0, 16, 0x01, 0x00000000 },
{ 0x0008f0, 16, 0x01, 0x00000000 },
{ 0x00094c, 1, 0x01, 0x000000ff },
{ 0x00094d, 1, 0x01, 0xffffffff },
{ 0x00094e, 1, 0x01, 0x00000002 },
{ 0x0002ec, 1, 0x01, 0x00000001 },
{ 0x000303, 1, 0x01, 0x00000001 },
{ 0x0002e6, 1, 0x01, 0x00000001 },
{ 0x000466, 1, 0x01, 0x00000052 },
{ 0x000301, 1, 0x01, 0x3f800000 },
{ 0x000304, 1, 0x01, 0x30201000 },
{ 0x000305, 1, 0x01, 0x70605040 },
{ 0x000306, 1, 0x01, 0xb8a89888 },
{ 0x000307, 1, 0x01, 0xf8e8d8c8 },
{ 0x00030a, 1, 0x01, 0x00ffff00 },
{ 0x00030b, 1, 0x01, 0x0000001a },
{ 0x00030c, 1, 0x01, 0x00000001 },
{ 0x000318, 1, 0x01, 0x00000001 },
{ 0x000340, 1, 0x01, 0x00000000 },
{ 0x000375, 1, 0x01, 0x00000001 },
{ 0x000351, 1, 0x01, 0x00000100 },
{ 0x00037d, 1, 0x01, 0x00000006 },
{ 0x0003a0, 1, 0x01, 0x00000002 },
{ 0x0003aa, 1, 0x01, 0x00000001 },
{ 0x0003a9, 1, 0x01, 0x00000001 },
{ 0x000380, 1, 0x01, 0x00000001 },
{ 0x000360, 1, 0x01, 0x00000040 },
{ 0x000366, 2, 0x01, 0x00000000 },
{ 0x000368, 1, 0x01, 0x00001fff },
{ 0x000370, 2, 0x01, 0x00000000 },
{ 0x000372, 1, 0x01, 0x003fffff },
{ 0x00037a, 1, 0x01, 0x00000012 },
{ 0x0005e0, 5, 0x01, 0x00000022 },
{ 0x000619, 1, 0x01, 0x00000003 },
{ 0x000811, 1, 0x01, 0x00000003 },
{ 0x000812, 1, 0x01, 0x00000004 },
{ 0x000813, 1, 0x01, 0x00000006 },
{ 0x000814, 1, 0x01, 0x00000008 },
{ 0x000815, 1, 0x01, 0x0000000b },
{ 0x000800, 6, 0x01, 0x00000001 },
{ 0x000632, 1, 0x01, 0x00000001 },
{ 0x000633, 1, 0x01, 0x00000002 },
{ 0x000634, 1, 0x01, 0x00000003 },
{ 0x000635, 1, 0x01, 0x00000004 },
{ 0x000654, 1, 0x01, 0x3f800000 },
{ 0x000657, 1, 0x01, 0x3f800000 },
{ 0x000655, 2, 0x01, 0x3f800000 },
{ 0x0006cd, 1, 0x01, 0x3f800000 },
{ 0x0007f5, 1, 0x01, 0x3f800000 },
{ 0x0007dc, 1, 0x01, 0x39291909 },
{ 0x0007dd, 1, 0x01, 0x79695949 },
{ 0x0007de, 1, 0x01, 0xb9a99989 },
{ 0x0007df, 1, 0x01, 0xf9e9d9c9 },
{ 0x0007e8, 1, 0x01, 0x00003210 },
{ 0x0007e9, 1, 0x01, 0x00007654 },
{ 0x0007ea, 1, 0x01, 0x00000098 },
{ 0x0007ec, 1, 0x01, 0x39291909 },
{ 0x0007ed, 1, 0x01, 0x79695949 },
{ 0x0007ee, 1, 0x01, 0xb9a99989 },
{ 0x0007ef, 1, 0x01, 0xf9e9d9c9 },
{ 0x0007f0, 1, 0x01, 0x00003210 },
{ 0x0007f1, 1, 0x01, 0x00007654 },
{ 0x0007f2, 1, 0x01, 0x00000098 },
{ 0x0005a5, 1, 0x01, 0x00000001 },
{ 0x000980, 128, 0x01, 0x00000000 },
{ 0x000468, 1, 0x01, 0x00000004 },
{ 0x00046c, 1, 0x01, 0x00000001 },
{ 0x000470, 96, 0x01, 0x00000000 },
{ 0x000510, 16, 0x01, 0x3f800000 },
{ 0x000520, 1, 0x01, 0x000002b6 },
{ 0x000529, 1, 0x01, 0x00000001 },
{ 0x000530, 16, 0x01, 0xffff0000 },
{ 0x000585, 1, 0x01, 0x0000003f },
{ 0x000576, 1, 0x01, 0x00000003 },
{ 0x00057b, 1, 0x01, 0x00000059 },
{ 0x000586, 1, 0x01, 0x00000040 },
{ 0x000582, 2, 0x01, 0x00000080 },
{ 0x0005c2, 1, 0x01, 0x00000001 },
{ 0x000638, 1, 0x01, 0x00000001 },
{ 0x000639, 1, 0x01, 0x00000001 },
{ 0x00063a, 1, 0x01, 0x00000002 },
{ 0x00063b, 2, 0x01, 0x00000001 },
{ 0x00063d, 1, 0x01, 0x00000002 },
{ 0x00063e, 1, 0x01, 0x00000001 },
{ 0x0008b8, 8, 0x01, 0x00000001 },
{ 0x000900, 8, 0x01, 0x00000001 },
{ 0x000908, 8, 0x01, 0x00000002 },
{ 0x000910, 16, 0x01, 0x00000001 },
{ 0x000920, 8, 0x01, 0x00000002 },
{ 0x000928, 8, 0x01, 0x00000001 },
{ 0x000648, 9, 0x01, 0x00000001 },
{ 0x000658, 1, 0x01, 0x0000000f },
{ 0x0007ff, 1, 0x01, 0x0000000a },
{ 0x00066a, 1, 0x01, 0x40000000 },
{ 0x00066b, 1, 0x01, 0x10000000 },
{ 0x00066c, 2, 0x01, 0xffff0000 },
{ 0x0007af, 2, 0x01, 0x00000008 },
{ 0x0007f6, 1, 0x01, 0x00000001 },
{ 0x0006b2, 1, 0x01, 0x00000055 },
{ 0x0007ad, 1, 0x01, 0x00000003 },
{ 0x000937, 1, 0x01, 0x00000001 },
{ 0x000971, 1, 0x01, 0x00000008 },
{ 0x000972, 1, 0x01, 0x00000040 },
{ 0x000973, 1, 0x01, 0x0000012c },
{ 0x00097c, 1, 0x01, 0x00000040 },
{ 0x000979, 1, 0x01, 0x00000003 },
{ 0x000975, 1, 0x01, 0x00000020 },
{ 0x000976, 1, 0x01, 0x00000001 },
{ 0x000977, 1, 0x01, 0x00000020 },
{ 0x000978, 1, 0x01, 0x00000001 },
{ 0x000957, 1, 0x01, 0x00000003 },
{ 0x00095e, 1, 0x01, 0x20164010 },
{ 0x00095f, 1, 0x01, 0x00000020 },
{ 0x00097d, 1, 0x01, 0x00000020 },
{ 0x000683, 1, 0x01, 0x00000006 },
{ 0x000685, 1, 0x01, 0x003fffff },
{ 0x000687, 1, 0x01, 0x00000c48 },
{ 0x0006a0, 1, 0x01, 0x00000005 },
{ 0x000840, 1, 0x01, 0x00300008 },
{ 0x000841, 1, 0x01, 0x04000080 },
{ 0x000842, 1, 0x01, 0x00300008 },
{ 0x000843, 1, 0x01, 0x04000080 },
{ 0x000818, 8, 0x01, 0x00000000 },
{ 0x000848, 16, 0x01, 0x00000000 },
{ 0x000738, 1, 0x01, 0x00000000 },
{ 0x0006aa, 1, 0x01, 0x00000001 },
{ 0x0006ab, 1, 0x01, 0x00000002 },
{ 0x0006ac, 1, 0x01, 0x00000080 },
{ 0x0006ad, 2, 0x01, 0x00000100 },
{ 0x0006b1, 1, 0x01, 0x00000011 },
{ 0x0006bb, 1, 0x01, 0x000000cf },
{ 0x0006ce, 1, 0x01, 0x2a712488 },
{ 0x000739, 1, 0x01, 0x4085c000 },
{ 0x00073a, 1, 0x01, 0x00000080 },
{ 0x000786, 1, 0x01, 0x80000100 },
{ 0x00073c, 1, 0x01, 0x00010100 },
{ 0x00073d, 1, 0x01, 0x02800000 },
{ 0x000787, 1, 0x01, 0x000000cf },
{ 0x00078c, 1, 0x01, 0x00000008 },
{ 0x000792, 1, 0x01, 0x00000001 },
{ 0x000794, 1, 0x01, 0x00000001 },
{ 0x000795, 2, 0x01, 0x00000001 },
{ 0x000797, 1, 0x01, 0x000000cf },
{ 0x000836, 1, 0x01, 0x00000001 },
{ 0x00079a, 1, 0x01, 0x00000002 },
{ 0x000833, 1, 0x01, 0x04444480 },
{ 0x0007a1, 1, 0x01, 0x00000001 },
{ 0x0007a3, 1, 0x01, 0x00000001 },
{ 0x0007a4, 2, 0x01, 0x00000001 },
{ 0x000831, 1, 0x01, 0x00000004 },
{ 0x00080c, 1, 0x01, 0x00000002 },
{ 0x00080d, 2, 0x01, 0x00000100 },
{ 0x00080f, 1, 0x01, 0x00000001 },
{ 0x000823, 1, 0x01, 0x00000002 },
{ 0x000824, 2, 0x01, 0x00000100 },
{ 0x000826, 1, 0x01, 0x00000001 },
{ 0x00095d, 1, 0x01, 0x00000001 },
{ 0x00082b, 1, 0x01, 0x00000004 },
{ 0x000942, 1, 0x01, 0x00010001 },
{ 0x000943, 1, 0x01, 0x00000001 },
{ 0x000944, 1, 0x01, 0x00000022 },
{ 0x0007c5, 1, 0x01, 0x00010001 },
{ 0x000834, 1, 0x01, 0x00000001 },
{ 0x0007c7, 1, 0x01, 0x00000001 },
{ 0x00c1b0, 8, 0x01, 0x0000000f },
{ 0x00c1b8, 1, 0x01, 0x0fac6881 },
{ 0x00c1b9, 1, 0x01, 0x00fac688 },
{ 0x01e100, 1, 0x01, 0x00000001 },
{ 0x001000, 1, 0x01, 0x00000002 },
{ 0x0006aa, 1, 0x01, 0x00000001 },
{ 0x0006ad, 2, 0x01, 0x00000100 },
{ 0x0006b1, 1, 0x01, 0x00000011 },
{ 0x00078c, 1, 0x01, 0x00000008 },
{ 0x000792, 1, 0x01, 0x00000001 },
{ 0x000794, 1, 0x01, 0x00000001 },
{ 0x000795, 2, 0x01, 0x00000001 },
{ 0x000797, 1, 0x01, 0x000000cf },
{ 0x00079a, 1, 0x01, 0x00000002 },
{ 0x000833, 1, 0x01, 0x04444480 },
{ 0x0007a1, 1, 0x01, 0x00000001 },
{ 0x0007a3, 1, 0x01, 0x00000001 },
{ 0x0007a4, 2, 0x01, 0x00000001 },
{ 0x000831, 1, 0x01, 0x00000004 },
{ 0x01e100, 1, 0x01, 0x00000001 },
{ 0x001000, 1, 0x01, 0x00000014 },
{ 0x000351, 1, 0x01, 0x00000100 },
{ 0x000957, 1, 0x01, 0x00000003 },
{ 0x00095d, 1, 0x01, 0x00000001 },
{ 0x00082b, 1, 0x01, 0x00000004 },
{ 0x000942, 1, 0x01, 0x00010001 },
{ 0x000943, 1, 0x01, 0x00000001 },
{ 0x0007c5, 1, 0x01, 0x00010001 },
{ 0x000834, 1, 0x01, 0x00000001 },
{ 0x0007c7, 1, 0x01, 0x00000001 },
{ 0x01e100, 1, 0x01, 0x00000001 },
{ 0x001000, 1, 0x01, 0x00000001 },
{ 0x00080c, 1, 0x01, 0x00000002 },
{ 0x00080d, 2, 0x01, 0x00000100 },
{ 0x00080f, 1, 0x01, 0x00000001 },
{ 0x000823, 1, 0x01, 0x00000002 },
{ 0x000824, 2, 0x01, 0x00000100 },
{ 0x000826, 1, 0x01, 0x00000001 },
{ 0x01e100, 1, 0x01, 0x00000001 },
{}
};
static struct nvc0_graph_init
nvc8_grctx_init_tpc[] = {
{ 0x419818, 1, 0x04, 0x00000000 },
{ 0x41983c, 1, 0x04, 0x00038bc7 },
{ 0x419848, 1, 0x04, 0x00000000 },
{ 0x419864, 1, 0x04, 0x0000012a },
{ 0x419888, 1, 0x04, 0x00000000 },
{ 0x419a00, 1, 0x04, 0x000001f0 },
{ 0x419a04, 1, 0x04, 0x00000001 },
{ 0x419a08, 1, 0x04, 0x00000023 },
{ 0x419a0c, 1, 0x04, 0x00020000 },
{ 0x419a10, 1, 0x04, 0x00000000 },
{ 0x419a14, 1, 0x04, 0x00000200 },
{ 0x419a1c, 1, 0x04, 0x00000000 },
{ 0x419a20, 1, 0x04, 0x00000800 },
{ 0x419b00, 1, 0x04, 0x0a418820 },
{ 0x419b04, 1, 0x04, 0x062080e6 },
{ 0x419b08, 1, 0x04, 0x020398a4 },
{ 0x419b0c, 1, 0x04, 0x0e629062 },
{ 0x419b10, 1, 0x04, 0x0a418820 },
{ 0x419b14, 1, 0x04, 0x000000e6 },
{ 0x419bd0, 1, 0x04, 0x00900103 },
{ 0x419be0, 1, 0x04, 0x00000001 },
{ 0x419be4, 1, 0x04, 0x00000000 },
{ 0x419c00, 1, 0x04, 0x00000002 },
{ 0x419c04, 1, 0x04, 0x00000006 },
{ 0x419c08, 1, 0x04, 0x00000002 },
{ 0x419c20, 1, 0x04, 0x00000000 },
{ 0x419cb0, 1, 0x04, 0x00060048 },
{ 0x419ce8, 1, 0x04, 0x00000000 },
{ 0x419cf4, 1, 0x04, 0x00000183 },
{ 0x419d20, 1, 0x04, 0x02180000 },
{ 0x419d24, 1, 0x04, 0x00001fff },
{ 0x419e04, 3, 0x04, 0x00000000 },
{ 0x419e10, 1, 0x04, 0x00000002 },
{ 0x419e44, 1, 0x04, 0x001beff2 },
{ 0x419e48, 1, 0x04, 0x00000000 },
{ 0x419e4c, 1, 0x04, 0x0000000f },
{ 0x419e50, 17, 0x04, 0x00000000 },
{ 0x419e98, 1, 0x04, 0x00000000 },
{ 0x419f50, 2, 0x04, 0x00000000 },
{}
};
struct nvc0_graph_init
nvc8_grctx_init_9197[] = {
{ 0x0002e4, 1, 0x04, 0x0000b001 },
{}
};
struct nvc0_graph_init
nvc8_grctx_init_9297[] = {
{ 0x003400, 128, 0x04, 0x00000000 },
{ 0x00036c, 2, 0x04, 0x00000000 },
{ 0x0007a4, 2, 0x04, 0x00000000 },
{ 0x000374, 1, 0x04, 0x00000000 },
{ 0x000378, 1, 0x04, 0x00000020 },
{}
};
static struct nvc0_graph_mthd
nvc8_grctx_init_mthd[] = {
{ 0x9097, nvc1_grctx_init_9097, },
{ 0x9197, nvc8_grctx_init_9197, },
{ 0x9297, nvc8_grctx_init_9297, },
{ 0x902d, nvc0_grctx_init_902d, },
{ 0x9039, nvc0_grctx_init_9039, },
{ 0x90c0, nvc0_grctx_init_90c0, },
{ 0x902d, nvc0_grctx_init_mthd_magic, },
{}
};
static struct nvc0_graph_init *
nvc8_grctx_init_gpc[] = {
nvc0_grctx_init_gpc_0,
nvc0_grctx_init_gpc_1,
nvc8_grctx_init_tpc,
NULL
};
struct nouveau_oclass *
nvc8_grctx_oclass = &(struct nvc0_grctx_oclass) {
.base.handle = NV_ENGCTX(GR, 0xc8),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvc0_graph_context_ctor,
.dtor = nvc0_graph_context_dtor,
.init = _nouveau_graph_context_init,
.fini = _nouveau_graph_context_fini,
.rd32 = _nouveau_graph_context_rd32,
.wr32 = _nouveau_graph_context_wr32,
},
.main = nvc0_grctx_generate_main,
.mods = nvc0_grctx_generate_mods,
.unkn = nvc0_grctx_generate_unkn,
.hub = nvc0_grctx_init_hub,
.gpc = nvc8_grctx_init_gpc,
.icmd = nvc8_grctx_init_icmd,
.mthd = nvc8_grctx_init_mthd,
}.base;

290
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c Normal file
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@ -0,0 +1,290 @@
/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "nvc0.h"
struct nvc0_graph_init
nvd7_grctx_init_unk40xx[] = {
{ 0x404004, 10, 0x04, 0x00000000 },
{ 0x404044, 1, 0x04, 0x00000000 },
{ 0x404094, 1, 0x04, 0x00000000 },
{ 0x404098, 12, 0x04, 0x00000000 },
{ 0x4040c8, 1, 0x04, 0xf0000087 },
{ 0x4040d0, 6, 0x04, 0x00000000 },
{ 0x4040e8, 1, 0x04, 0x00001000 },
{ 0x4040f8, 1, 0x04, 0x00000000 },
{ 0x404130, 1, 0x04, 0x00000000 },
{ 0x404134, 1, 0x04, 0x00000000 },
{ 0x404138, 1, 0x04, 0x20000040 },
{ 0x404150, 1, 0x04, 0x0000002e },
{ 0x404154, 1, 0x04, 0x00000400 },
{ 0x404158, 1, 0x04, 0x00000200 },
{ 0x404164, 1, 0x04, 0x00000055 },
{ 0x404168, 1, 0x04, 0x00000000 },
{ 0x404178, 2, 0x04, 0x00000000 },
{ 0x404200, 8, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvd7_grctx_init_unk58xx[] = {
{ 0x405800, 1, 0x04, 0x0f8000bf },
{ 0x405830, 1, 0x04, 0x02180324 },
{ 0x405834, 1, 0x04, 0x08000000 },
{ 0x405838, 1, 0x04, 0x00000000 },
{ 0x405854, 1, 0x04, 0x00000000 },
{ 0x405870, 4, 0x04, 0x00000001 },
{ 0x405a00, 2, 0x04, 0x00000000 },
{ 0x405a18, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvd7_grctx_init_unk64xx[] = {
{ 0x4064a8, 1, 0x04, 0x00000000 },
{ 0x4064ac, 1, 0x04, 0x00003fff },
{ 0x4064b4, 3, 0x04, 0x00000000 },
{ 0x4064c0, 1, 0x04, 0x801a0078 },
{ 0x4064c4, 1, 0x04, 0x00c9ffff },
{ 0x4064d0, 8, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvd7_grctx_init_gpc_0[] = {
{ 0x418380, 1, 0x04, 0x00000016 },
{ 0x418400, 1, 0x04, 0x38004e00 },
{ 0x418404, 1, 0x04, 0x71e0ffff },
{ 0x41840c, 1, 0x04, 0x00001008 },
{ 0x418410, 1, 0x04, 0x0fff0fff },
{ 0x418414, 1, 0x04, 0x02200fff },
{ 0x418450, 6, 0x04, 0x00000000 },
{ 0x418468, 1, 0x04, 0x00000001 },
{ 0x41846c, 2, 0x04, 0x00000000 },
{ 0x418600, 1, 0x04, 0x0000001f },
{ 0x418684, 1, 0x04, 0x0000000f },
{ 0x418700, 1, 0x04, 0x00000002 },
{ 0x418704, 1, 0x04, 0x00000080 },
{ 0x418708, 3, 0x04, 0x00000000 },
{ 0x418800, 1, 0x04, 0x7006860a },
{ 0x418808, 3, 0x04, 0x00000000 },
{ 0x418828, 1, 0x04, 0x00008442 },
{ 0x418830, 1, 0x04, 0x10000001 },
{ 0x4188d8, 1, 0x04, 0x00000008 },
{ 0x4188e0, 1, 0x04, 0x01000000 },
{ 0x4188e8, 5, 0x04, 0x00000000 },
{ 0x4188fc, 1, 0x04, 0x20100018 },
{ 0x41891c, 1, 0x04, 0x00ff00ff },
{ 0x418924, 1, 0x04, 0x00000000 },
{ 0x418928, 1, 0x04, 0x00ffff00 },
{ 0x41892c, 1, 0x04, 0x0000ff00 },
{ 0x418b00, 1, 0x04, 0x00000006 },
{ 0x418b08, 1, 0x04, 0x0a418820 },
{ 0x418b0c, 1, 0x04, 0x062080e6 },
{ 0x418b10, 1, 0x04, 0x020398a4 },
{ 0x418b14, 1, 0x04, 0x0e629062 },
{ 0x418b18, 1, 0x04, 0x0a418820 },
{ 0x418b1c, 1, 0x04, 0x000000e6 },
{ 0x418bb8, 1, 0x04, 0x00000103 },
{ 0x418c08, 1, 0x04, 0x00000001 },
{ 0x418c10, 8, 0x04, 0x00000000 },
{ 0x418c6c, 1, 0x04, 0x00000001 },
{ 0x418c80, 1, 0x04, 0x20200004 },
{ 0x418c8c, 1, 0x04, 0x00000001 },
{ 0x419000, 1, 0x04, 0x00000780 },
{ 0x419004, 2, 0x04, 0x00000000 },
{ 0x419014, 1, 0x04, 0x00000004 },
{}
};
static struct nvc0_graph_init
nvd7_grctx_init_tpc[] = {
{ 0x419848, 1, 0x04, 0x00000000 },
{ 0x419864, 1, 0x04, 0x00000129 },
{ 0x419888, 1, 0x04, 0x00000000 },
{ 0x419a00, 1, 0x04, 0x000001f0 },
{ 0x419a04, 1, 0x04, 0x00000001 },
{ 0x419a08, 1, 0x04, 0x00000023 },
{ 0x419a0c, 1, 0x04, 0x00020000 },
{ 0x419a10, 1, 0x04, 0x00000000 },
{ 0x419a14, 1, 0x04, 0x00000200 },
{ 0x419a1c, 1, 0x04, 0x00008000 },
{ 0x419a20, 1, 0x04, 0x00000800 },
{ 0x419ac4, 1, 0x04, 0x0017f440 },
{ 0x419c00, 1, 0x04, 0x0000000a },
{ 0x419c04, 1, 0x04, 0x00000006 },
{ 0x419c08, 1, 0x04, 0x00000002 },
{ 0x419c20, 1, 0x04, 0x00000000 },
{ 0x419c24, 1, 0x04, 0x00084210 },
{ 0x419c28, 1, 0x04, 0x3efbefbe },
{ 0x419cb0, 1, 0x04, 0x00020048 },
{ 0x419ce8, 1, 0x04, 0x00000000 },
{ 0x419cf4, 1, 0x04, 0x00000183 },
{ 0x419e04, 3, 0x04, 0x00000000 },
{ 0x419e10, 1, 0x04, 0x00000002 },
{ 0x419e44, 1, 0x04, 0x001beff2 },
{ 0x419e48, 1, 0x04, 0x00000000 },
{ 0x419e4c, 1, 0x04, 0x0000000f },
{ 0x419e50, 17, 0x04, 0x00000000 },
{ 0x419e98, 1, 0x04, 0x00000000 },
{ 0x419ee0, 1, 0x04, 0x00010110 },
{ 0x419f30, 11, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvd7_grctx_init_unk[] = {
{ 0x41be24, 1, 0x04, 0x00000002 },
{ 0x41bec0, 1, 0x04, 0x12180000 },
{ 0x41bec4, 1, 0x04, 0x00003fff },
{ 0x41bee4, 1, 0x04, 0x03240218 },
{ 0x41bf00, 1, 0x04, 0x0a418820 },
{ 0x41bf04, 1, 0x04, 0x062080e6 },
{ 0x41bf08, 1, 0x04, 0x020398a4 },
{ 0x41bf0c, 1, 0x04, 0x0e629062 },
{ 0x41bf10, 1, 0x04, 0x0a418820 },
{ 0x41bf14, 1, 0x04, 0x000000e6 },
{ 0x41bfd0, 1, 0x04, 0x00900103 },
{ 0x41bfe0, 1, 0x04, 0x00400001 },
{ 0x41bfe4, 1, 0x04, 0x00000000 },
{}
};
static void
nvd7_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
{
u32 magic[GPC_MAX][2];
u32 offset;
int gpc;
mmio_data(0x003000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
mmio_data(0x008000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
mmio_data(0x060000, 0x1000, NV_MEM_ACCESS_RW);
mmio_list(0x40800c, 0x00000000, 8, 1);
mmio_list(0x408010, 0x80000000, 0, 0);
mmio_list(0x419004, 0x00000000, 8, 1);
mmio_list(0x419008, 0x00000000, 0, 0);
mmio_list(0x408004, 0x00000000, 8, 0);
mmio_list(0x408008, 0x80000018, 0, 0);
mmio_list(0x418808, 0x00000000, 8, 0);
mmio_list(0x41880c, 0x80000018, 0, 0);
mmio_list(0x418810, 0x80000000, 12, 2);
mmio_list(0x419848, 0x10000000, 12, 2);
mmio_list(0x405830, 0x02180324, 0, 0);
mmio_list(0x4064c4, 0x00c9ffff, 0, 0);
for (gpc = 0, offset = 0; gpc < priv->gpc_nr; gpc++) {
u16 magic0 = 0x0218 * priv->tpc_nr[gpc];
u16 magic1 = 0x0324 * priv->tpc_nr[gpc];
magic[gpc][0] = 0x10000000 | (magic0 << 16) | offset;
magic[gpc][1] = 0x00000000 | (magic1 << 16);
offset += 0x0324 * priv->tpc_nr[gpc];
}
for (gpc = 0; gpc < priv->gpc_nr; gpc++) {
mmio_list(GPC_UNIT(gpc, 0x30c0), magic[gpc][0], 0, 0);
mmio_list(GPC_UNIT(gpc, 0x30e4), magic[gpc][1] | offset, 0, 0);
offset += 0x07ff * priv->tpc_nr[gpc];
}
mmio_list(0x17e91c, 0x03060609, 0, 0); /* different from kepler */
}
void
nvd7_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
{
struct nvc0_grctx_oclass *oclass = (void *)nv_engine(priv)->cclass;
int i;
nv_mask(priv, 0x000260, 0x00000001, 0x00000000);
for (i = 0; oclass->hub[i]; i++)
nvc0_graph_mmio(priv, oclass->hub[i]);
for (i = 0; oclass->gpc[i]; i++)
nvc0_graph_mmio(priv, oclass->gpc[i]);
nv_wr32(priv, 0x404154, 0x00000000);
oclass->mods(priv, info);
oclass->unkn(priv);
nvc0_grctx_generate_tpcid(priv);
nvc0_grctx_generate_r406028(priv);
nvc0_grctx_generate_r4060a8(priv);
nve4_grctx_generate_r418bb8(priv);
nvc0_grctx_generate_r406800(priv);
for (i = 0; i < 8; i++)
nv_wr32(priv, 0x4064d0 + (i * 0x04), 0x00000000);
nvc0_graph_icmd(priv, oclass->icmd);
nv_wr32(priv, 0x404154, 0x00000400);
nvc0_graph_mthd(priv, oclass->mthd);
nv_mask(priv, 0x000260, 0x00000001, 0x00000001);
}
static struct nvc0_graph_init *
nvd7_grctx_init_hub[] = {
nvc0_grctx_init_base,
nvd7_grctx_init_unk40xx,
nvc0_grctx_init_unk44xx,
nvc0_grctx_init_unk46xx,
nvc0_grctx_init_unk47xx,
nvd7_grctx_init_unk58xx,
nvc0_grctx_init_unk60xx,
nvd7_grctx_init_unk64xx,
nvc0_grctx_init_unk78xx,
nvc0_grctx_init_unk80xx,
nvd9_grctx_init_rop,
};
struct nvc0_graph_init *
nvd7_grctx_init_gpc[] = {
nvd7_grctx_init_gpc_0,
nvc0_grctx_init_gpc_1,
nvd7_grctx_init_tpc,
nvd7_grctx_init_unk,
NULL
};
struct nouveau_oclass *
nvd7_grctx_oclass = &(struct nvc0_grctx_oclass) {
.base.handle = NV_ENGCTX(GR, 0xd7),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvc0_graph_context_ctor,
.dtor = nvc0_graph_context_dtor,
.init = _nouveau_graph_context_init,
.fini = _nouveau_graph_context_fini,
.rd32 = _nouveau_graph_context_rd32,
.wr32 = _nouveau_graph_context_wr32,
},
.main = nvd7_grctx_generate_main,
.mods = nvd7_grctx_generate_mods,
.unkn = nve4_grctx_generate_unkn,
.hub = nvd7_grctx_init_hub,
.gpc = nvd7_grctx_init_gpc,
.icmd = nvd9_grctx_init_icmd,
.mthd = nvd9_grctx_init_mthd,
}.base;

515
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c Normal file
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@ -0,0 +1,515 @@
/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "nvc0.h"
struct nvc0_graph_init
nvd9_grctx_init_90c0[] = {
{ 0x002700, 4, 0x40, 0x00000000 },
{ 0x002720, 4, 0x40, 0x00000000 },
{ 0x002704, 4, 0x40, 0x00000000 },
{ 0x002724, 4, 0x40, 0x00000000 },
{ 0x002708, 4, 0x40, 0x00000000 },
{ 0x002728, 4, 0x40, 0x00000000 },
{ 0x00270c, 8, 0x20, 0x00000000 },
{ 0x002710, 4, 0x40, 0x00014000 },
{ 0x002730, 4, 0x40, 0x00014000 },
{ 0x002714, 4, 0x40, 0x00000040 },
{ 0x002734, 4, 0x40, 0x00000040 },
{ 0x00030c, 1, 0x04, 0x00000001 },
{ 0x001944, 1, 0x04, 0x00000000 },
{ 0x000758, 1, 0x04, 0x00000100 },
{ 0x0002c4, 1, 0x04, 0x00000000 },
{ 0x000790, 5, 0x04, 0x00000000 },
{ 0x00077c, 1, 0x04, 0x00000000 },
{ 0x000204, 3, 0x04, 0x00000000 },
{ 0x000214, 1, 0x04, 0x00000000 },
{ 0x00024c, 1, 0x04, 0x00000000 },
{ 0x000d94, 1, 0x04, 0x00000001 },
{ 0x001608, 2, 0x04, 0x00000000 },
{ 0x001664, 1, 0x04, 0x00000000 },
{}
};
struct nvc0_graph_init
nvd9_grctx_init_icmd[] = {
{ 0x001000, 1, 0x01, 0x00000004 },
{ 0x0000a9, 1, 0x01, 0x0000ffff },
{ 0x000038, 1, 0x01, 0x0fac6881 },
{ 0x00003d, 1, 0x01, 0x00000001 },
{ 0x0000e8, 8, 0x01, 0x00000400 },
{ 0x000078, 8, 0x01, 0x00000300 },
{ 0x000050, 1, 0x01, 0x00000011 },
{ 0x000058, 8, 0x01, 0x00000008 },
{ 0x000208, 8, 0x01, 0x00000001 },
{ 0x000081, 1, 0x01, 0x00000001 },
{ 0x000085, 1, 0x01, 0x00000004 },
{ 0x000088, 1, 0x01, 0x00000400 },
{ 0x000090, 1, 0x01, 0x00000300 },
{ 0x000098, 1, 0x01, 0x00001001 },
{ 0x0000e3, 1, 0x01, 0x00000001 },
{ 0x0000da, 1, 0x01, 0x00000001 },
{ 0x0000f8, 1, 0x01, 0x00000003 },
{ 0x0000fa, 1, 0x01, 0x00000001 },
{ 0x00009f, 4, 0x01, 0x0000ffff },
{ 0x0000b1, 1, 0x01, 0x00000001 },
{ 0x0000b2, 40, 0x01, 0x00000000 },
{ 0x000210, 8, 0x01, 0x00000040 },
{ 0x000400, 24, 0x01, 0x00000040 },
{ 0x000218, 8, 0x01, 0x0000c080 },
{ 0x000440, 24, 0x01, 0x0000c080 },
{ 0x0000ad, 1, 0x01, 0x0000013e },
{ 0x0000e1, 1, 0x01, 0x00000010 },
{ 0x000290, 16, 0x01, 0x00000000 },
{ 0x0003b0, 16, 0x01, 0x00000000 },
{ 0x0002a0, 16, 0x01, 0x00000000 },
{ 0x000420, 16, 0x01, 0x00000000 },
{ 0x0002b0, 16, 0x01, 0x00000000 },
{ 0x000430, 16, 0x01, 0x00000000 },
{ 0x0002c0, 16, 0x01, 0x00000000 },
{ 0x0004d0, 16, 0x01, 0x00000000 },
{ 0x000720, 16, 0x01, 0x00000000 },
{ 0x0008c0, 16, 0x01, 0x00000000 },
{ 0x000890, 16, 0x01, 0x00000000 },
{ 0x0008e0, 16, 0x01, 0x00000000 },
{ 0x0008a0, 16, 0x01, 0x00000000 },
{ 0x0008f0, 16, 0x01, 0x00000000 },
{ 0x00094c, 1, 0x01, 0x000000ff },
{ 0x00094d, 1, 0x01, 0xffffffff },
{ 0x00094e, 1, 0x01, 0x00000002 },
{ 0x0002ec, 1, 0x01, 0x00000001 },
{ 0x000303, 1, 0x01, 0x00000001 },
{ 0x0002e6, 1, 0x01, 0x00000001 },
{ 0x000466, 1, 0x01, 0x00000052 },
{ 0x000301, 1, 0x01, 0x3f800000 },
{ 0x000304, 1, 0x01, 0x30201000 },
{ 0x000305, 1, 0x01, 0x70605040 },
{ 0x000306, 1, 0x01, 0xb8a89888 },
{ 0x000307, 1, 0x01, 0xf8e8d8c8 },
{ 0x00030a, 1, 0x01, 0x00ffff00 },
{ 0x00030b, 1, 0x01, 0x0000001a },
{ 0x00030c, 1, 0x01, 0x00000001 },
{ 0x000318, 1, 0x01, 0x00000001 },
{ 0x000340, 1, 0x01, 0x00000000 },
{ 0x000375, 1, 0x01, 0x00000001 },
{ 0x000351, 1, 0x01, 0x00000100 },
{ 0x00037d, 1, 0x01, 0x00000006 },
{ 0x0003a0, 1, 0x01, 0x00000002 },
{ 0x0003aa, 1, 0x01, 0x00000001 },
{ 0x0003a9, 1, 0x01, 0x00000001 },
{ 0x000380, 1, 0x01, 0x00000001 },
{ 0x000360, 1, 0x01, 0x00000040 },
{ 0x000366, 2, 0x01, 0x00000000 },
{ 0x000368, 1, 0x01, 0x00001fff },
{ 0x000370, 2, 0x01, 0x00000000 },
{ 0x000372, 1, 0x01, 0x003fffff },
{ 0x00037a, 1, 0x01, 0x00000012 },
{ 0x0005e0, 5, 0x01, 0x00000022 },
{ 0x000619, 1, 0x01, 0x00000003 },
{ 0x000811, 1, 0x01, 0x00000003 },
{ 0x000812, 1, 0x01, 0x00000004 },
{ 0x000813, 1, 0x01, 0x00000006 },
{ 0x000814, 1, 0x01, 0x00000008 },
{ 0x000815, 1, 0x01, 0x0000000b },
{ 0x000800, 6, 0x01, 0x00000001 },
{ 0x000632, 1, 0x01, 0x00000001 },
{ 0x000633, 1, 0x01, 0x00000002 },
{ 0x000634, 1, 0x01, 0x00000003 },
{ 0x000635, 1, 0x01, 0x00000004 },
{ 0x000654, 1, 0x01, 0x3f800000 },
{ 0x000657, 1, 0x01, 0x3f800000 },
{ 0x000655, 2, 0x01, 0x3f800000 },
{ 0x0006cd, 1, 0x01, 0x3f800000 },
{ 0x0007f5, 1, 0x01, 0x3f800000 },
{ 0x0007dc, 1, 0x01, 0x39291909 },
{ 0x0007dd, 1, 0x01, 0x79695949 },
{ 0x0007de, 1, 0x01, 0xb9a99989 },
{ 0x0007df, 1, 0x01, 0xf9e9d9c9 },
{ 0x0007e8, 1, 0x01, 0x00003210 },
{ 0x0007e9, 1, 0x01, 0x00007654 },
{ 0x0007ea, 1, 0x01, 0x00000098 },
{ 0x0007ec, 1, 0x01, 0x39291909 },
{ 0x0007ed, 1, 0x01, 0x79695949 },
{ 0x0007ee, 1, 0x01, 0xb9a99989 },
{ 0x0007ef, 1, 0x01, 0xf9e9d9c9 },
{ 0x0007f0, 1, 0x01, 0x00003210 },
{ 0x0007f1, 1, 0x01, 0x00007654 },
{ 0x0007f2, 1, 0x01, 0x00000098 },
{ 0x0005a5, 1, 0x01, 0x00000001 },
{ 0x000980, 128, 0x01, 0x00000000 },
{ 0x000468, 1, 0x01, 0x00000004 },
{ 0x00046c, 1, 0x01, 0x00000001 },
{ 0x000470, 96, 0x01, 0x00000000 },
{ 0x000510, 16, 0x01, 0x3f800000 },
{ 0x000520, 1, 0x01, 0x000002b6 },
{ 0x000529, 1, 0x01, 0x00000001 },
{ 0x000530, 16, 0x01, 0xffff0000 },
{ 0x000585, 1, 0x01, 0x0000003f },
{ 0x000576, 1, 0x01, 0x00000003 },
{ 0x00057b, 1, 0x01, 0x00000059 },
{ 0x000586, 1, 0x01, 0x00000040 },
{ 0x000582, 2, 0x01, 0x00000080 },
{ 0x0005c2, 1, 0x01, 0x00000001 },
{ 0x000638, 1, 0x01, 0x00000001 },
{ 0x000639, 1, 0x01, 0x00000001 },
{ 0x00063a, 1, 0x01, 0x00000002 },
{ 0x00063b, 2, 0x01, 0x00000001 },
{ 0x00063d, 1, 0x01, 0x00000002 },
{ 0x00063e, 1, 0x01, 0x00000001 },
{ 0x0008b8, 8, 0x01, 0x00000001 },
{ 0x000900, 8, 0x01, 0x00000001 },
{ 0x000908, 8, 0x01, 0x00000002 },
{ 0x000910, 16, 0x01, 0x00000001 },
{ 0x000920, 8, 0x01, 0x00000002 },
{ 0x000928, 8, 0x01, 0x00000001 },
{ 0x000648, 9, 0x01, 0x00000001 },
{ 0x000658, 1, 0x01, 0x0000000f },
{ 0x0007ff, 1, 0x01, 0x0000000a },
{ 0x00066a, 1, 0x01, 0x40000000 },
{ 0x00066b, 1, 0x01, 0x10000000 },
{ 0x00066c, 2, 0x01, 0xffff0000 },
{ 0x0007af, 2, 0x01, 0x00000008 },
{ 0x0007f6, 1, 0x01, 0x00000001 },
{ 0x0006b2, 1, 0x01, 0x00000055 },
{ 0x0007ad, 1, 0x01, 0x00000003 },
{ 0x000937, 1, 0x01, 0x00000001 },
{ 0x000971, 1, 0x01, 0x00000008 },
{ 0x000972, 1, 0x01, 0x00000040 },
{ 0x000973, 1, 0x01, 0x0000012c },
{ 0x00097c, 1, 0x01, 0x00000040 },
{ 0x000979, 1, 0x01, 0x00000003 },
{ 0x000975, 1, 0x01, 0x00000020 },
{ 0x000976, 1, 0x01, 0x00000001 },
{ 0x000977, 1, 0x01, 0x00000020 },
{ 0x000978, 1, 0x01, 0x00000001 },
{ 0x000957, 1, 0x01, 0x00000003 },
{ 0x00095e, 1, 0x01, 0x20164010 },
{ 0x00095f, 1, 0x01, 0x00000020 },
{ 0x00097d, 1, 0x01, 0x00000020 },
{ 0x000683, 1, 0x01, 0x00000006 },
{ 0x000685, 1, 0x01, 0x003fffff },
{ 0x000687, 1, 0x01, 0x00000c48 },
{ 0x0006a0, 1, 0x01, 0x00000005 },
{ 0x000840, 1, 0x01, 0x00300008 },
{ 0x000841, 1, 0x01, 0x04000080 },
{ 0x000842, 1, 0x01, 0x00300008 },
{ 0x000843, 1, 0x01, 0x04000080 },
{ 0x000818, 8, 0x01, 0x00000000 },
{ 0x000848, 16, 0x01, 0x00000000 },
{ 0x000738, 1, 0x01, 0x00000000 },
{ 0x0006aa, 1, 0x01, 0x00000001 },
{ 0x0006ab, 1, 0x01, 0x00000002 },
{ 0x0006ac, 1, 0x01, 0x00000080 },
{ 0x0006ad, 2, 0x01, 0x00000100 },
{ 0x0006b1, 1, 0x01, 0x00000011 },
{ 0x0006bb, 1, 0x01, 0x000000cf },
{ 0x0006ce, 1, 0x01, 0x2a712488 },
{ 0x000739, 1, 0x01, 0x4085c000 },
{ 0x00073a, 1, 0x01, 0x00000080 },
{ 0x000786, 1, 0x01, 0x80000100 },
{ 0x00073c, 1, 0x01, 0x00010100 },
{ 0x00073d, 1, 0x01, 0x02800000 },
{ 0x000787, 1, 0x01, 0x000000cf },
{ 0x00078c, 1, 0x01, 0x00000008 },
{ 0x000792, 1, 0x01, 0x00000001 },
{ 0x000794, 1, 0x01, 0x00000001 },
{ 0x000795, 2, 0x01, 0x00000001 },
{ 0x000797, 1, 0x01, 0x000000cf },
{ 0x000836, 1, 0x01, 0x00000001 },
{ 0x00079a, 1, 0x01, 0x00000002 },
{ 0x000833, 1, 0x01, 0x04444480 },
{ 0x0007a1, 1, 0x01, 0x00000001 },
{ 0x0007a3, 1, 0x01, 0x00000001 },
{ 0x0007a4, 2, 0x01, 0x00000001 },
{ 0x000831, 1, 0x01, 0x00000004 },
{ 0x00080c, 1, 0x01, 0x00000002 },
{ 0x00080d, 2, 0x01, 0x00000100 },
{ 0x00080f, 1, 0x01, 0x00000001 },
{ 0x000823, 1, 0x01, 0x00000002 },
{ 0x000824, 2, 0x01, 0x00000100 },
{ 0x000826, 1, 0x01, 0x00000001 },
{ 0x00095d, 1, 0x01, 0x00000001 },
{ 0x00082b, 1, 0x01, 0x00000004 },
{ 0x000942, 1, 0x01, 0x00010001 },
{ 0x000943, 1, 0x01, 0x00000001 },
{ 0x000944, 1, 0x01, 0x00000022 },
{ 0x0007c5, 1, 0x01, 0x00010001 },
{ 0x000834, 1, 0x01, 0x00000001 },
{ 0x0007c7, 1, 0x01, 0x00000001 },
{ 0x00c1b0, 8, 0x01, 0x0000000f },
{ 0x00c1b8, 1, 0x01, 0x0fac6881 },
{ 0x00c1b9, 1, 0x01, 0x00fac688 },
{ 0x01e100, 1, 0x01, 0x00000001 },
{ 0x001000, 1, 0x01, 0x00000002 },
{ 0x0006aa, 1, 0x01, 0x00000001 },
{ 0x0006ad, 2, 0x01, 0x00000100 },
{ 0x0006b1, 1, 0x01, 0x00000011 },
{ 0x00078c, 1, 0x01, 0x00000008 },
{ 0x000792, 1, 0x01, 0x00000001 },
{ 0x000794, 1, 0x01, 0x00000001 },
{ 0x000795, 2, 0x01, 0x00000001 },
{ 0x000797, 1, 0x01, 0x000000cf },
{ 0x00079a, 1, 0x01, 0x00000002 },
{ 0x000833, 1, 0x01, 0x04444480 },
{ 0x0007a1, 1, 0x01, 0x00000001 },
{ 0x0007a3, 1, 0x01, 0x00000001 },
{ 0x0007a4, 2, 0x01, 0x00000001 },
{ 0x000831, 1, 0x01, 0x00000004 },
{ 0x01e100, 1, 0x01, 0x00000001 },
{ 0x001000, 1, 0x01, 0x00000014 },
{ 0x000351, 1, 0x01, 0x00000100 },
{ 0x000957, 1, 0x01, 0x00000003 },
{ 0x00095d, 1, 0x01, 0x00000001 },
{ 0x00082b, 1, 0x01, 0x00000004 },
{ 0x000942, 1, 0x01, 0x00010001 },
{ 0x000943, 1, 0x01, 0x00000001 },
{ 0x0007c5, 1, 0x01, 0x00010001 },
{ 0x000834, 1, 0x01, 0x00000001 },
{ 0x0007c7, 1, 0x01, 0x00000001 },
{ 0x01e100, 1, 0x01, 0x00000001 },
{ 0x001000, 1, 0x01, 0x00000001 },
{ 0x00080c, 1, 0x01, 0x00000002 },
{ 0x00080d, 2, 0x01, 0x00000100 },
{ 0x00080f, 1, 0x01, 0x00000001 },
{ 0x000823, 1, 0x01, 0x00000002 },
{ 0x000824, 2, 0x01, 0x00000100 },
{ 0x000826, 1, 0x01, 0x00000001 },
{ 0x01e100, 1, 0x01, 0x00000001 },
{}
};
struct nvc0_graph_init
nvd9_grctx_init_unk40xx[] = {
{ 0x404004, 11, 0x04, 0x00000000 },
{ 0x404044, 1, 0x04, 0x00000000 },
{ 0x404094, 1, 0x04, 0x00000000 },
{ 0x404098, 12, 0x04, 0x00000000 },
{ 0x4040c8, 1, 0x04, 0xf0000087 },
{ 0x4040d0, 6, 0x04, 0x00000000 },
{ 0x4040e8, 1, 0x04, 0x00001000 },
{ 0x4040f8, 1, 0x04, 0x00000000 },
{ 0x404130, 1, 0x04, 0x00000000 },
{ 0x404134, 1, 0x04, 0x00000000 },
{ 0x404138, 1, 0x04, 0x20000040 },
{ 0x404150, 1, 0x04, 0x0000002e },
{ 0x404154, 1, 0x04, 0x00000400 },
{ 0x404158, 1, 0x04, 0x00000200 },
{ 0x404164, 1, 0x04, 0x00000055 },
{ 0x404168, 1, 0x04, 0x00000000 },
{ 0x404178, 2, 0x04, 0x00000000 },
{ 0x404200, 8, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvd9_grctx_init_unk58xx[] = {
{ 0x405800, 1, 0x04, 0x0f8000bf },
{ 0x405830, 1, 0x04, 0x02180218 },
{ 0x405834, 1, 0x04, 0x08000000 },
{ 0x405838, 1, 0x04, 0x00000000 },
{ 0x405854, 1, 0x04, 0x00000000 },
{ 0x405870, 4, 0x04, 0x00000001 },
{ 0x405a00, 2, 0x04, 0x00000000 },
{ 0x405a18, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvd9_grctx_init_unk64xx[] = {
{ 0x4064a8, 1, 0x04, 0x00000000 },
{ 0x4064ac, 1, 0x04, 0x00003fff },
{ 0x4064b4, 3, 0x04, 0x00000000 },
{ 0x4064c0, 1, 0x04, 0x80140078 },
{ 0x4064c4, 1, 0x04, 0x0086ffff },
{}
};
struct nvc0_graph_init
nvd9_grctx_init_rop[] = {
{ 0x408800, 1, 0x04, 0x02802a3c },
{ 0x408804, 1, 0x04, 0x00000040 },
{ 0x408808, 1, 0x04, 0x1043e005 },
{ 0x408900, 1, 0x04, 0x3080b801 },
{ 0x408904, 1, 0x04, 0x1043e005 },
{ 0x408908, 1, 0x04, 0x00c8102f },
{ 0x408980, 1, 0x04, 0x0000011d },
{}
};
static struct nvc0_graph_init
nvd9_grctx_init_gpc_0[] = {
{ 0x418380, 1, 0x04, 0x00000016 },
{ 0x418400, 1, 0x04, 0x38004e00 },
{ 0x418404, 1, 0x04, 0x71e0ffff },
{ 0x41840c, 1, 0x04, 0x00001008 },
{ 0x418410, 1, 0x04, 0x0fff0fff },
{ 0x418414, 1, 0x04, 0x02200fff },
{ 0x418450, 6, 0x04, 0x00000000 },
{ 0x418468, 1, 0x04, 0x00000001 },
{ 0x41846c, 2, 0x04, 0x00000000 },
{ 0x418600, 1, 0x04, 0x0000001f },
{ 0x418684, 1, 0x04, 0x0000000f },
{ 0x418700, 1, 0x04, 0x00000002 },
{ 0x418704, 1, 0x04, 0x00000080 },
{ 0x418708, 3, 0x04, 0x00000000 },
{ 0x418800, 1, 0x04, 0x7006860a },
{ 0x418808, 3, 0x04, 0x00000000 },
{ 0x418828, 1, 0x04, 0x00008442 },
{ 0x418830, 1, 0x04, 0x10000001 },
{ 0x4188d8, 1, 0x04, 0x00000008 },
{ 0x4188e0, 1, 0x04, 0x01000000 },
{ 0x4188e8, 5, 0x04, 0x00000000 },
{ 0x4188fc, 1, 0x04, 0x20100008 },
{ 0x41891c, 1, 0x04, 0x00ff00ff },
{ 0x418924, 1, 0x04, 0x00000000 },
{ 0x418928, 1, 0x04, 0x00ffff00 },
{ 0x41892c, 1, 0x04, 0x0000ff00 },
{ 0x418b00, 1, 0x04, 0x00000006 },
{ 0x418b08, 1, 0x04, 0x0a418820 },
{ 0x418b0c, 1, 0x04, 0x062080e6 },
{ 0x418b10, 1, 0x04, 0x020398a4 },
{ 0x418b14, 1, 0x04, 0x0e629062 },
{ 0x418b18, 1, 0x04, 0x0a418820 },
{ 0x418b1c, 1, 0x04, 0x000000e6 },
{ 0x418bb8, 1, 0x04, 0x00000103 },
{ 0x418c08, 1, 0x04, 0x00000001 },
{ 0x418c10, 8, 0x04, 0x00000000 },
{ 0x418c6c, 1, 0x04, 0x00000001 },
{ 0x418c80, 1, 0x04, 0x20200004 },
{ 0x418c8c, 1, 0x04, 0x00000001 },
{ 0x419000, 1, 0x04, 0x00000780 },
{ 0x419004, 2, 0x04, 0x00000000 },
{ 0x419014, 1, 0x04, 0x00000004 },
{}
};
static struct nvc0_graph_init
nvd9_grctx_init_tpc[] = {
{ 0x419818, 1, 0x04, 0x00000000 },
{ 0x41983c, 1, 0x04, 0x00038bc7 },
{ 0x419848, 1, 0x04, 0x00000000 },
{ 0x419864, 1, 0x04, 0x00000129 },
{ 0x419888, 1, 0x04, 0x00000000 },
{ 0x419a00, 1, 0x04, 0x000001f0 },
{ 0x419a04, 1, 0x04, 0x00000001 },
{ 0x419a08, 1, 0x04, 0x00000023 },
{ 0x419a0c, 1, 0x04, 0x00020000 },
{ 0x419a10, 1, 0x04, 0x00000000 },
{ 0x419a14, 1, 0x04, 0x00000200 },
{ 0x419a1c, 1, 0x04, 0x00000000 },
{ 0x419a20, 1, 0x04, 0x00000800 },
{ 0x419ac4, 1, 0x04, 0x0017f440 },
{ 0x419b00, 1, 0x04, 0x0a418820 },
{ 0x419b04, 1, 0x04, 0x062080e6 },
{ 0x419b08, 1, 0x04, 0x020398a4 },
{ 0x419b0c, 1, 0x04, 0x0e629062 },
{ 0x419b10, 1, 0x04, 0x0a418820 },
{ 0x419b14, 1, 0x04, 0x000000e6 },
{ 0x419bd0, 1, 0x04, 0x00900103 },
{ 0x419be0, 1, 0x04, 0x00400001 },
{ 0x419be4, 1, 0x04, 0x00000000 },
{ 0x419c00, 1, 0x04, 0x0000000a },
{ 0x419c04, 1, 0x04, 0x00000006 },
{ 0x419c08, 1, 0x04, 0x00000002 },
{ 0x419c20, 1, 0x04, 0x00000000 },
{ 0x419c24, 1, 0x04, 0x00084210 },
{ 0x419c28, 1, 0x04, 0x3cf3cf3c },
{ 0x419cb0, 1, 0x04, 0x00020048 },
{ 0x419ce8, 1, 0x04, 0x00000000 },
{ 0x419cf4, 1, 0x04, 0x00000183 },
{ 0x419d20, 1, 0x04, 0x12180000 },
{ 0x419d24, 1, 0x04, 0x00001fff },
{ 0x419d44, 1, 0x04, 0x02180218 },
{ 0x419e04, 3, 0x04, 0x00000000 },
{ 0x419e10, 1, 0x04, 0x00000002 },
{ 0x419e44, 1, 0x04, 0x001beff2 },
{ 0x419e48, 1, 0x04, 0x00000000 },
{ 0x419e4c, 1, 0x04, 0x0000000f },
{ 0x419e50, 17, 0x04, 0x00000000 },
{ 0x419e98, 1, 0x04, 0x00000000 },
{ 0x419ee0, 1, 0x04, 0x00010110 },
{ 0x419f30, 11, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init *
nvd9_grctx_init_hub[] = {
nvc0_grctx_init_base,
nvd9_grctx_init_unk40xx,
nvc0_grctx_init_unk44xx,
nvc0_grctx_init_unk46xx,
nvc0_grctx_init_unk47xx,
nvd9_grctx_init_unk58xx,
nvc0_grctx_init_unk60xx,
nvd9_grctx_init_unk64xx,
nvc0_grctx_init_unk78xx,
nvc0_grctx_init_unk80xx,
nvd9_grctx_init_rop,
};
struct nvc0_graph_init *
nvd9_grctx_init_gpc[] = {
nvd9_grctx_init_gpc_0,
nvc0_grctx_init_gpc_1,
nvd9_grctx_init_tpc,
NULL
};
struct nvc0_graph_init
nvd9_grctx_init_mthd_magic[] = {
{ 0x3410, 1, 0x04, 0x80002006 },
{}
};
struct nvc0_graph_mthd
nvd9_grctx_init_mthd[] = {
{ 0x9097, nvc1_grctx_init_9097, },
{ 0x9197, nvc8_grctx_init_9197, },
{ 0x9297, nvc8_grctx_init_9297, },
{ 0x902d, nvc0_grctx_init_902d, },
{ 0x9039, nvc0_grctx_init_9039, },
{ 0x90c0, nvd9_grctx_init_90c0, },
{ 0x902d, nvd9_grctx_init_mthd_magic, },
{}
};
struct nouveau_oclass *
nvd9_grctx_oclass = &(struct nvc0_grctx_oclass) {
.base.handle = NV_ENGCTX(GR, 0xd9),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvc0_graph_context_ctor,
.dtor = nvc0_graph_context_dtor,
.init = _nouveau_graph_context_init,
.fini = _nouveau_graph_context_fini,
.rd32 = _nouveau_graph_context_rd32,
.wr32 = _nouveau_graph_context_wr32,
},
.main = nvc0_grctx_generate_main,
.mods = nvc1_grctx_generate_mods,
.unkn = nvc1_grctx_generate_unkn,
.hub = nvd9_grctx_init_hub,
.gpc = nvd9_grctx_init_gpc,
.icmd = nvd9_grctx_init_icmd,
.mthd = nvd9_grctx_init_mthd,
}.base;

2924
drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c
View File

File diff suppressed because it is too large Load Diff

1018
drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c Normal file
View File

File diff suppressed because it is too large Load Diff

328
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c Normal file
View File

@ -0,0 +1,328 @@
/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "nvc0.h"
static struct nvc0_graph_init
nvf0_grctx_init_unk40xx[] = {
{ 0x404004, 8, 0x04, 0x00000000 },
{ 0x404024, 1, 0x04, 0x0000e000 },
{ 0x404028, 8, 0x04, 0x00000000 },
{ 0x4040a8, 8, 0x04, 0x00000000 },
{ 0x4040c8, 1, 0x04, 0xf800008f },
{ 0x4040d0, 6, 0x04, 0x00000000 },
{ 0x4040e8, 1, 0x04, 0x00001000 },
{ 0x4040f8, 1, 0x04, 0x00000000 },
{ 0x404100, 10, 0x04, 0x00000000 },
{ 0x404130, 2, 0x04, 0x00000000 },
{ 0x404138, 1, 0x04, 0x20000040 },
{ 0x404150, 1, 0x04, 0x0000002e },
{ 0x404154, 1, 0x04, 0x00000400 },
{ 0x404158, 1, 0x04, 0x00000200 },
{ 0x404164, 1, 0x04, 0x00000055 },
{ 0x40417c, 2, 0x04, 0x00000000 },
{ 0x4041a0, 4, 0x04, 0x00000000 },
{ 0x404200, 1, 0x04, 0x0000a197 },
{ 0x404204, 1, 0x04, 0x0000a1c0 },
{ 0x404208, 1, 0x04, 0x0000a140 },
{ 0x40420c, 1, 0x04, 0x0000902d },
{}
};
static struct nvc0_graph_init
nvf0_grctx_init_unk44xx[] = {
{ 0x404404, 12, 0x04, 0x00000000 },
{ 0x404438, 1, 0x04, 0x00000000 },
{ 0x404460, 2, 0x04, 0x00000000 },
{ 0x404468, 1, 0x04, 0x00ffffff },
{ 0x40446c, 1, 0x04, 0x00000000 },
{ 0x404480, 1, 0x04, 0x00000001 },
{ 0x404498, 1, 0x04, 0x00000001 },
{}
};
static struct nvc0_graph_init
nvf0_grctx_init_unk5bxx[] = {
{ 0x405b00, 1, 0x04, 0x00000000 },
{ 0x405b10, 1, 0x04, 0x00001000 },
{ 0x405b20, 1, 0x04, 0x04000000 },
{}
};
static struct nvc0_graph_init
nvf0_grctx_init_unk60xx[] = {
{ 0x406020, 1, 0x04, 0x034103c1 },
{ 0x406028, 4, 0x04, 0x00000001 },
{}
};
static struct nvc0_graph_init
nvf0_grctx_init_unk64xx[] = {
{ 0x4064a8, 1, 0x04, 0x00000000 },
{ 0x4064ac, 1, 0x04, 0x00003fff },
{ 0x4064b0, 3, 0x04, 0x00000000 },
{ 0x4064c0, 1, 0x04, 0x802000f0 },
{ 0x4064c4, 1, 0x04, 0x0192ffff },
{ 0x4064c8, 1, 0x04, 0x018007c0 },
{ 0x4064cc, 9, 0x04, 0x00000000 },
{ 0x4064fc, 1, 0x04, 0x0000022a },
{}
};
static struct nvc0_graph_init
nvf0_grctx_init_unk88xx[] = {
{ 0x408800, 1, 0x04, 0x12802a3c },
{ 0x408804, 1, 0x04, 0x00000040 },
{ 0x408808, 1, 0x04, 0x1003e005 },
{ 0x408840, 1, 0x04, 0x0000000b },
{ 0x408900, 1, 0x04, 0x3080b801 },
{ 0x408904, 1, 0x04, 0x62000001 },
{ 0x408908, 1, 0x04, 0x00c8102f },
{ 0x408980, 1, 0x04, 0x0000011d },
{}
};
static struct nvc0_graph_init
nvf0_grctx_init_gpc_0[] = {
{ 0x418380, 1, 0x04, 0x00000016 },
{ 0x418400, 1, 0x04, 0x38004e00 },
{ 0x418404, 1, 0x04, 0x71e0ffff },
{ 0x41840c, 1, 0x04, 0x00001008 },
{ 0x418410, 1, 0x04, 0x0fff0fff },
{ 0x418414, 1, 0x04, 0x02200fff },
{ 0x418450, 6, 0x04, 0x00000000 },
{ 0x418468, 1, 0x04, 0x00000001 },
{ 0x41846c, 2, 0x04, 0x00000000 },
{ 0x418600, 1, 0x04, 0x0000001f },
{ 0x418684, 1, 0x04, 0x0000000f },
{ 0x418700, 1, 0x04, 0x00000002 },
{ 0x418704, 1, 0x04, 0x00000080 },
{ 0x418708, 3, 0x04, 0x00000000 },
{ 0x418800, 1, 0x04, 0x7006860a },
{ 0x418808, 1, 0x04, 0x00000000 },
{ 0x41880c, 1, 0x04, 0x00000030 },
{ 0x418810, 1, 0x04, 0x00000000 },
{ 0x418828, 1, 0x04, 0x00000044 },
{ 0x418830, 1, 0x04, 0x10000001 },
{ 0x4188d8, 1, 0x04, 0x00000008 },
{ 0x4188e0, 1, 0x04, 0x01000000 },
{ 0x4188e8, 5, 0x04, 0x00000000 },
{ 0x4188fc, 1, 0x04, 0x20100018 },
{ 0x41891c, 1, 0x04, 0x00ff00ff },
{ 0x418924, 1, 0x04, 0x00000000 },
{ 0x418928, 1, 0x04, 0x00ffff00 },
{ 0x41892c, 1, 0x04, 0x0000ff00 },
{ 0x418b00, 1, 0x04, 0x00000006 },
{ 0x418b08, 1, 0x04, 0x0a418820 },
{ 0x418b0c, 1, 0x04, 0x062080e6 },
{ 0x418b10, 1, 0x04, 0x020398a4 },
{ 0x418b14, 1, 0x04, 0x0e629062 },
{ 0x418b18, 1, 0x04, 0x0a418820 },
{ 0x418b1c, 1, 0x04, 0x000000e6 },
{ 0x418bb8, 1, 0x04, 0x00000103 },
{ 0x418c08, 1, 0x04, 0x00000001 },
{ 0x418c10, 8, 0x04, 0x00000000 },
{ 0x418c40, 1, 0x04, 0xffffffff },
{ 0x418c6c, 1, 0x04, 0x00000001 },
{ 0x418c80, 1, 0x04, 0x20200004 },
{ 0x418c8c, 1, 0x04, 0x00000001 },
{ 0x418d24, 1, 0x04, 0x00000000 },
{ 0x419000, 1, 0x04, 0x00000780 },
{ 0x419004, 2, 0x04, 0x00000000 },
{ 0x419014, 1, 0x04, 0x00000004 },
{}
};
static struct nvc0_graph_init
nvf0_grctx_init_tpc[] = {
{ 0x419848, 1, 0x04, 0x00000000 },
{ 0x419864, 1, 0x04, 0x00000129 },
{ 0x419888, 1, 0x04, 0x00000000 },
{ 0x419a00, 1, 0x04, 0x000000f0 },
{ 0x419a04, 1, 0x04, 0x00000001 },
{ 0x419a08, 1, 0x04, 0x00000021 },
{ 0x419a0c, 1, 0x04, 0x00020000 },
{ 0x419a10, 1, 0x04, 0x00000000 },
{ 0x419a14, 1, 0x04, 0x00000200 },
{ 0x419a1c, 1, 0x04, 0x0000c000 },
{ 0x419a20, 1, 0x04, 0x00020800 },
{ 0x419a30, 1, 0x04, 0x00000001 },
{ 0x419ac4, 1, 0x04, 0x0037f440 },
{ 0x419c00, 1, 0x04, 0x0000001a },
{ 0x419c04, 1, 0x04, 0x80000006 },
{ 0x419c08, 1, 0x04, 0x00000002 },
{ 0x419c20, 1, 0x04, 0x00000000 },
{ 0x419c24, 1, 0x04, 0x00084210 },
{ 0x419c28, 1, 0x04, 0x3efbefbe },
{ 0x419ce8, 1, 0x04, 0x00000000 },
{ 0x419cf4, 1, 0x04, 0x00000203 },
{ 0x419e04, 1, 0x04, 0x00000000 },
{ 0x419e08, 1, 0x04, 0x0000001d },
{ 0x419e0c, 1, 0x04, 0x00000000 },
{ 0x419e10, 1, 0x04, 0x00001c02 },
{ 0x419e44, 1, 0x04, 0x0013eff2 },
{ 0x419e48, 1, 0x04, 0x00000000 },
{ 0x419e4c, 1, 0x04, 0x0000007f },
{ 0x419e50, 2, 0x04, 0x00000000 },
{ 0x419e58, 1, 0x04, 0x00000001 },
{ 0x419e5c, 3, 0x04, 0x00000000 },
{ 0x419e68, 1, 0x04, 0x00000002 },
{ 0x419e6c, 12, 0x04, 0x00000000 },
{ 0x419eac, 1, 0x04, 0x00001fcf },
{ 0x419eb0, 1, 0x04, 0x0db00da0 },
{ 0x419eb8, 1, 0x04, 0x00000000 },
{ 0x419ec8, 1, 0x04, 0x0001304f },
{ 0x419f30, 4, 0x04, 0x00000000 },
{ 0x419f40, 1, 0x04, 0x00000018 },
{ 0x419f44, 3, 0x04, 0x00000000 },
{ 0x419f58, 1, 0x04, 0x00000000 },
{ 0x419f70, 1, 0x04, 0x00007300 },
{ 0x419f78, 1, 0x04, 0x000000eb },
{ 0x419f7c, 1, 0x04, 0x00000404 },
{}
};
static struct nvc0_graph_init
nvf0_grctx_init_unk[] = {
{ 0x41be24, 1, 0x04, 0x00000006 },
{ 0x41bec0, 1, 0x04, 0x10000000 },
{ 0x41bec4, 1, 0x04, 0x00037f7f },
{ 0x41bee4, 1, 0x04, 0x00000000 },
{ 0x41bf00, 1, 0x04, 0x0a418820 },
{ 0x41bf04, 1, 0x04, 0x062080e6 },
{ 0x41bf08, 1, 0x04, 0x020398a4 },
{ 0x41bf0c, 1, 0x04, 0x0e629062 },
{ 0x41bf10, 1, 0x04, 0x0a418820 },
{ 0x41bf14, 1, 0x04, 0x000000e6 },
{ 0x41bfd0, 1, 0x04, 0x00900103 },
{ 0x41bfe0, 1, 0x04, 0x00400001 },
{ 0x41bfe4, 1, 0x04, 0x00000000 },
{}
};
static void
nvf0_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
{
u32 magic[GPC_MAX][4];
u32 offset;
int gpc;
mmio_data(0x003000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
mmio_data(0x008000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
mmio_data(0x060000, 0x1000, NV_MEM_ACCESS_RW);
mmio_list(0x40800c, 0x00000000, 8, 1);
mmio_list(0x408010, 0x80000000, 0, 0);
mmio_list(0x419004, 0x00000000, 8, 1);
mmio_list(0x419008, 0x00000000, 0, 0);
mmio_list(0x4064cc, 0x80000000, 0, 0);
mmio_list(0x408004, 0x00000000, 8, 0);
mmio_list(0x408008, 0x80000030, 0, 0);
mmio_list(0x418808, 0x00000000, 8, 0);
mmio_list(0x41880c, 0x80000030, 0, 0);
mmio_list(0x4064c8, 0x01800600, 0, 0);
mmio_list(0x418810, 0x80000000, 12, 2);
mmio_list(0x419848, 0x10000000, 12, 2);
mmio_list(0x405830, 0x02180648, 0, 0);
mmio_list(0x4064c4, 0x0192ffff, 0, 0);
for (gpc = 0, offset = 0; gpc < priv->gpc_nr; gpc++) {
u16 magic0 = 0x0218 * (priv->tpc_nr[gpc] - 1);
u16 magic1 = 0x0648 * (priv->tpc_nr[gpc] - 1);
u16 magic2 = 0x0218;
u16 magic3 = 0x0648;
magic[gpc][0] = 0x10000000 | (magic0 << 16) | offset;
magic[gpc][1] = 0x00000000 | (magic1 << 16);
offset += 0x0324 * (priv->tpc_nr[gpc] - 1);;
magic[gpc][2] = 0x10000000 | (magic2 << 16) | offset;
magic[gpc][3] = 0x00000000 | (magic3 << 16);
offset += 0x0324;
}
for (gpc = 0; gpc < priv->gpc_nr; gpc++) {
mmio_list(GPC_UNIT(gpc, 0x30c0), magic[gpc][0], 0, 0);
mmio_list(GPC_UNIT(gpc, 0x30e4), magic[gpc][1] | offset, 0, 0);
offset += 0x07ff * (priv->tpc_nr[gpc] - 1);
mmio_list(GPC_UNIT(gpc, 0x32c0), magic[gpc][2], 0, 0);
mmio_list(GPC_UNIT(gpc, 0x32e4), magic[gpc][3] | offset, 0, 0);
offset += 0x07ff;
}
mmio_list(0x17e91c, 0x06060609, 0, 0);
mmio_list(0x17e920, 0x00090a05, 0, 0);
}
static struct nvc0_graph_init *
nvf0_grctx_init_hub[] = {
nvc0_grctx_init_base,
nvf0_grctx_init_unk40xx,
nvf0_grctx_init_unk44xx,
nve4_grctx_init_unk46xx,
nve4_grctx_init_unk47xx,
nve4_grctx_init_unk58xx,
nvf0_grctx_init_unk5bxx,
nvf0_grctx_init_unk60xx,
nvf0_grctx_init_unk64xx,
nve4_grctx_init_unk80xx,
nvf0_grctx_init_unk88xx,
nvd9_grctx_init_rop,
NULL
};
struct nvc0_graph_init *
nvf0_grctx_init_gpc[] = {
nvf0_grctx_init_gpc_0,
nvc0_grctx_init_gpc_1,
nvf0_grctx_init_tpc,
nvf0_grctx_init_unk,
NULL
};
static struct nvc0_graph_mthd
nvf0_grctx_init_mthd[] = {
{ 0xa197, nvc1_grctx_init_9097, },
{ 0x902d, nvc0_grctx_init_902d, },
{ 0x902d, nvc0_grctx_init_mthd_magic, },
{}
};
struct nouveau_oclass *
nvf0_grctx_oclass = &(struct nvc0_grctx_oclass) {
.base.handle = NV_ENGCTX(GR, 0xf0),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvc0_graph_context_ctor,
.dtor = nvc0_graph_context_dtor,
.init = _nouveau_graph_context_init,
.fini = _nouveau_graph_context_fini,
.rd32 = _nouveau_graph_context_rd32,
.wr32 = _nouveau_graph_context_wr32,
},
.main = nve4_grctx_generate_main,
.mods = nvf0_grctx_generate_mods,
.unkn = nve4_grctx_generate_unkn,
.hub = nvf0_grctx_init_hub,
.gpc = nvf0_grctx_init_gpc,
.icmd = nvc0_grctx_init_icmd,
.mthd = nvf0_grctx_init_mthd,
}.base;

8
drivers/gpu/drm/nouveau/core/engine/graph/fuc/com.fuc
View File

@ -149,13 +149,9 @@ watchdog_clear:
//
wait_donez:
trace_set(T_WAIT);
mov $r8 0x818
shl b32 $r8 6
iowr I[$r8 + 0x000] $r10
nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_VAL(6), 0, $r10)
wait_donez_ne:
mov $r8 0x400
shl b32 $r8 6
iord $r8 I[$r8 + 0x000]
nv_iord($r8, NV_PGRAPH_FECS_SIGNAL, 0)
xbit $r8 $r8 $r10
bra ne #wait_donez_ne
trace_clr(T_WAIT)

118
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpc.fuc
View File

@ -29,16 +29,26 @@
*/
#ifdef INCLUDE_DATA
gpc_mmio_list_head: .b32 #mmio_list_base
gpc_mmio_list_tail:
tpc_mmio_list_head: .b32 #mmio_list_base
tpc_mmio_list_tail:
unk_mmio_list_head: .b32 #mmio_list_base
unk_mmio_list_tail: .b32 #mmio_list_base
gpc_id: .b32 0
gpc_mmio_list_head: .b32 0
gpc_mmio_list_tail: .b32 0
tpc_count: .b32 0
tpc_mask: .b32 0
tpc_mmio_list_head: .b32 0
tpc_mmio_list_tail: .b32 0
#if NV_PGRAPH_GPCX_UNK__SIZE > 0
unk_count: .b32 0
unk_mask: .b32 0
#endif
cmd_queue: queue_init
mmio_list_base:
#endif
#ifdef INCLUDE_CODE
@ -61,7 +71,6 @@ error:
// fall through to main loop after completion.
//
// Input:
// CC_SCRATCH[0]: chipset (PMC_BOOT_0 read returns 0x0bad0bad... sigh)
// CC_SCRATCH[1]: context base
//
// Output:
@ -106,26 +115,33 @@ init:
iord $r2 I[$r1 + 0x000] // MYINDEX
st b32 D[$r0 + #gpc_id] $r2
// find context data for this chipset
mov $r2 0x800
shl b32 $r2 6
iord $r2 I[$r2 + 0x000] // CC_SCRATCH[0]
mov $r1 #chipsets - 12
init_find_chipset:
add b32 $r1 12
ld b32 $r3 D[$r1 + 0x00]
cmpu b32 $r3 $r2
bra e #init_context
cmpu b32 $r3 0
bra ne #init_find_chipset
// unknown chipset
ret
#if NV_PGRAPH_GPCX_UNK__SIZE > 0
// figure out which, and how many, UNKs are actually present
mov $r14 0x0c30
sethi $r14 0x500000
clear b32 $r2
clear b32 $r3
clear b32 $r4
init_unk_loop:
call #nv_rd32
cmp b32 $r15 0
bra z #init_unk_next
mov $r15 1
shl b32 $r15 $r2
or $r4 $r15
add b32 $r3 1
init_unk_next:
add b32 $r2 1
add b32 $r14 4
cmp b32 $r2 NV_PGRAPH_GPCX_UNK__SIZE
bra ne #init_unk_loop
init_unk_done:
st b32 D[$r0 + #unk_count] $r3
st b32 D[$r0 + #unk_mask] $r4
#endif
// initialise context base, and size tracking
init_context:
mov $r2 0x800
shl b32 $r2 6
iord $r2 I[$r2 + 0x100] // CC_SCRATCH[1], initial base
nv_iord($r2, NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_VAL(1), 0)
clear b32 $r3 // track GPC context size here
// set mmctx base addresses now so we don't have to do it later,
@ -136,30 +152,33 @@ init:
iowr I[$r4 + 0x000] $r5 // MMCTX_SAVE_SWBASE
iowr I[$r4 + 0x100] $r5 // MMCTX_LOAD_SWBASE
// calculate GPC mmio context size, store the chipset-specific
// mmio list pointers somewhere we can get at them later without
// re-parsing the chipset list
clear b32 $r14
clear b32 $r15
ld b16 $r14 D[$r1 + 4]
ld b16 $r15 D[$r1 + 6]
st b16 D[$r0 + #gpc_mmio_list_head] $r14
st b16 D[$r0 + #gpc_mmio_list_tail] $r15
// calculate GPC mmio context size
ld b32 $r14 D[$r0 + #gpc_mmio_list_head]
ld b32 $r15 D[$r0 + #gpc_mmio_list_tail]
call #mmctx_size
add b32 $r2 $r15
add b32 $r3 $r15
// calculate per-TPC mmio context size, store the list pointers
ld b16 $r14 D[$r1 + 8]
ld b16 $r15 D[$r1 + 10]
st b16 D[$r0 + #tpc_mmio_list_head] $r14
st b16 D[$r0 + #tpc_mmio_list_tail] $r15
// calculate per-TPC mmio context size
ld b32 $r14 D[$r0 + #tpc_mmio_list_head]
ld b32 $r15 D[$r0 + #tpc_mmio_list_tail]
call #mmctx_size
ld b32 $r14 D[$r0 + #tpc_count]
mulu $r14 $r15
add b32 $r2 $r14
add b32 $r3 $r14
#if NV_PGRAPH_GPCX_UNK__SIZE > 0
// calculate per-UNK mmio context size
ld b32 $r14 D[$r0 + #unk_mmio_list_head]
ld b32 $r15 D[$r0 + #unk_mmio_list_tail]
call #mmctx_size
ld b32 $r14 D[$r0 + #unk_count]
mulu $r14 $r15
add b32 $r2 $r14
add b32 $r3 $r14
#endif
// round up base/size to 256 byte boundary (for strand SWBASE)
add b32 $r4 0x1300
shr b32 $r3 2
@ -177,13 +196,10 @@ init:
add b32 $r3 $r15
// save context size, and tell HUB we're done
mov $r1 0x800
shl b32 $r1 6
iowr I[$r1 + 0x100] $r3 // CC_SCRATCH[1] = context size
add b32 $r1 0x800
nv_iowr(NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_VAL(1), 0, $r3)
clear b32 $r2
bset $r2 31
iowr I[$r1 + 0x000] $r2 // CC_SCRATCH[0] |= 0x80000000
nv_iowr(NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_SET(0), 0, $r2)
// Main program loop, very simple, sleeps until woken up by the interrupt
// handler, pulls a command from the queue and executes its handler
@ -228,6 +244,7 @@ ih:
push $r13
push $r14
push $r15
clear b32 $r0
// incoming fifo command?
iord $r10 I[$r0 + 0x200] // INTR
@ -335,7 +352,6 @@ ctx_xfer:
// per-TPC mmio context
xbit $r10 $flags $p1 // direction
or $r10 4 // last
mov $r11 0x4000
sethi $r11 0x500000 // base = NV_PGRAPH_GPC0_TPC0
ld b32 $r12 D[$r0 + #gpc_id]
@ -347,6 +363,22 @@ ctx_xfer:
mov $r14 0x800 // stride = 0x800
call #mmctx_xfer
#if NV_PGRAPH_GPCX_UNK__SIZE > 0
// per-UNK mmio context
xbit $r10 $flags $p1 // direction
or $r10 4 // last
mov $r11 0x3000
sethi $r11 0x500000 // base = NV_PGRAPH_GPC0_UNK0
ld b32 $r12 D[$r0 + #gpc_id]
shl b32 $r12 15
add b32 $r11 $r12 // base = NV_PGRAPH_GPCn_UNK0
ld b32 $r12 D[$r0 + #unk_mmio_list_head]
ld b32 $r13 D[$r0 + #unk_mmio_list_tail]
ld b32 $r15 D[$r0 + #unk_mask]
mov $r14 0x200 // stride = 0x200
call #mmctx_xfer
#endif
// wait for strands to finish
call #strand_wait

118
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc
View File

@ -22,127 +22,15 @@
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#define NVGF
#define NV_PGRAPH_GPCX_UNK__SIZE 0x00000000
#define CHIPSET GF100
#include "macros.fuc"
.section #nvc0_grgpc_data
#define INCLUDE_DATA
#include "com.fuc"
#include "gpc.fuc"
chipsets:
.b8 0xc0 0 0 0
.b16 #nvc0_gpc_mmio_head
.b16 #nvc0_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvc0_tpc_mmio_tail
.b8 0xc1 0 0 0
.b16 #nvc0_gpc_mmio_head
.b16 #nvc1_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvc1_tpc_mmio_tail
.b8 0xc3 0 0 0
.b16 #nvc0_gpc_mmio_head
.b16 #nvc0_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvc3_tpc_mmio_tail
.b8 0xc4 0 0 0
.b16 #nvc0_gpc_mmio_head
.b16 #nvc0_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvc3_tpc_mmio_tail
.b8 0xc8 0 0 0
.b16 #nvc0_gpc_mmio_head
.b16 #nvc0_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvc0_tpc_mmio_tail
.b8 0xce 0 0 0
.b16 #nvc0_gpc_mmio_head
.b16 #nvc0_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvc3_tpc_mmio_tail
.b8 0xcf 0 0 0
.b16 #nvc0_gpc_mmio_head
.b16 #nvc0_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvc3_tpc_mmio_tail
.b8 0xd9 0 0 0
.b16 #nvd9_gpc_mmio_head
.b16 #nvc1_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvd9_tpc_mmio_tail
.b8 0xd7 0 0 0
.b16 #nvd9_gpc_mmio_head
.b16 #nvc1_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvd9_tpc_mmio_tail
.b8 0 0 0 0
// GPC mmio lists
nvc0_gpc_mmio_head:
mmctx_data(0x000408, 1)
nvd9_gpc_mmio_head:
mmctx_data(0x000380, 1)
mmctx_data(0x000400, 2);
mmctx_data(0x00040c, 3);
mmctx_data(0x000450, 9)
mmctx_data(0x000600, 1)
mmctx_data(0x000684, 1)
mmctx_data(0x000700, 5)
mmctx_data(0x000800, 1)
mmctx_data(0x000808, 3)
mmctx_data(0x000828, 1)
mmctx_data(0x000830, 1)
mmctx_data(0x0008d8, 1)
mmctx_data(0x0008e0, 1)
mmctx_data(0x0008e8, 6)
mmctx_data(0x00091c, 1)
mmctx_data(0x000924, 3)
mmctx_data(0x000b00, 1)
mmctx_data(0x000b08, 6)
mmctx_data(0x000bb8, 1)
mmctx_data(0x000c08, 1)
mmctx_data(0x000c10, 8)
mmctx_data(0x000c80, 1)
mmctx_data(0x000c8c, 1)
mmctx_data(0x001000, 3)
mmctx_data(0x001014, 1)
nvc0_gpc_mmio_tail:
mmctx_data(0x000c6c, 1);
nvc1_gpc_mmio_tail:
// TPC mmio lists
nvc0_tpc_mmio_head:
mmctx_data(0x000018, 1)
mmctx_data(0x00003c, 1)
mmctx_data(0x000048, 1)
mmctx_data(0x000064, 1)
mmctx_data(0x000088, 1)
mmctx_data(0x000200, 6)
mmctx_data(0x000300, 6)
mmctx_data(0x0003d0, 1)
mmctx_data(0x0003e0, 2)
mmctx_data(0x000400, 3)
mmctx_data(0x000420, 1)
mmctx_data(0x0004b0, 1)
mmctx_data(0x0004e8, 1)
mmctx_data(0x0004f4, 1)
mmctx_data(0x000520, 2)
mmctx_data(0x000604, 4)
mmctx_data(0x000644, 20)
mmctx_data(0x000698, 1)
mmctx_data(0x000750, 2)
nvc0_tpc_mmio_tail:
mmctx_data(0x00021c, 2)
mmctx_data(0x0002c4, 1)
mmctx_data(0x000730, 8)
mmctx_data(0x000758, 1)
nvc3_tpc_mmio_tail:
mmctx_data(0x000544, 1)
nvc1_tpc_mmio_tail:
mmctx_data(0x000424, 2);
mmctx_data(0x0006e0, 1);
nvd9_tpc_mmio_tail:
#undef INCLUDE_DATA
.section #nvc0_grgpc_code

620
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h
View File

@ -1,17 +1,19 @@
uint32_t nvc0_grgpc_data[] = {
/* 0x0000: gpc_id */
/* 0x0000: gpc_mmio_list_head */
0x00000064,
/* 0x0004: gpc_mmio_list_tail */
/* 0x0004: tpc_mmio_list_head */
0x00000064,
/* 0x0008: tpc_mmio_list_tail */
/* 0x0008: unk_mmio_list_head */
0x00000064,
/* 0x000c: unk_mmio_list_tail */
0x00000064,
/* 0x0010: gpc_id */
0x00000000,
/* 0x0004: gpc_mmio_list_head */
/* 0x0014: tpc_count */
0x00000000,
/* 0x0008: gpc_mmio_list_tail */
0x00000000,
/* 0x000c: tpc_count */
0x00000000,
/* 0x0010: tpc_mask */
0x00000000,
/* 0x0014: tpc_mmio_list_head */
0x00000000,
/* 0x0018: tpc_mmio_list_tail */
/* 0x0018: tpc_mask */
0x00000000,
/* 0x001c: cmd_queue */
0x00000000,
@ -32,107 +34,17 @@ uint32_t nvc0_grgpc_data[] = {
0x00000000,
0x00000000,
0x00000000,
/* 0x0064: chipsets */
0x000000c0,
0x013c00d4,
0x018c0140,
0x000000c1,
0x014000d4,
0x01a00140,
0x000000c3,
0x013c00d4,
0x019c0140,
0x000000c4,
0x013c00d4,
0x019c0140,
0x000000c8,
0x013c00d4,
0x018c0140,
0x000000ce,
0x013c00d4,
0x019c0140,
0x000000cf,
0x013c00d4,
0x019c0140,
0x000000d9,
0x014000d8,
0x01a80140,
0x000000d7,
0x014000d8,
0x01a80140,
0x00000000,
/* 0x00d4: nvc0_gpc_mmio_head */
0x00000408,
/* 0x00d8: nvd9_gpc_mmio_head */
0x00000380,
0x04000400,
0x0800040c,
0x20000450,
0x00000600,
0x00000684,
0x10000700,
0x00000800,
0x08000808,
0x00000828,
0x00000830,
0x000008d8,
0x000008e0,
0x140008e8,
0x0000091c,
0x08000924,
0x00000b00,
0x14000b08,
0x00000bb8,
0x00000c08,
0x1c000c10,
0x00000c80,
0x00000c8c,
0x08001000,
0x00001014,
/* 0x013c: nvc0_gpc_mmio_tail */
0x00000c6c,
/* 0x0140: nvc1_gpc_mmio_tail */
/* 0x0140: nvc0_tpc_mmio_head */
0x00000018,
0x0000003c,
0x00000048,
0x00000064,
0x00000088,
0x14000200,
0x14000300,
0x000003d0,
0x040003e0,
0x08000400,
0x00000420,
0x000004b0,
0x000004e8,
0x000004f4,
0x04000520,
0x0c000604,
0x4c000644,
0x00000698,
0x04000750,
/* 0x018c: nvc0_tpc_mmio_tail */
0x0400021c,
0x000002c4,
0x1c000730,
0x00000758,
/* 0x019c: nvc3_tpc_mmio_tail */
0x00000544,
/* 0x01a0: nvc1_tpc_mmio_tail */
0x04000424,
0x000006e0,
};
uint32_t nvc0_grgpc_code[] = {
0x03060ef5,
0x03180ef5,
/* 0x0004: queue_put */
0x9800d898,
0x86f001d9,
0x0489b808,
0xf00c1bf4,
0x21f502f7,
0x00f802ec,
0x00f802fe,
/* 0x001c: queue_put_next */
0xb60798c4,
0x8dbb0384,
@ -164,7 +76,7 @@ uint32_t nvc0_grgpc_code[] = {
0xc800bccf,
0x1bf41fcc,
0x06a7f0fa,
0x010321f5,
0x010921f5,
0xf840bfcf,
/* 0x008d: nv_wr32 */
0x28b7f100,
@ -186,63 +98,66 @@ uint32_t nvc0_grgpc_code[] = {
0x0684b604,
0xf80080d0,
/* 0x00c9: wait_donez */
0x3c87f100,
0x0684b608,
0x99f094bd,
0x0089d000,
0x081887f1,
0xd00684b6,
/* 0x00e2: wait_donez_ne */
0x87f1008a,
0x84b60400,
0x0088cf06,
0xf094bd00,
0x07f10099,
0x03f00f00,
0x0009d002,
0x07f104bd,
0x03f00600,
0x000ad002,
/* 0x00e6: wait_donez_ne */
0x87f104bd,
0x83f00000,
0x0088cf01,
0xf4888aff,
0x87f1f31b,
0x84b6085c,
0xf094bd06,
0x89d00099,
/* 0x0103: wait_doneo */
0xf100f800,
0xb6083c87,
0x94bd0684,
0xd00099f0,
0x87f10089,
0x94bdf31b,
0xf10099f0,
0xf0170007,
0x09d00203,
0xf804bd00,
/* 0x0109: wait_doneo */
0xf094bd00,
0x07f10099,
0x03f00f00,
0x0009d002,
0x87f104bd,
0x84b60818,
0x008ad006,
/* 0x011c: wait_doneo_e */
/* 0x0124: wait_doneo_e */
0x040087f1,
0xcf0684b6,
0x8aff0088,
0xf30bf488,
0x085c87f1,
0xbd0684b6,
0x0099f094,
0xf80089d0,
/* 0x013d: mmctx_size */
/* 0x013f: nv_mmctx_size_loop */
0x9894bd00,
0x85b600e8,
0x0180b61a,
0xbb0284b6,
0xe0b60098,
0x04efb804,
0xb9eb1bf4,
0x00f8029f,
/* 0x015c: mmctx_xfer */
0x083c87f1,
0xbd0684b6,
0x0199f094,
0xf10089d0,
0x99f094bd,
0x0007f100,
0x0203f017,
0xbd0009d0,
/* 0x0147: mmctx_size */
0xbd00f804,
/* 0x0149: nv_mmctx_size_loop */
0x00e89894,
0xb61a85b6,
0x84b60180,
0x0098bb02,
0xb804e0b6,
0x1bf404ef,
0x029fb9eb,
/* 0x0166: mmctx_xfer */
0x94bd00f8,
0xf10199f0,
0xf00f0007,
0x09d00203,
0xf104bd00,
0xb6071087,
0x94bd0684,
0xf405bbfd,
0x8bd0090b,
0x0099f000,
/* 0x0180: mmctx_base_disabled */
/* 0x018c: mmctx_base_disabled */
0xf405eefd,
0x8ed00c0b,
0xc08fd080,
/* 0x018f: mmctx_multi_disabled */
/* 0x019b: mmctx_multi_disabled */
0xb70199f0,
0xc8010080,
0xb4b600ab,
@ -250,8 +165,8 @@ uint32_t nvc0_grgpc_code[] = {
0xb601aec8,
0xbefd11e4,
0x008bd005,
/* 0x01a8: mmctx_exec_loop */
/* 0x01a8: mmctx_wait_free */
/* 0x01b4: mmctx_exec_loop */
/* 0x01b4: mmctx_wait_free */
0xf0008ecf,
0x0bf41fe4,
0x00ce98fa,
@ -260,76 +175,77 @@ uint32_t nvc0_grgpc_code[] = {
0x04cdb804,
0xc8e81bf4,
0x1bf402ab,
/* 0x01c9: mmctx_fini_wait */
/* 0x01d5: mmctx_fini_wait */
0x008bcf18,
0xb01fb4f0,
0x1bf410b4,
0x02a7f0f7,
0xf4c921f4,
/* 0x01de: mmctx_stop */
/* 0x01ea: mmctx_stop */
0xabc81b0e,
0x10b4b600,
0xf00cb9f0,
0x8bd012b9,
/* 0x01ed: mmctx_stop_wait */
/* 0x01f9: mmctx_stop_wait */
0x008bcf00,
0xf412bbc8,
/* 0x01f6: mmctx_done */
0x87f1fa1b,
0x84b6085c,
0xf094bd06,
0x89d00199,
/* 0x0207: strand_wait */
0xf900f800,
0x02a7f0a0,
0xfcc921f4,
/* 0x0213: strand_pre */
0xf100f8a0,
0xf04afc87,
0x97f00283,
0x0089d00c,
0x020721f5,
/* 0x0226: strand_post */
0x87f100f8,
0x83f04afc,
0x0d97f002,
0xf50089d0,
0xf8020721,
/* 0x0239: strand_set */
0xfca7f100,
0x02a3f04f,
0x0500aba2,
0xd00fc7f0,
0xc7f000ac,
0x00bcd00b,
0x020721f5,
0xf000aed0,
0xbcd00ac7,
0x0721f500,
/* 0x0263: strand_ctx_init */
0xf100f802,
0xb6083c87,
0x94bd0684,
0xd00399f0,
/* 0x0202: mmctx_done */
0x94bdfa1b,
0xf10199f0,
0xf0170007,
0x09d00203,
0xf804bd00,
/* 0x0215: strand_wait */
0xf0a0f900,
0x21f402a7,
0xf8a0fcc9,
/* 0x0221: strand_pre */
0xfc87f100,
0x0283f04a,
0xd00c97f0,
0x21f50089,
0xe7f00213,
0x3921f503,
0x00f80215,
/* 0x0234: strand_post */
0x4afc87f1,
0xf00283f0,
0x89d00d97,
0x1521f500,
/* 0x0247: strand_set */
0xf100f802,
0xf04ffca7,
0xaba202a3,
0xc7f00500,
0x00acd00f,
0xd00bc7f0,
0x21f500bc,
0xaed00215,
0x0ac7f000,
0xf500bcd0,
0xf8021521,
/* 0x0271: strand_ctx_init */
0xf094bd00,
0x07f10399,
0x03f00f00,
0x0009d002,
0x21f504bd,
0xe7f00221,
0x4721f503,
0xfca7f102,
0x02a3f046,
0x0400aba0,
0xf040a0d0,
0xbcd001c7,
0x0721f500,
0x1521f500,
0x010c9202,
0xf000acd0,
0xbcd002c7,
0x0721f500,
0x2621f502,
0x1521f500,
0x3421f502,
0x8087f102,
0x0684b608,
0xb70089cf,
0x95220080,
/* 0x02ba: ctx_init_strand_loop */
/* 0x02ca: ctx_init_strand_loop */
0x8ed008fe,
0x408ed000,
0xb6808acf,
@ -338,86 +254,74 @@ uint32_t nvc0_grgpc_code[] = {
0xb60480b6,
0x1bf40192,
0x08e4b6e8,
0xf1f2efbc,
0xb6085c87,
0x94bd0684,
0xd00399f0,
0x00f80089,
/* 0x02ec: error */
0xe7f1e0f9,
0xe3f09814,
0x8d21f440,
0x041ce0b7,
0xf401f7f0,
0xe0fc8d21,
/* 0x0306: init */
0x04bd00f8,
0xf10004fe,
0xf0120017,
0x12d00227,
0x3e17f100,
0x0010fe04,
0x040017f1,
0xf0c010d0,
0x12d00427,
0x1031f400,
0x060817f1,
0xcf0614b6,
0x37f00012,
0x1f24f001,
0xb60432bb,
0x02800132,
0x04038003,
0x040010b7,
0x800012cf,
0x27f10002,
0x24b60800,
0x0022cf06,
/* 0x035f: init_find_chipset */
0xb65817f0,
0x13980c10,
0x0432b800,
0xb00b0bf4,
0x1bf40034,
/* 0x0373: init_context */
0xf100f8f1,
0xb6080027,
0x22cf0624,
0xf134bd40,
0xb6070047,
0x25950644,
0x0045d008,
0xbd4045d0,
0x58f4bde4,
0x1f58021e,
0x020e4003,
0xf5040f40,
0xbb013d21,
0x3fbb002f,
0x041e5800,
0x40051f58,
0x0f400a0e,
0x3d21f50c,
0x030e9801,
0xbb00effd,
0x3ebb002e,
0x0040b700,
0x0235b613,
0xb60043d0,
0x35b60825,
0x0120b606,
0xb60130b6,
0x34b60824,
0x022fb908,
0x026321f5,
0xf1003fbb,
0xb6080017,
0x13d00614,
0x0010b740,
0xf024bd08,
0x12d01f29,
/* 0x0401: main */
0x0031f400,
0xbdf2efbc,
0x0399f094,
0x170007f1,
0xd00203f0,
0x04bd0009,
/* 0x02fe: error */
0xe0f900f8,
0x9814e7f1,
0xf440e3f0,
0xe0b78d21,
0xf7f0041c,
0x8d21f401,
0x00f8e0fc,
/* 0x0318: init */
0x04fe04bd,
0x0017f100,
0x0227f012,
0xf10012d0,
0xfe042617,
0x17f10010,
0x10d00400,
0x0427f0c0,
0xf40012d0,
0x17f11031,
0x14b60608,
0x0012cf06,
0xf00137f0,
0x32bb1f24,
0x0132b604,
0x80050280,
0x10b70603,
0x12cf0400,
0x04028000,
0x010027f1,
0xcf0223f0,
0x34bd0022,
0x070047f1,
0x950644b6,
0x45d00825,
0x4045d000,
0x98000e98,
0x21f5010f,
0x2fbb0147,
0x003fbb00,
0x98010e98,
0x21f5020f,
0x0e980147,
0x00effd05,
0xbb002ebb,
0x40b7003e,
0x35b61300,
0x0043d002,
0xb60825b6,
0x20b60635,
0x0130b601,
0xb60824b6,
0x2fb90834,
0x7121f502,
0x003fbb02,
0x010007f1,
0xd00203f0,
0x04bd0003,
0x29f024bd,
0x0007f11f,
0x0203f008,
0xbd0002d0,
/* 0x03e9: main */
0x0031f404,
0xf00028f4,
0x21f41cd7,
0xf401f439,
@ -428,94 +332,100 @@ uint32_t nvc0_grgpc_code[] = {
0x01e4b604,
0xfe051efd,
0x21f50018,
0x0ef404c3,
/* 0x0431: main_not_ctx_xfer */
0x0ef404ad,
/* 0x0419: main_not_ctx_xfer */
0x10ef94d3,
0xf501f5f0,
0xf402ec21,
/* 0x043e: ih */
0xf402fe21,
/* 0x0426: ih */
0x80f9c60e,
0xf90188fe,
0xf990f980,
0xf9b0f9a0,
0xf9e0f9d0,
0x800acff0,
0xf404abc4,
0xb7f11d0b,
0xd7f01900,
0x40becf1c,
0xf400bfcf,
0xb0b70421,
0xe7f00400,
0x00bed001,
/* 0x0474: ih_no_fifo */
0xfc400ad0,
0xfce0fcf0,
0xfcb0fcd0,
0xfc90fca0,
0x0088fe80,
0x32f480fc,
/* 0x048f: hub_barrier_done */
0xf001f800,
0x0e9801f7,
0x04febb00,
0x9418e7f1,
0xf440e3f0,
0x00f88d21,
/* 0x04a4: ctx_redswitch */
0x0614e7f1,
0xf006e4b6,
0xefd020f7,
0x08f7f000,
/* 0x04b4: ctx_redswitch_delay */
0xf401f2b6,
0xf7f1fd1b,
0xefd00a20,
/* 0x04c3: ctx_xfer */
0xf100f800,
0xb60a0417,
0x1fd00614,
0x0711f400,
0x04a421f5,
/* 0x04d4: ctx_xfer_not_load */
0x4afc17f1,
0xf00213f0,
0x12d00c27,
0x0721f500,
0xfc27f102,
0x0223f047,
0xf00020d0,
0x20b6012c,
0x0012d003,
0xf001acf0,
0xb7f002a5,
0x50b3f000,
0xb6000c98,
0xbcbb0fc4,
0x010c9800,
0xf0020d98,
0x21f500e7,
0xacf0015c,
0x04a5f001,
0x4000b7f1,
0x9850b3f0,
0xc4b6000c,
0x00bcbb0f,
0x98050c98,
0x0f98060d,
0x00e7f104,
0x5c21f508,
0x0721f501,
0x0601f402,
/* 0x054b: ctx_xfer_post */
0xf11412f4,
0xf04afc17,
0x27f00213,
0x0012d00d,
0x020721f5,
/* 0x055c: ctx_xfer_done */
0x048f21f5,
0x000000f8,
0xcf04bdf0,
0xabc4800a,
0x1d0bf404,
0x1900b7f1,
0xcf1cd7f0,
0xbfcf40be,
0x0421f400,
0x0400b0b7,
0xd001e7f0,
/* 0x045e: ih_no_fifo */
0x0ad000be,
0xfcf0fc40,
0xfcd0fce0,
0xfca0fcb0,
0xfe80fc90,
0x80fc0088,
0xf80032f4,
/* 0x0479: hub_barrier_done */
0x01f7f001,
0xbb040e98,
0xe7f104fe,
0xe3f09418,
0x8d21f440,
/* 0x048e: ctx_redswitch */
0xe7f100f8,
0xe4b60614,
0x20f7f006,
0xf000efd0,
/* 0x049e: ctx_redswitch_delay */
0xf2b608f7,
0xfd1bf401,
0x0a20f7f1,
0xf800efd0,
/* 0x04ad: ctx_xfer */
0x0417f100,
0x0614b60a,
0xf4001fd0,
0x21f50711,
/* 0x04be: ctx_xfer_not_load */
0x17f1048e,
0x13f04afc,
0x0c27f002,
0xf50012d0,
0xf1021521,
0xf047fc27,
0x20d00223,
0x012cf000,
0xd00320b6,
0xacf00012,
0x02a5f001,
0xf000b7f0,
0x0c9850b3,
0x0fc4b604,
0x9800bcbb,
0x0d98000c,
0x00e7f001,
0x016621f5,
0xf101acf0,
0xf04000b7,
0x0c9850b3,
0x0fc4b604,
0x9800bcbb,
0x0d98010c,
0x060f9802,
0x0800e7f1,
0x016621f5,
0x021521f5,
0xf40601f4,
/* 0x0532: ctx_xfer_post */
0x17f11412,
0x13f04afc,
0x0d27f002,
0xf50012d0,
/* 0x0543: ctx_xfer_done */
0xf5021521,
0xf8047921,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,

42
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvd7.fuc Normal file
View File

@ -0,0 +1,42 @@
/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#define NV_PGRAPH_GPCX_UNK__SIZE 0x00000001
#define CHIPSET GF117
#include "macros.fuc"
.section #nvd7_grgpc_data
#define INCLUDE_DATA
#include "com.fuc"
#include "gpc.fuc"
#undef INCLUDE_DATA
.section #nvd7_grgpc_code
#define INCLUDE_CODE
bra #init
#include "com.fuc"
#include "gpc.fuc"
.align 256
#undef INCLUDE_CODE

475
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvd7.fuc.h Normal file
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@ -0,0 +1,475 @@
uint32_t nvd7_grgpc_data[] = {
/* 0x0000: gpc_mmio_list_head */
0x0000006c,
/* 0x0004: gpc_mmio_list_tail */
/* 0x0004: tpc_mmio_list_head */
0x0000006c,
/* 0x0008: tpc_mmio_list_tail */
/* 0x0008: unk_mmio_list_head */
0x0000006c,
/* 0x000c: unk_mmio_list_tail */
0x0000006c,
/* 0x0010: gpc_id */
0x00000000,
/* 0x0014: tpc_count */
0x00000000,
/* 0x0018: tpc_mask */
0x00000000,
/* 0x001c: unk_count */
0x00000000,
/* 0x0020: unk_mask */
0x00000000,
/* 0x0024: cmd_queue */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};
uint32_t nvd7_grgpc_code[] = {
0x03180ef5,
/* 0x0004: queue_put */
0x9800d898,
0x86f001d9,
0x0489b808,
0xf00c1bf4,
0x21f502f7,
0x00f802fe,
/* 0x001c: queue_put_next */
0xb60798c4,
0x8dbb0384,
0x0880b600,
0x80008e80,
0x90b6018f,
0x0f94f001,
0xf801d980,
/* 0x0039: queue_get */
0x0131f400,
0x9800d898,
0x89b801d9,
0x210bf404,
0xb60789c4,
0x9dbb0394,
0x0890b600,
0x98009e98,
0x80b6019f,
0x0f84f001,
0xf400d880,
/* 0x0066: queue_get_done */
0x00f80132,
/* 0x0068: nv_rd32 */
0x0728b7f1,
0xb906b4b6,
0xc9f002ec,
0x00bcd01f,
/* 0x0078: nv_rd32_wait */
0xc800bccf,
0x1bf41fcc,
0x06a7f0fa,
0x010921f5,
0xf840bfcf,
/* 0x008d: nv_wr32 */
0x28b7f100,
0x06b4b607,
0xb980bfd0,
0xc9f002ec,
0x1ec9f01f,
/* 0x00a3: nv_wr32_wait */
0xcf00bcd0,
0xccc800bc,
0xfa1bf41f,
/* 0x00ae: watchdog_reset */
0x87f100f8,
0x84b60430,
0x1ff9f006,
0xf8008fd0,
/* 0x00bd: watchdog_clear */
0x3087f100,
0x0684b604,
0xf80080d0,
/* 0x00c9: wait_donez */
0xf094bd00,
0x07f10099,
0x03f00f00,
0x0009d002,
0x07f104bd,
0x03f00600,
0x000ad002,
/* 0x00e6: wait_donez_ne */
0x87f104bd,
0x83f00000,
0x0088cf01,
0xf4888aff,
0x94bdf31b,
0xf10099f0,
0xf0170007,
0x09d00203,
0xf804bd00,
/* 0x0109: wait_doneo */
0xf094bd00,
0x07f10099,
0x03f00f00,
0x0009d002,
0x87f104bd,
0x84b60818,
0x008ad006,
/* 0x0124: wait_doneo_e */
0x040087f1,
0xcf0684b6,
0x8aff0088,
0xf30bf488,
0x99f094bd,
0x0007f100,
0x0203f017,
0xbd0009d0,
/* 0x0147: mmctx_size */
0xbd00f804,
/* 0x0149: nv_mmctx_size_loop */
0x00e89894,
0xb61a85b6,
0x84b60180,
0x0098bb02,
0xb804e0b6,
0x1bf404ef,
0x029fb9eb,
/* 0x0166: mmctx_xfer */
0x94bd00f8,
0xf10199f0,
0xf00f0007,
0x09d00203,
0xf104bd00,
0xb6071087,
0x94bd0684,
0xf405bbfd,
0x8bd0090b,
0x0099f000,
/* 0x018c: mmctx_base_disabled */
0xf405eefd,
0x8ed00c0b,
0xc08fd080,
/* 0x019b: mmctx_multi_disabled */
0xb70199f0,
0xc8010080,
0xb4b600ab,
0x0cb9f010,
0xb601aec8,
0xbefd11e4,
0x008bd005,
/* 0x01b4: mmctx_exec_loop */
/* 0x01b4: mmctx_wait_free */
0xf0008ecf,
0x0bf41fe4,
0x00ce98fa,
0xd005e9fd,
0xc0b6c08e,
0x04cdb804,
0xc8e81bf4,
0x1bf402ab,
/* 0x01d5: mmctx_fini_wait */
0x008bcf18,
0xb01fb4f0,
0x1bf410b4,
0x02a7f0f7,
0xf4c921f4,
/* 0x01ea: mmctx_stop */
0xabc81b0e,
0x10b4b600,
0xf00cb9f0,
0x8bd012b9,
/* 0x01f9: mmctx_stop_wait */
0x008bcf00,
0xf412bbc8,
/* 0x0202: mmctx_done */
0x94bdfa1b,
0xf10199f0,
0xf0170007,
0x09d00203,
0xf804bd00,
/* 0x0215: strand_wait */
0xf0a0f900,
0x21f402a7,
0xf8a0fcc9,
/* 0x0221: strand_pre */
0xfc87f100,
0x0283f04a,
0xd00c97f0,
0x21f50089,
0x00f80215,
/* 0x0234: strand_post */
0x4afc87f1,
0xf00283f0,
0x89d00d97,
0x1521f500,
/* 0x0247: strand_set */
0xf100f802,
0xf04ffca7,
0xaba202a3,
0xc7f00500,
0x00acd00f,
0xd00bc7f0,
0x21f500bc,
0xaed00215,
0x0ac7f000,
0xf500bcd0,
0xf8021521,
/* 0x0271: strand_ctx_init */
0xf094bd00,
0x07f10399,
0x03f00f00,
0x0009d002,
0x21f504bd,
0xe7f00221,
0x4721f503,
0xfca7f102,
0x02a3f046,
0x0400aba0,
0xf040a0d0,
0xbcd001c7,
0x1521f500,
0x010c9202,
0xf000acd0,
0xbcd002c7,
0x1521f500,
0x3421f502,
0x8087f102,
0x0684b608,
0xb70089cf,
0x95220080,
/* 0x02ca: ctx_init_strand_loop */
0x8ed008fe,
0x408ed000,
0xb6808acf,
0xa0b606a5,
0x00eabb01,
0xb60480b6,
0x1bf40192,
0x08e4b6e8,
0xbdf2efbc,
0x0399f094,
0x170007f1,
0xd00203f0,
0x04bd0009,
/* 0x02fe: error */
0xe0f900f8,
0x9814e7f1,
0xf440e3f0,
0xe0b78d21,
0xf7f0041c,
0x8d21f401,
0x00f8e0fc,
/* 0x0318: init */
0x04fe04bd,
0x0017f100,
0x0227f012,
0xf10012d0,
0xfe047017,
0x17f10010,
0x10d00400,
0x0427f0c0,
0xf40012d0,
0x17f11031,
0x14b60608,
0x0012cf06,
0xf00137f0,
0x32bb1f24,
0x0132b604,
0x80050280,
0x10b70603,
0x12cf0400,
0x04028000,
0x0c30e7f1,
0xbd50e3f0,
0xbd34bd24,
/* 0x0371: init_unk_loop */
0x6821f444,
0xf400f6b0,
0xf7f00f0b,
0x04f2bb01,
0xb6054ffd,
/* 0x0386: init_unk_next */
0x20b60130,
0x04e0b601,
0xf40126b0,
/* 0x0392: init_unk_done */
0x0380e21b,
0x08048007,
0x010027f1,
0xcf0223f0,
0x34bd0022,
0x070047f1,
0x950644b6,
0x45d00825,
0x4045d000,
0x98000e98,
0x21f5010f,
0x2fbb0147,
0x003fbb00,
0x98010e98,
0x21f5020f,
0x0e980147,
0x00effd05,
0xbb002ebb,
0x0e98003e,
0x030f9802,
0x014721f5,
0xfd070e98,
0x2ebb00ef,
0x003ebb00,
0x130040b7,
0xd00235b6,
0x25b60043,
0x0635b608,
0xb60120b6,
0x24b60130,
0x0834b608,
0xf5022fb9,
0xbb027121,
0x07f1003f,
0x03f00100,
0x0003d002,
0x24bd04bd,
0xf11f29f0,
0xf0080007,
0x02d00203,
/* 0x0433: main */
0xf404bd00,
0x28f40031,
0x24d7f000,
0xf43921f4,
0xe4b0f401,
0x1e18f404,
0xf00181fe,
0x20bd0627,
0xb60412fd,
0x1efd01e4,
0x0018fe05,
0x04f721f5,
/* 0x0463: main_not_ctx_xfer */
0x94d30ef4,
0xf5f010ef,
0xfe21f501,
0xc60ef402,
/* 0x0470: ih */
0x88fe80f9,
0xf980f901,
0xf9a0f990,
0xf9d0f9b0,
0xbdf0f9e0,
0x800acf04,
0xf404abc4,
0xb7f11d0b,
0xd7f01900,
0x40becf24,
0xf400bfcf,
0xb0b70421,
0xe7f00400,
0x00bed001,
/* 0x04a8: ih_no_fifo */
0xfc400ad0,
0xfce0fcf0,
0xfcb0fcd0,
0xfc90fca0,
0x0088fe80,
0x32f480fc,
/* 0x04c3: hub_barrier_done */
0xf001f800,
0x0e9801f7,
0x04febb04,
0x9418e7f1,
0xf440e3f0,
0x00f88d21,
/* 0x04d8: ctx_redswitch */
0x0614e7f1,
0xf006e4b6,
0xefd020f7,
0x08f7f000,
/* 0x04e8: ctx_redswitch_delay */
0xf401f2b6,
0xf7f1fd1b,
0xefd00a20,
/* 0x04f7: ctx_xfer */
0xf100f800,
0xb60a0417,
0x1fd00614,
0x0711f400,
0x04d821f5,
/* 0x0508: ctx_xfer_not_load */
0x4afc17f1,
0xf00213f0,
0x12d00c27,
0x1521f500,
0xfc27f102,
0x0223f047,
0xf00020d0,
0x20b6012c,
0x0012d003,
0xf001acf0,
0xb7f002a5,
0x50b3f000,
0xb6040c98,
0xbcbb0fc4,
0x000c9800,
0xf0010d98,
0x21f500e7,
0xacf00166,
0x00b7f101,
0x50b3f040,
0xb6040c98,
0xbcbb0fc4,
0x010c9800,
0x98020d98,
0xe7f1060f,
0x21f50800,
0xacf00166,
0x04a5f001,
0x3000b7f1,
0x9850b3f0,
0xc4b6040c,
0x00bcbb0f,
0x98020c98,
0x0f98030d,
0x00e7f108,
0x6621f502,
0x1521f501,
0x0601f402,
/* 0x05a3: ctx_xfer_post */
0xf11412f4,
0xf04afc17,
0x27f00213,
0x0012d00d,
0x021521f5,
/* 0x05b4: ctx_xfer_done */
0x04c321f5,
0x000000f8,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};

141
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnve0.fuc
View File

@ -22,150 +22,15 @@
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#define NVGK
#define NV_PGRAPH_GPCX_UNK__SIZE 0x00000001
#define CHIPSET GK100
#include "macros.fuc"
.section #nve0_grgpc_data
#define INCLUDE_DATA
#include "com.fuc"
#include "gpc.fuc"
chipsets:
.b8 0xe4 0 0 0
.b16 #nve4_gpc_mmio_head
.b16 #nve4_gpc_mmio_tail
.b16 #nve4_tpc_mmio_head
.b16 #nve4_tpc_mmio_tail
.b8 0xe7 0 0 0
.b16 #nve4_gpc_mmio_head
.b16 #nve4_gpc_mmio_tail
.b16 #nve4_tpc_mmio_head
.b16 #nve4_tpc_mmio_tail
.b8 0xe6 0 0 0
.b16 #nve4_gpc_mmio_head
.b16 #nve4_gpc_mmio_tail
.b16 #nve4_tpc_mmio_head
.b16 #nve4_tpc_mmio_tail
.b8 0xf0 0 0 0
.b16 #nvf0_gpc_mmio_head
.b16 #nvf0_gpc_mmio_tail
.b16 #nvf0_tpc_mmio_head
.b16 #nvf0_tpc_mmio_tail
.b8 0 0 0 0
// GPC mmio lists
nve4_gpc_mmio_head:
mmctx_data(0x000380, 1)
mmctx_data(0x000400, 2)
mmctx_data(0x00040c, 3)
mmctx_data(0x000450, 9)
mmctx_data(0x000600, 1)
mmctx_data(0x000684, 1)
mmctx_data(0x000700, 5)
mmctx_data(0x000800, 1)
mmctx_data(0x000808, 3)
mmctx_data(0x000828, 1)
mmctx_data(0x000830, 1)
mmctx_data(0x0008d8, 1)
mmctx_data(0x0008e0, 1)
mmctx_data(0x0008e8, 6)
mmctx_data(0x00091c, 1)
mmctx_data(0x000924, 3)
mmctx_data(0x000b00, 1)
mmctx_data(0x000b08, 6)
mmctx_data(0x000bb8, 1)
mmctx_data(0x000c08, 1)
mmctx_data(0x000c10, 8)
mmctx_data(0x000c40, 1)
mmctx_data(0x000c6c, 1)
mmctx_data(0x000c80, 1)
mmctx_data(0x000c8c, 1)
mmctx_data(0x001000, 3)
mmctx_data(0x001014, 1)
mmctx_data(0x003024, 1)
mmctx_data(0x0030c0, 2)
mmctx_data(0x0030e4, 1)
mmctx_data(0x003100, 6)
mmctx_data(0x0031d0, 1)
mmctx_data(0x0031e0, 2)
nve4_gpc_mmio_tail:
nvf0_gpc_mmio_head:
mmctx_data(0x000380, 1)
mmctx_data(0x000400, 2)
mmctx_data(0x00040c, 3)
mmctx_data(0x000450, 9)
mmctx_data(0x000600, 1)
mmctx_data(0x000684, 1)
mmctx_data(0x000700, 5)
mmctx_data(0x000800, 1)
mmctx_data(0x000808, 3)
mmctx_data(0x000828, 1)
mmctx_data(0x000830, 1)
mmctx_data(0x0008d8, 1)
mmctx_data(0x0008e0, 1)
mmctx_data(0x0008e8, 6)
mmctx_data(0x00091c, 1)
mmctx_data(0x000924, 3)
mmctx_data(0x000b00, 1)
mmctx_data(0x000b08, 6)
mmctx_data(0x000bb8, 1)
mmctx_data(0x000c08, 1)
mmctx_data(0x000c10, 8)
mmctx_data(0x000c40, 1)
mmctx_data(0x000c6c, 1)
mmctx_data(0x000c80, 1)
mmctx_data(0x000c8c, 1)
mmctx_data(0x000d24, 1)
mmctx_data(0x001000, 3)
mmctx_data(0x001014, 1)
nvf0_gpc_mmio_tail:
// TPC mmio lists
nve4_tpc_mmio_head:
mmctx_data(0x000048, 1)
mmctx_data(0x000064, 1)
mmctx_data(0x000088, 1)
mmctx_data(0x000200, 6)
mmctx_data(0x00021c, 2)
mmctx_data(0x000230, 1)
mmctx_data(0x0002c4, 1)
mmctx_data(0x000400, 3)
mmctx_data(0x000420, 3)
mmctx_data(0x0004e8, 1)
mmctx_data(0x0004f4, 1)
mmctx_data(0x000604, 4)
mmctx_data(0x000644, 22)
mmctx_data(0x0006ac, 2)
mmctx_data(0x0006c8, 1)
mmctx_data(0x000730, 8)
mmctx_data(0x000758, 1)
mmctx_data(0x000770, 1)
mmctx_data(0x000778, 2)
nve4_tpc_mmio_tail:
nvf0_tpc_mmio_head:
mmctx_data(0x000048, 1)
mmctx_data(0x000064, 1)
mmctx_data(0x000088, 1)
mmctx_data(0x000200, 6)
mmctx_data(0x00021c, 2)
mmctx_data(0x000230, 1)
mmctx_data(0x0002c4, 1)
mmctx_data(0x000400, 3)
mmctx_data(0x000420, 3)
mmctx_data(0x0004e8, 1)
mmctx_data(0x0004f4, 1)
mmctx_data(0x000604, 4)
mmctx_data(0x000644, 22)
mmctx_data(0x0006ac, 2)
mmctx_data(0x0006b8, 1)
mmctx_data(0x0006c8, 1)
mmctx_data(0x000730, 8)
mmctx_data(0x000758, 1)
mmctx_data(0x000770, 1)
mmctx_data(0x000778, 2)
nvf0_tpc_mmio_tail:
#undef INCLUDE_DATA
.section #nve0_grgpc_code

632
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnve0.fuc.h
View File

@ -1,19 +1,25 @@
uint32_t nve0_grgpc_data[] = {
/* 0x0000: gpc_id */
/* 0x0000: gpc_mmio_list_head */
0x0000006c,
/* 0x0004: gpc_mmio_list_tail */
/* 0x0004: tpc_mmio_list_head */
0x0000006c,
/* 0x0008: tpc_mmio_list_tail */
/* 0x0008: unk_mmio_list_head */
0x0000006c,
/* 0x000c: unk_mmio_list_tail */
0x0000006c,
/* 0x0010: gpc_id */
0x00000000,
/* 0x0004: gpc_mmio_list_head */
/* 0x0014: tpc_count */
0x00000000,
/* 0x0008: gpc_mmio_list_tail */
/* 0x0018: tpc_mask */
0x00000000,
/* 0x000c: tpc_count */
/* 0x001c: unk_count */
0x00000000,
/* 0x0010: tpc_mask */
/* 0x0020: unk_mask */
0x00000000,
/* 0x0014: tpc_mmio_list_head */
0x00000000,
/* 0x0018: tpc_mmio_list_tail */
0x00000000,
/* 0x001c: cmd_queue */
/* 0x0024: cmd_queue */
0x00000000,
0x00000000,
0x00000000,
@ -32,138 +38,17 @@ uint32_t nve0_grgpc_data[] = {
0x00000000,
0x00000000,
0x00000000,
/* 0x0064: chipsets */
0x000000e4,
0x011c0098,
0x01d8018c,
0x000000e7,
0x011c0098,
0x01d8018c,
0x000000e6,
0x011c0098,
0x01d8018c,
0x000000f0,
0x018c011c,
0x022801d8,
0x00000000,
/* 0x0098: nve4_gpc_mmio_head */
0x00000380,
0x04000400,
0x0800040c,
0x20000450,
0x00000600,
0x00000684,
0x10000700,
0x00000800,
0x08000808,
0x00000828,
0x00000830,
0x000008d8,
0x000008e0,
0x140008e8,
0x0000091c,
0x08000924,
0x00000b00,
0x14000b08,
0x00000bb8,
0x00000c08,
0x1c000c10,
0x00000c40,
0x00000c6c,
0x00000c80,
0x00000c8c,
0x08001000,
0x00001014,
0x00003024,
0x040030c0,
0x000030e4,
0x14003100,
0x000031d0,
0x040031e0,
/* 0x011c: nve4_gpc_mmio_tail */
/* 0x011c: nvf0_gpc_mmio_head */
0x00000380,
0x04000400,
0x0800040c,
0x20000450,
0x00000600,
0x00000684,
0x10000700,
0x00000800,
0x08000808,
0x00000828,
0x00000830,
0x000008d8,
0x000008e0,
0x140008e8,
0x0000091c,
0x08000924,
0x00000b00,
0x14000b08,
0x00000bb8,
0x00000c08,
0x1c000c10,
0x00000c40,
0x00000c6c,
0x00000c80,
0x00000c8c,
0x00000d24,
0x08001000,
0x00001014,
/* 0x018c: nvf0_gpc_mmio_tail */
/* 0x018c: nve4_tpc_mmio_head */
0x00000048,
0x00000064,
0x00000088,
0x14000200,
0x0400021c,
0x00000230,
0x000002c4,
0x08000400,
0x08000420,
0x000004e8,
0x000004f4,
0x0c000604,
0x54000644,
0x040006ac,
0x000006c8,
0x1c000730,
0x00000758,
0x00000770,
0x04000778,
/* 0x01d8: nve4_tpc_mmio_tail */
/* 0x01d8: nvf0_tpc_mmio_head */
0x00000048,
0x00000064,
0x00000088,
0x14000200,
0x0400021c,
0x00000230,
0x000002c4,
0x08000400,
0x08000420,
0x000004e8,
0x000004f4,
0x0c000604,
0x54000644,
0x040006ac,
0x000006b8,
0x000006c8,
0x1c000730,
0x00000758,
0x00000770,
0x04000778,
};
uint32_t nve0_grgpc_code[] = {
0x03060ef5,
0x03180ef5,
/* 0x0004: queue_put */
0x9800d898,
0x86f001d9,
0x0489b808,
0xf00c1bf4,
0x21f502f7,
0x00f802ec,
0x00f802fe,
/* 0x001c: queue_put_next */
0xb60798c4,
0x8dbb0384,
@ -195,7 +80,7 @@ uint32_t nve0_grgpc_code[] = {
0xc800bccf,
0x1bf41fcc,
0x06a7f0fa,
0x010321f5,
0x010921f5,
0xf840bfcf,
/* 0x008d: nv_wr32 */
0x28b7f100,
@ -217,63 +102,66 @@ uint32_t nve0_grgpc_code[] = {
0x0684b604,
0xf80080d0,
/* 0x00c9: wait_donez */
0x3c87f100,
0x0684b608,
0x99f094bd,
0x0089d000,
0x081887f1,
0xd00684b6,
/* 0x00e2: wait_donez_ne */
0x87f1008a,
0x84b60400,
0x0088cf06,
0xf094bd00,
0x07f10099,
0x03f00f00,
0x0009d002,
0x07f104bd,
0x03f00600,
0x000ad002,
/* 0x00e6: wait_donez_ne */
0x87f104bd,
0x83f00000,
0x0088cf01,
0xf4888aff,
0x87f1f31b,
0x84b6085c,
0xf094bd06,
0x89d00099,
/* 0x0103: wait_doneo */
0xf100f800,
0xb6083c87,
0x94bd0684,
0xd00099f0,
0x87f10089,
0x94bdf31b,
0xf10099f0,
0xf0170007,
0x09d00203,
0xf804bd00,
/* 0x0109: wait_doneo */
0xf094bd00,
0x07f10099,
0x03f00f00,
0x0009d002,
0x87f104bd,
0x84b60818,
0x008ad006,
/* 0x011c: wait_doneo_e */
/* 0x0124: wait_doneo_e */
0x040087f1,
0xcf0684b6,
0x8aff0088,
0xf30bf488,
0x085c87f1,
0xbd0684b6,
0x0099f094,
0xf80089d0,
/* 0x013d: mmctx_size */
/* 0x013f: nv_mmctx_size_loop */
0x9894bd00,
0x85b600e8,
0x0180b61a,
0xbb0284b6,
0xe0b60098,
0x04efb804,
0xb9eb1bf4,
0x00f8029f,
/* 0x015c: mmctx_xfer */
0x083c87f1,
0xbd0684b6,
0x0199f094,
0xf10089d0,
0x99f094bd,
0x0007f100,
0x0203f017,
0xbd0009d0,
/* 0x0147: mmctx_size */
0xbd00f804,
/* 0x0149: nv_mmctx_size_loop */
0x00e89894,
0xb61a85b6,
0x84b60180,
0x0098bb02,
0xb804e0b6,
0x1bf404ef,
0x029fb9eb,
/* 0x0166: mmctx_xfer */
0x94bd00f8,
0xf10199f0,
0xf00f0007,
0x09d00203,
0xf104bd00,
0xb6071087,
0x94bd0684,
0xf405bbfd,
0x8bd0090b,
0x0099f000,
/* 0x0180: mmctx_base_disabled */
/* 0x018c: mmctx_base_disabled */
0xf405eefd,
0x8ed00c0b,
0xc08fd080,
/* 0x018f: mmctx_multi_disabled */
/* 0x019b: mmctx_multi_disabled */
0xb70199f0,
0xc8010080,
0xb4b600ab,
@ -281,8 +169,8 @@ uint32_t nve0_grgpc_code[] = {
0xb601aec8,
0xbefd11e4,
0x008bd005,
/* 0x01a8: mmctx_exec_loop */
/* 0x01a8: mmctx_wait_free */
/* 0x01b4: mmctx_exec_loop */
/* 0x01b4: mmctx_wait_free */
0xf0008ecf,
0x0bf41fe4,
0x00ce98fa,
@ -291,76 +179,77 @@ uint32_t nve0_grgpc_code[] = {
0x04cdb804,
0xc8e81bf4,
0x1bf402ab,
/* 0x01c9: mmctx_fini_wait */
/* 0x01d5: mmctx_fini_wait */
0x008bcf18,
0xb01fb4f0,
0x1bf410b4,
0x02a7f0f7,
0xf4c921f4,
/* 0x01de: mmctx_stop */
/* 0x01ea: mmctx_stop */
0xabc81b0e,
0x10b4b600,
0xf00cb9f0,
0x8bd012b9,
/* 0x01ed: mmctx_stop_wait */
/* 0x01f9: mmctx_stop_wait */
0x008bcf00,
0xf412bbc8,
/* 0x01f6: mmctx_done */
0x87f1fa1b,
0x84b6085c,
0xf094bd06,
0x89d00199,
/* 0x0207: strand_wait */
0xf900f800,
0x02a7f0a0,
0xfcc921f4,
/* 0x0213: strand_pre */
0xf100f8a0,
0xf04afc87,
0x97f00283,
0x0089d00c,
0x020721f5,
/* 0x0226: strand_post */
0x87f100f8,
0x83f04afc,
0x0d97f002,
0xf50089d0,
0xf8020721,
/* 0x0239: strand_set */
0xfca7f100,
0x02a3f04f,
0x0500aba2,
0xd00fc7f0,
0xc7f000ac,
0x00bcd00b,
0x020721f5,
0xf000aed0,
0xbcd00ac7,
0x0721f500,
/* 0x0263: strand_ctx_init */
0xf100f802,
0xb6083c87,
0x94bd0684,
0xd00399f0,
/* 0x0202: mmctx_done */
0x94bdfa1b,
0xf10199f0,
0xf0170007,
0x09d00203,
0xf804bd00,
/* 0x0215: strand_wait */
0xf0a0f900,
0x21f402a7,
0xf8a0fcc9,
/* 0x0221: strand_pre */
0xfc87f100,
0x0283f04a,
0xd00c97f0,
0x21f50089,
0xe7f00213,
0x3921f503,
0x00f80215,
/* 0x0234: strand_post */
0x4afc87f1,
0xf00283f0,
0x89d00d97,
0x1521f500,
/* 0x0247: strand_set */
0xf100f802,
0xf04ffca7,
0xaba202a3,
0xc7f00500,
0x00acd00f,
0xd00bc7f0,
0x21f500bc,
0xaed00215,
0x0ac7f000,
0xf500bcd0,
0xf8021521,
/* 0x0271: strand_ctx_init */
0xf094bd00,
0x07f10399,
0x03f00f00,
0x0009d002,
0x21f504bd,
0xe7f00221,
0x4721f503,
0xfca7f102,
0x02a3f046,
0x0400aba0,
0xf040a0d0,
0xbcd001c7,
0x0721f500,
0x1521f500,
0x010c9202,
0xf000acd0,
0xbcd002c7,
0x0721f500,
0x2621f502,
0x1521f500,
0x3421f502,
0x8087f102,
0x0684b608,
0xb70089cf,
0x95220080,
/* 0x02ba: ctx_init_strand_loop */
/* 0x02ca: ctx_init_strand_loop */
0x8ed008fe,
0x408ed000,
0xb6808acf,
@ -369,150 +258,160 @@ uint32_t nve0_grgpc_code[] = {
0xb60480b6,
0x1bf40192,
0x08e4b6e8,
0xf1f2efbc,
0xb6085c87,
0x94bd0684,
0xd00399f0,
0x00f80089,
/* 0x02ec: error */
0xe7f1e0f9,
0xe3f09814,
0x8d21f440,
0x041ce0b7,
0xf401f7f0,
0xe0fc8d21,
/* 0x0306: init */
0x04bd00f8,
0xf10004fe,
0xf0120017,
0x12d00227,
0x3e17f100,
0x0010fe04,
0x040017f1,
0xf0c010d0,
0x12d00427,
0x1031f400,
0x060817f1,
0xcf0614b6,
0x37f00012,
0x1f24f001,
0xb60432bb,
0x02800132,
0x04038003,
0x040010b7,
0x800012cf,
0x27f10002,
0x24b60800,
0x0022cf06,
/* 0x035f: init_find_chipset */
0xb65817f0,
0x13980c10,
0x0432b800,
0xb00b0bf4,
0x1bf40034,
/* 0x0373: init_context */
0xf100f8f1,
0xb6080027,
0x22cf0624,
0xf134bd40,
0xb6070047,
0x25950644,
0x0045d008,
0xbd4045d0,
0x58f4bde4,
0x1f58021e,
0x020e4003,
0xf5040f40,
0xbb013d21,
0x3fbb002f,
0x041e5800,
0x40051f58,
0x0f400a0e,
0x3d21f50c,
0x030e9801,
0xbb00effd,
0x3ebb002e,
0x0040b700,
0x0235b613,
0xb60043d0,
0x35b60825,
0x0120b606,
0xb60130b6,
0x34b60824,
0x022fb908,
0x026321f5,
0xf1003fbb,
0xb6080017,
0x13d00614,
0x0010b740,
0xf024bd08,
0x12d01f29,
/* 0x0401: main */
0x0031f400,
0xf00028f4,
0x21f41cd7,
0xf401f439,
0xf404e4b0,
0x81fe1e18,
0x0627f001,
0x12fd20bd,
0x01e4b604,
0xfe051efd,
0x21f50018,
0x0ef404c3,
/* 0x0431: main_not_ctx_xfer */
0x10ef94d3,
0xf501f5f0,
0xf402ec21,
/* 0x043e: ih */
0x80f9c60e,
0xf90188fe,
0xf990f980,
0xf9b0f9a0,
0xf9e0f9d0,
0x800acff0,
0xbdf2efbc,
0x0399f094,
0x170007f1,
0xd00203f0,
0x04bd0009,
/* 0x02fe: error */
0xe0f900f8,
0x9814e7f1,
0xf440e3f0,
0xe0b78d21,
0xf7f0041c,
0x8d21f401,
0x00f8e0fc,
/* 0x0318: init */
0x04fe04bd,
0x0017f100,
0x0227f012,
0xf10012d0,
0xfe047017,
0x17f10010,
0x10d00400,
0x0427f0c0,
0xf40012d0,
0x17f11031,
0x14b60608,
0x0012cf06,
0xf00137f0,
0x32bb1f24,
0x0132b604,
0x80050280,
0x10b70603,
0x12cf0400,
0x04028000,
0x0c30e7f1,
0xbd50e3f0,
0xbd34bd24,
/* 0x0371: init_unk_loop */
0x6821f444,
0xf400f6b0,
0xf7f00f0b,
0x04f2bb01,
0xb6054ffd,
/* 0x0386: init_unk_next */
0x20b60130,
0x04e0b601,
0xf40126b0,
/* 0x0392: init_unk_done */
0x0380e21b,
0x08048007,
0x010027f1,
0xcf0223f0,
0x34bd0022,
0x070047f1,
0x950644b6,
0x45d00825,
0x4045d000,
0x98000e98,
0x21f5010f,
0x2fbb0147,
0x003fbb00,
0x98010e98,
0x21f5020f,
0x0e980147,
0x00effd05,
0xbb002ebb,
0x0e98003e,
0x030f9802,
0x014721f5,
0xfd070e98,
0x2ebb00ef,
0x003ebb00,
0x130040b7,
0xd00235b6,
0x25b60043,
0x0635b608,
0xb60120b6,
0x24b60130,
0x0834b608,
0xf5022fb9,
0xbb027121,
0x07f1003f,
0x03f00100,
0x0003d002,
0x24bd04bd,
0xf11f29f0,
0xf0080007,
0x02d00203,
/* 0x0433: main */
0xf404bd00,
0x28f40031,
0x24d7f000,
0xf43921f4,
0xe4b0f401,
0x1e18f404,
0xf00181fe,
0x20bd0627,
0xb60412fd,
0x1efd01e4,
0x0018fe05,
0x04f721f5,
/* 0x0463: main_not_ctx_xfer */
0x94d30ef4,
0xf5f010ef,
0xfe21f501,
0xc60ef402,
/* 0x0470: ih */
0x88fe80f9,
0xf980f901,
0xf9a0f990,
0xf9d0f9b0,
0xbdf0f9e0,
0x800acf04,
0xf404abc4,
0xb7f11d0b,
0xd7f01900,
0x40becf1c,
0x40becf24,
0xf400bfcf,
0xb0b70421,
0xe7f00400,
0x00bed001,
/* 0x0474: ih_no_fifo */
/* 0x04a8: ih_no_fifo */
0xfc400ad0,
0xfce0fcf0,
0xfcb0fcd0,
0xfc90fca0,
0x0088fe80,
0x32f480fc,
/* 0x048f: hub_barrier_done */
/* 0x04c3: hub_barrier_done */
0xf001f800,
0x0e9801f7,
0x04febb00,
0x04febb04,
0x9418e7f1,
0xf440e3f0,
0x00f88d21,
/* 0x04a4: ctx_redswitch */
/* 0x04d8: ctx_redswitch */
0x0614e7f1,
0xf006e4b6,
0xefd020f7,
0x08f7f000,
/* 0x04b4: ctx_redswitch_delay */
/* 0x04e8: ctx_redswitch_delay */
0xf401f2b6,
0xf7f1fd1b,
0xefd00a20,
/* 0x04c3: ctx_xfer */
/* 0x04f7: ctx_xfer */
0xf100f800,
0xb60a0417,
0x1fd00614,
0x0711f400,
0x04a421f5,
/* 0x04d4: ctx_xfer_not_load */
0x04d821f5,
/* 0x0508: ctx_xfer_not_load */
0x4afc17f1,
0xf00213f0,
0x12d00c27,
0x0721f500,
0x1521f500,
0xfc27f102,
0x0223f047,
0xf00020d0,
@ -521,31 +420,40 @@ uint32_t nve0_grgpc_code[] = {
0xf001acf0,
0xb7f002a5,
0x50b3f000,
0xb6000c98,
0xb6040c98,
0xbcbb0fc4,
0x000c9800,
0xf0010d98,
0x21f500e7,
0xacf00166,
0x00b7f101,
0x50b3f040,
0xb6040c98,
0xbcbb0fc4,
0x010c9800,
0xf0020d98,
0x21f500e7,
0xacf0015c,
0x98020d98,
0xe7f1060f,
0x21f50800,
0xacf00166,
0x04a5f001,
0x4000b7f1,
0x3000b7f1,
0x9850b3f0,
0xc4b6000c,
0xc4b6040c,
0x00bcbb0f,
0x98050c98,
0x0f98060d,
0x00e7f104,
0x5c21f508,
0x0721f501,
0x98020c98,
0x0f98030d,
0x00e7f108,
0x6621f502,
0x1521f501,
0x0601f402,
/* 0x054b: ctx_xfer_post */
/* 0x05a3: ctx_xfer_post */
0xf11412f4,
0xf04afc17,
0x27f00213,
0x0012d00d,
0x020721f5,
/* 0x055c: ctx_xfer_done */
0x048f21f5,
0x021521f5,
/* 0x05b4: ctx_xfer_done */
0x04c321f5,
0x000000f8,
0x00000000,
0x00000000,
@ -564,26 +472,4 @@ uint32_t nve0_grgpc_code[] = {
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};

42
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvf0.fuc Normal file
View File

@ -0,0 +1,42 @@
/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#define NV_PGRAPH_GPCX_UNK__SIZE 0x00000002
#define CHIPSET GK110
#include "macros.fuc"
.section #nvf0_grgpc_data
#define INCLUDE_DATA
#include "com.fuc"
#include "gpc.fuc"
#undef INCLUDE_DATA
.section #nvf0_grgpc_code
#define INCLUDE_CODE
bra #init
#include "com.fuc"
#include "gpc.fuc"
.align 256
#undef INCLUDE_CODE

475
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvf0.fuc.h Normal file
View File

@ -0,0 +1,475 @@
uint32_t nvf0_grgpc_data[] = {
/* 0x0000: gpc_mmio_list_head */
0x0000006c,
/* 0x0004: gpc_mmio_list_tail */
/* 0x0004: tpc_mmio_list_head */
0x0000006c,
/* 0x0008: tpc_mmio_list_tail */
/* 0x0008: unk_mmio_list_head */
0x0000006c,
/* 0x000c: unk_mmio_list_tail */
0x0000006c,
/* 0x0010: gpc_id */
0x00000000,
/* 0x0014: tpc_count */
0x00000000,
/* 0x0018: tpc_mask */
0x00000000,
/* 0x001c: unk_count */
0x00000000,
/* 0x0020: unk_mask */
0x00000000,
/* 0x0024: cmd_queue */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};
uint32_t nvf0_grgpc_code[] = {
0x03180ef5,
/* 0x0004: queue_put */
0x9800d898,
0x86f001d9,
0x0489b808,
0xf00c1bf4,
0x21f502f7,
0x00f802fe,
/* 0x001c: queue_put_next */
0xb60798c4,
0x8dbb0384,
0x0880b600,
0x80008e80,
0x90b6018f,
0x0f94f001,
0xf801d980,
/* 0x0039: queue_get */
0x0131f400,
0x9800d898,
0x89b801d9,
0x210bf404,
0xb60789c4,
0x9dbb0394,
0x0890b600,
0x98009e98,
0x80b6019f,
0x0f84f001,
0xf400d880,
/* 0x0066: queue_get_done */
0x00f80132,
/* 0x0068: nv_rd32 */
0x0728b7f1,
0xb906b4b6,
0xc9f002ec,
0x00bcd01f,
/* 0x0078: nv_rd32_wait */
0xc800bccf,
0x1bf41fcc,
0x06a7f0fa,
0x010921f5,
0xf840bfcf,
/* 0x008d: nv_wr32 */
0x28b7f100,
0x06b4b607,
0xb980bfd0,
0xc9f002ec,
0x1ec9f01f,
/* 0x00a3: nv_wr32_wait */
0xcf00bcd0,
0xccc800bc,
0xfa1bf41f,
/* 0x00ae: watchdog_reset */
0x87f100f8,
0x84b60430,
0x1ff9f006,
0xf8008fd0,
/* 0x00bd: watchdog_clear */
0x3087f100,
0x0684b604,
0xf80080d0,
/* 0x00c9: wait_donez */
0xf094bd00,
0x07f10099,
0x03f03700,
0x0009d002,
0x07f104bd,
0x03f00600,
0x000ad002,
/* 0x00e6: wait_donez_ne */
0x87f104bd,
0x83f00000,
0x0088cf01,
0xf4888aff,
0x94bdf31b,
0xf10099f0,
0xf0170007,
0x09d00203,
0xf804bd00,
/* 0x0109: wait_doneo */
0xf094bd00,
0x07f10099,
0x03f03700,
0x0009d002,
0x87f104bd,
0x84b60818,
0x008ad006,
/* 0x0124: wait_doneo_e */
0x040087f1,
0xcf0684b6,
0x8aff0088,
0xf30bf488,
0x99f094bd,
0x0007f100,
0x0203f017,
0xbd0009d0,
/* 0x0147: mmctx_size */
0xbd00f804,
/* 0x0149: nv_mmctx_size_loop */
0x00e89894,
0xb61a85b6,
0x84b60180,
0x0098bb02,
0xb804e0b6,
0x1bf404ef,
0x029fb9eb,
/* 0x0166: mmctx_xfer */
0x94bd00f8,
0xf10199f0,
0xf0370007,
0x09d00203,
0xf104bd00,
0xb6071087,
0x94bd0684,
0xf405bbfd,
0x8bd0090b,
0x0099f000,
/* 0x018c: mmctx_base_disabled */
0xf405eefd,
0x8ed00c0b,
0xc08fd080,
/* 0x019b: mmctx_multi_disabled */
0xb70199f0,
0xc8010080,
0xb4b600ab,
0x0cb9f010,
0xb601aec8,
0xbefd11e4,
0x008bd005,
/* 0x01b4: mmctx_exec_loop */
/* 0x01b4: mmctx_wait_free */
0xf0008ecf,
0x0bf41fe4,
0x00ce98fa,
0xd005e9fd,
0xc0b6c08e,
0x04cdb804,
0xc8e81bf4,
0x1bf402ab,
/* 0x01d5: mmctx_fini_wait */
0x008bcf18,
0xb01fb4f0,
0x1bf410b4,
0x02a7f0f7,
0xf4c921f4,
/* 0x01ea: mmctx_stop */
0xabc81b0e,
0x10b4b600,
0xf00cb9f0,
0x8bd012b9,
/* 0x01f9: mmctx_stop_wait */
0x008bcf00,
0xf412bbc8,
/* 0x0202: mmctx_done */
0x94bdfa1b,
0xf10199f0,
0xf0170007,
0x09d00203,
0xf804bd00,
/* 0x0215: strand_wait */
0xf0a0f900,
0x21f402a7,
0xf8a0fcc9,
/* 0x0221: strand_pre */
0xfc87f100,
0x0283f04a,
0xd00c97f0,
0x21f50089,
0x00f80215,
/* 0x0234: strand_post */
0x4afc87f1,
0xf00283f0,
0x89d00d97,
0x1521f500,
/* 0x0247: strand_set */
0xf100f802,
0xf04ffca7,
0xaba202a3,
0xc7f00500,
0x00acd00f,
0xd00bc7f0,
0x21f500bc,
0xaed00215,
0x0ac7f000,
0xf500bcd0,
0xf8021521,
/* 0x0271: strand_ctx_init */
0xf094bd00,
0x07f10399,
0x03f03700,
0x0009d002,
0x21f504bd,
0xe7f00221,
0x4721f503,
0xfca7f102,
0x02a3f046,
0x0400aba0,
0xf040a0d0,
0xbcd001c7,
0x1521f500,
0x010c9202,
0xf000acd0,
0xbcd002c7,
0x1521f500,
0x3421f502,
0x8087f102,
0x0684b608,
0xb70089cf,
0x95220080,
/* 0x02ca: ctx_init_strand_loop */
0x8ed008fe,
0x408ed000,
0xb6808acf,
0xa0b606a5,
0x00eabb01,
0xb60480b6,
0x1bf40192,
0x08e4b6e8,
0xbdf2efbc,
0x0399f094,
0x170007f1,
0xd00203f0,
0x04bd0009,
/* 0x02fe: error */
0xe0f900f8,
0x9814e7f1,
0xf440e3f0,
0xe0b78d21,
0xf7f0041c,
0x8d21f401,
0x00f8e0fc,
/* 0x0318: init */
0x04fe04bd,
0x0017f100,
0x0227f012,
0xf10012d0,
0xfe047017,
0x17f10010,
0x10d00400,
0x0427f0c0,
0xf40012d0,
0x17f11031,
0x14b60608,
0x0012cf06,
0xf00137f0,
0x32bb1f24,
0x0132b604,
0x80050280,
0x10b70603,
0x12cf0400,
0x04028000,
0x0c30e7f1,
0xbd50e3f0,
0xbd34bd24,
/* 0x0371: init_unk_loop */
0x6821f444,
0xf400f6b0,
0xf7f00f0b,
0x04f2bb01,
0xb6054ffd,
/* 0x0386: init_unk_next */
0x20b60130,
0x04e0b601,
0xf40226b0,
/* 0x0392: init_unk_done */
0x0380e21b,
0x08048007,
0x010027f1,
0xcf0223f0,
0x34bd0022,
0x070047f1,
0x950644b6,
0x45d00825,
0x4045d000,
0x98000e98,
0x21f5010f,
0x2fbb0147,
0x003fbb00,
0x98010e98,
0x21f5020f,
0x0e980147,
0x00effd05,
0xbb002ebb,
0x0e98003e,
0x030f9802,
0x014721f5,
0xfd070e98,
0x2ebb00ef,
0x003ebb00,
0x130040b7,
0xd00235b6,
0x25b60043,
0x0635b608,
0xb60120b6,
0x24b60130,
0x0834b608,
0xf5022fb9,
0xbb027121,
0x07f1003f,
0x03f00100,
0x0003d002,
0x24bd04bd,
0xf11f29f0,
0xf0300007,
0x02d00203,
/* 0x0433: main */
0xf404bd00,
0x28f40031,
0x24d7f000,
0xf43921f4,
0xe4b0f401,
0x1e18f404,
0xf00181fe,
0x20bd0627,
0xb60412fd,
0x1efd01e4,
0x0018fe05,
0x04f721f5,
/* 0x0463: main_not_ctx_xfer */
0x94d30ef4,
0xf5f010ef,
0xfe21f501,
0xc60ef402,
/* 0x0470: ih */
0x88fe80f9,
0xf980f901,
0xf9a0f990,
0xf9d0f9b0,
0xbdf0f9e0,
0x800acf04,
0xf404abc4,
0xb7f11d0b,
0xd7f01900,
0x40becf24,
0xf400bfcf,
0xb0b70421,
0xe7f00400,
0x00bed001,
/* 0x04a8: ih_no_fifo */
0xfc400ad0,
0xfce0fcf0,
0xfcb0fcd0,
0xfc90fca0,
0x0088fe80,
0x32f480fc,
/* 0x04c3: hub_barrier_done */
0xf001f800,
0x0e9801f7,
0x04febb04,
0x9418e7f1,
0xf440e3f0,
0x00f88d21,
/* 0x04d8: ctx_redswitch */
0x0614e7f1,
0xf006e4b6,
0xefd020f7,
0x08f7f000,
/* 0x04e8: ctx_redswitch_delay */
0xf401f2b6,
0xf7f1fd1b,
0xefd00a20,
/* 0x04f7: ctx_xfer */
0xf100f800,
0xb60a0417,
0x1fd00614,
0x0711f400,
0x04d821f5,
/* 0x0508: ctx_xfer_not_load */
0x4afc17f1,
0xf00213f0,
0x12d00c27,
0x1521f500,
0xfc27f102,
0x0223f047,
0xf00020d0,
0x20b6012c,
0x0012d003,
0xf001acf0,
0xb7f002a5,
0x50b3f000,
0xb6040c98,
0xbcbb0fc4,
0x000c9800,
0xf0010d98,
0x21f500e7,
0xacf00166,
0x00b7f101,
0x50b3f040,
0xb6040c98,
0xbcbb0fc4,
0x010c9800,
0x98020d98,
0xe7f1060f,
0x21f50800,
0xacf00166,
0x04a5f001,
0x3000b7f1,
0x9850b3f0,
0xc4b6040c,
0x00bcbb0f,
0x98020c98,
0x0f98030d,
0x00e7f108,
0x6621f502,
0x1521f501,
0x0601f402,
/* 0x05a3: ctx_xfer_post */
0xf11412f4,
0xf04afc17,
0x27f00213,
0x0012d00d,
0x021521f5,
/* 0x05b4: ctx_xfer_done */
0x04c321f5,
0x000000f8,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};

69
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hub.fuc
View File

@ -24,11 +24,12 @@
*/
#ifdef INCLUDE_DATA
hub_mmio_list_head: .b32 #hub_mmio_list_base
hub_mmio_list_tail: .b32 #hub_mmio_list_next
gpc_count: .b32 0
rop_count: .b32 0
cmd_queue: queue_init
hub_mmio_list_head: .b32 0
hub_mmio_list_tail: .b32 0
ctx_current: .b32 0
@ -40,6 +41,9 @@ chan_mmio_address: .b32 0
.align 256
xfer_data: .skip 256
hub_mmio_list_base:
.b32 0x0417e91c // 0x17e91c, 2
hub_mmio_list_next:
#endif
#ifdef INCLUDE_CODE
@ -48,23 +52,14 @@ xfer_data: .skip 256
// In: $r15 error code (see nvc0.fuc)
//
error:
push $r14
mov $r14 0x814
shl b32 $r14 6
iowr I[$r14 + 0x000] $r15 // CC_SCRATCH[5] = error code
mov $r14 0xc1c
shl b32 $r14 6
nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_VAL(5), 0, $r15)
mov $r15 1
iowr I[$r14 + 0x000] $r15 // INTR_UP_SET
pop $r14
nv_iowr(NV_PGRAPH_FECS_INTR_UP_SET, 0, $r15)
ret
// HUB fuc initialisation, executed by triggering ucode start, will
// fall through to main loop after completion.
//
// Input:
// CC_SCRATCH[0]: chipset (PMC_BOOT_0 read returns 0x0bad0bad... sigh)
//
// Output:
// CC_SCRATCH[0]:
// 31:31: set to signal completion
@ -141,31 +136,12 @@ init:
iowr I[$r2 + 0x000] $r1
iowr I[$r2 + 0x100] $r1
// find context data for this chipset
mov $r2 0x800
shl b32 $r2 6
iord $r2 I[$r2 + 0x000] // CC_SCRATCH[0]
mov $r15 #chipsets - 8
init_find_chipset:
add b32 $r15 8
ld b32 $r3 D[$r15 + 0x00]
cmpu b32 $r3 $r2
bra e #init_context
cmpu b32 $r3 0
bra ne #init_find_chipset
// unknown chipset
ret
// context size calculation, reserve first 256 bytes for use by fuc
init_context:
mov $r1 256
// calculate size of mmio context data
ld b16 $r14 D[$r15 + 4]
ld b16 $r15 D[$r15 + 6]
sethi $r14 0
st b32 D[$r0 + #hub_mmio_list_head] $r14
st b32 D[$r0 + #hub_mmio_list_tail] $r15
ld b32 $r14 D[$r0 + #hub_mmio_list_head]
ld b32 $r15 D[$r0 + #hub_mmio_list_tail]
call #mmctx_size
// set mmctx base addresses now so we don't have to do it later,
@ -204,9 +180,6 @@ init:
add b32 $r14 $r4 0x804
mov b32 $r15 $r1
call #nv_wr32 // CC_SCRATCH[1] = ctx offset
add b32 $r14 $r4 0x800
mov b32 $r15 $r2
call #nv_wr32 // CC_SCRATCH[0] = chipset
add b32 $r14 $r4 0x10c
clear b32 $r15
call #nv_wr32
@ -232,13 +205,10 @@ init:
bra ne #init_gpc
// save context size, and tell host we're ready
mov $r2 0x800
shl b32 $r2 6
iowr I[$r2 + 0x100] $r1 // CC_SCRATCH[1] = context size
add b32 $r2 0x800
nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_VAL(1), 0, $r1)
clear b32 $r1
bset $r1 31
iowr I[$r2 + 0x000] $r1 // CC_SCRATCH[0] |= 0x80000000
nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_SET(0), 0, $r1)
// Main program loop, very simple, sleeps until woken up by the interrupt
// handler, pulls a command from the queue and executes its handler
@ -330,11 +300,9 @@ main:
bra #main
main_done:
mov $r1 0x820
shl b32 $r1 6
clear b32 $r2
bset $r2 31
iowr I[$r1 + 0x000] $r2 // CC_SCRATCH[0] |= 0x80000000
nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_SET(0), 0, $r2)
bra #main
// interrupt handler
@ -348,6 +316,7 @@ ih:
push $r13
push $r14
push $r15
clear b32 $r0
// incoming fifo command?
iord $r10 I[$r0 + 0x200] // INTR
@ -398,7 +367,7 @@ ih:
bclr $flags $p0
iret
#ifdef NVGF
#if CHIPSET < GK100
// Not real sure, but, MEM_CMD 7 will hang forever if this isn't done
ctx_4160s:
mov $r14 0x4160
@ -562,7 +531,7 @@ ctx_load:
// In: $r2 channel address
//
ctx_chan:
#ifdef NVGF
#if CHIPSET < GK100
call #ctx_4160s
#endif
call #ctx_load
@ -576,7 +545,7 @@ ctx_chan:
iord $r2 I[$r1 + 0x000]
or $r2 $r2
bra ne #ctx_chan_wait
#ifdef NVGF
#if CHIPSET < GK100
call #ctx_4160c
#endif
ret
@ -655,7 +624,7 @@ ctx_xfer:
ctx_xfer_pre:
mov $r15 0x10
call #ctx_86c
#ifdef NVGF
#if CHIPSET < GK100
call #ctx_4160s
#endif
bra not $p1 #ctx_xfer_exec
@ -746,7 +715,7 @@ ctx_xfer:
call #ctx_mmio_exec
ctx_xfer_no_post_mmio:
#ifdef NVGF
#if CHIPSET < GK100
call #ctx_4160c
#endif

81
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvc0.fuc
View File

@ -22,92 +22,13 @@
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#define NVGF
#define CHIPSET GF100
#include "macros.fuc"
.section #nvc0_grhub_data
#define INCLUDE_DATA
#include "com.fuc"
#include "hub.fuc"
chipsets:
.b8 0xc0 0 0 0
.b16 #nvc0_hub_mmio_head
.b16 #nvc0_hub_mmio_tail
.b8 0xc1 0 0 0
.b16 #nvc0_hub_mmio_head
.b16 #nvc1_hub_mmio_tail
.b8 0xc3 0 0 0
.b16 #nvc0_hub_mmio_head
.b16 #nvc0_hub_mmio_tail
.b8 0xc4 0 0 0
.b16 #nvc0_hub_mmio_head
.b16 #nvc0_hub_mmio_tail
.b8 0xc8 0 0 0
.b16 #nvc0_hub_mmio_head
.b16 #nvc0_hub_mmio_tail
.b8 0xce 0 0 0
.b16 #nvc0_hub_mmio_head
.b16 #nvc0_hub_mmio_tail
.b8 0xcf 0 0 0
.b16 #nvc0_hub_mmio_head
.b16 #nvc0_hub_mmio_tail
.b8 0xd9 0 0 0
.b16 #nvd9_hub_mmio_head
.b16 #nvd9_hub_mmio_tail
.b8 0xd7 0 0 0
.b16 #nvd9_hub_mmio_head
.b16 #nvd9_hub_mmio_tail
.b8 0 0 0 0
nvc0_hub_mmio_head:
mmctx_data(0x40402c, 1)
mmctx_data(0x404174, 1)
nvd9_hub_mmio_head:
mmctx_data(0x17e91c, 2)
mmctx_data(0x400204, 2)
mmctx_data(0x404004, 10)
mmctx_data(0x404044, 1)
mmctx_data(0x404094, 14)
mmctx_data(0x4040d0, 7)
mmctx_data(0x4040f8, 1)
mmctx_data(0x404130, 3)
mmctx_data(0x404150, 3)
mmctx_data(0x404164, 2)
mmctx_data(0x404178, 2)
mmctx_data(0x404200, 8)
mmctx_data(0x404404, 14)
mmctx_data(0x404460, 4)
mmctx_data(0x404480, 1)
mmctx_data(0x404498, 1)
mmctx_data(0x404604, 4)
mmctx_data(0x404618, 32)
mmctx_data(0x404698, 21)
mmctx_data(0x4046f0, 2)
mmctx_data(0x404700, 22)
mmctx_data(0x405800, 1)
mmctx_data(0x405830, 3)
mmctx_data(0x405854, 1)
mmctx_data(0x405870, 4)
mmctx_data(0x405a00, 2)
mmctx_data(0x405a18, 1)
mmctx_data(0x406020, 1)
mmctx_data(0x406028, 4)
mmctx_data(0x4064a8, 2)
mmctx_data(0x4064b4, 2)
mmctx_data(0x407804, 1)
mmctx_data(0x40780c, 6)
mmctx_data(0x4078bc, 1)
mmctx_data(0x408000, 7)
mmctx_data(0x408064, 1)
mmctx_data(0x408800, 3)
mmctx_data(0x408900, 3)
mmctx_data(0x408980, 1)
nvc0_hub_mmio_tail:
mmctx_data(0x4064c0, 2)
nvc1_hub_mmio_tail:
mmctx_data(0x4064bc, 3)
nvd9_hub_mmio_tail:
#undef INCLUDE_DATA
.section #nvc0_grhub_code

1141
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvc0.fuc.h
View File

File diff suppressed because it is too large Load Diff

40
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvd7.fuc Normal file
View File

@ -0,0 +1,40 @@
/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#define CHIPSET GF117
#include "macros.fuc"
.section #nvd7_grhub_data
#define INCLUDE_DATA
#include "com.fuc"
#include "hub.fuc"
#undef INCLUDE_DATA
.section #nvd7_grhub_code
#define INCLUDE_CODE
bra #init
#include "com.fuc"
#include "hub.fuc"
.align 256
#undef INCLUDE_CODE

921
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvd7.fuc.h Normal file
View File

@ -0,0 +1,921 @@
uint32_t nvd7_grhub_data[] = {
/* 0x0000: hub_mmio_list_head */
0x00000300,
/* 0x0004: hub_mmio_list_tail */
0x00000304,
/* 0x0008: gpc_count */
0x00000000,
/* 0x000c: rop_count */
0x00000000,
/* 0x0010: cmd_queue */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0058: ctx_current */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0100: chan_data */
/* 0x0100: chan_mmio_count */
0x00000000,
/* 0x0104: chan_mmio_address */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0200: xfer_data */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0300: hub_mmio_list_base */
0x0417e91c,
};
uint32_t nvd7_grhub_code[] = {
0x031b0ef5,
/* 0x0004: queue_put */
0x9800d898,
0x86f001d9,
0x0489b808,
0xf00c1bf4,
0x21f502f7,
0x00f802fe,
/* 0x001c: queue_put_next */
0xb60798c4,
0x8dbb0384,
0x0880b600,
0x80008e80,
0x90b6018f,
0x0f94f001,
0xf801d980,
/* 0x0039: queue_get */
0x0131f400,
0x9800d898,
0x89b801d9,
0x210bf404,
0xb60789c4,
0x9dbb0394,
0x0890b600,
0x98009e98,
0x80b6019f,
0x0f84f001,
0xf400d880,
/* 0x0066: queue_get_done */
0x00f80132,
/* 0x0068: nv_rd32 */
0x0728b7f1,
0xb906b4b6,
0xc9f002ec,
0x00bcd01f,
/* 0x0078: nv_rd32_wait */
0xc800bccf,
0x1bf41fcc,
0x06a7f0fa,
0x010921f5,
0xf840bfcf,
/* 0x008d: nv_wr32 */
0x28b7f100,
0x06b4b607,
0xb980bfd0,
0xc9f002ec,
0x1ec9f01f,
/* 0x00a3: nv_wr32_wait */
0xcf00bcd0,
0xccc800bc,
0xfa1bf41f,
/* 0x00ae: watchdog_reset */
0x87f100f8,
0x84b60430,
0x1ff9f006,
0xf8008fd0,
/* 0x00bd: watchdog_clear */
0x3087f100,
0x0684b604,
0xf80080d0,
/* 0x00c9: wait_donez */
0xf094bd00,
0x07f10099,
0x03f00f00,
0x0009d002,
0x07f104bd,
0x03f00600,
0x000ad002,
/* 0x00e6: wait_donez_ne */
0x87f104bd,
0x83f00000,
0x0088cf01,
0xf4888aff,
0x94bdf31b,
0xf10099f0,
0xf0170007,
0x09d00203,
0xf804bd00,
/* 0x0109: wait_doneo */
0xf094bd00,
0x07f10099,
0x03f00f00,
0x0009d002,
0x87f104bd,
0x84b60818,
0x008ad006,
/* 0x0124: wait_doneo_e */
0x040087f1,
0xcf0684b6,
0x8aff0088,
0xf30bf488,
0x99f094bd,
0x0007f100,
0x0203f017,
0xbd0009d0,
/* 0x0147: mmctx_size */
0xbd00f804,
/* 0x0149: nv_mmctx_size_loop */
0x00e89894,
0xb61a85b6,
0x84b60180,
0x0098bb02,
0xb804e0b6,
0x1bf404ef,
0x029fb9eb,
/* 0x0166: mmctx_xfer */
0x94bd00f8,
0xf10199f0,
0xf00f0007,
0x09d00203,
0xf104bd00,
0xb6071087,
0x94bd0684,
0xf405bbfd,
0x8bd0090b,
0x0099f000,
/* 0x018c: mmctx_base_disabled */
0xf405eefd,
0x8ed00c0b,
0xc08fd080,
/* 0x019b: mmctx_multi_disabled */
0xb70199f0,
0xc8010080,
0xb4b600ab,
0x0cb9f010,
0xb601aec8,
0xbefd11e4,
0x008bd005,
/* 0x01b4: mmctx_exec_loop */
/* 0x01b4: mmctx_wait_free */
0xf0008ecf,
0x0bf41fe4,
0x00ce98fa,
0xd005e9fd,
0xc0b6c08e,
0x04cdb804,
0xc8e81bf4,
0x1bf402ab,
/* 0x01d5: mmctx_fini_wait */
0x008bcf18,
0xb01fb4f0,
0x1bf410b4,
0x02a7f0f7,
0xf4c921f4,
/* 0x01ea: mmctx_stop */
0xabc81b0e,
0x10b4b600,
0xf00cb9f0,
0x8bd012b9,
/* 0x01f9: mmctx_stop_wait */
0x008bcf00,
0xf412bbc8,
/* 0x0202: mmctx_done */
0x94bdfa1b,
0xf10199f0,
0xf0170007,
0x09d00203,
0xf804bd00,
/* 0x0215: strand_wait */
0xf0a0f900,
0x21f402a7,
0xf8a0fcc9,
/* 0x0221: strand_pre */
0xfc87f100,
0x0283f04a,
0xd00c97f0,
0x21f50089,
0x00f80215,
/* 0x0234: strand_post */
0x4afc87f1,
0xf00283f0,
0x89d00d97,
0x1521f500,
/* 0x0247: strand_set */
0xf100f802,
0xf04ffca7,
0xaba202a3,
0xc7f00500,
0x00acd00f,
0xd00bc7f0,
0x21f500bc,
0xaed00215,
0x0ac7f000,
0xf500bcd0,
0xf8021521,
/* 0x0271: strand_ctx_init */
0xf094bd00,
0x07f10399,
0x03f00f00,
0x0009d002,
0x21f504bd,
0xe7f00221,
0x4721f503,
0xfca7f102,
0x02a3f046,
0x0400aba0,
0xf040a0d0,
0xbcd001c7,
0x1521f500,
0x010c9202,
0xf000acd0,
0xbcd002c7,
0x1521f500,
0x3421f502,
0x8087f102,
0x0684b608,
0xb70089cf,
0x95220080,
/* 0x02ca: ctx_init_strand_loop */
0x8ed008fe,
0x408ed000,
0xb6808acf,
0xa0b606a5,
0x00eabb01,
0xb60480b6,
0x1bf40192,
0x08e4b6e8,
0xbdf2efbc,
0x0399f094,
0x170007f1,
0xd00203f0,
0x04bd0009,
/* 0x02fe: error */
0x07f100f8,
0x03f00500,
0x000fd002,
0xf7f004bd,
0x0007f101,
0x0303f007,
0xbd000fd0,
/* 0x031b: init */
0xbd00f804,
0x0004fe04,
0xf10007fe,
0xf0120017,
0x12d00227,
0xb117f100,
0x0010fe05,
0x040017f1,
0xf1c010d0,
0xb6040437,
0x27f10634,
0x32d02003,
0x0427f100,
0x0132d020,
0x200b27f1,
0xf10232d0,
0xd0200c27,
0x27f10732,
0x24b60c24,
0x0003b906,
0xf10023d0,
0xf0870427,
0x12d00023,
0x0012b700,
0x0427f001,
0xf40012d0,
0xe7f11031,
0xe3f09604,
0x6821f440,
0x8090f1c7,
0xf4f00301,
0x020f801f,
0xbb0117f0,
0x12b6041f,
0x0c27f101,
0x0624b604,
0xd00021d0,
0x17f14021,
0x0e980100,
0x010f9800,
0x014721f5,
0x070037f1,
0x950634b6,
0x34d00814,
0x4034d000,
0x130030b7,
0xb6001fbb,
0x3fd002f5,
0x0815b600,
0xb60110b6,
0x1fb90814,
0x7121f502,
0x001fbb02,
0xf1020398,
0xf0200047,
/* 0x03f6: init_gpc */
0x4ea05043,
0x1fb90804,
0x8d21f402,
0x010c4ea0,
0x21f4f4bd,
0x044ea08d,
0x8d21f401,
0x01004ea0,
0xf402f7f0,
0x4ea08d21,
/* 0x041e: init_gpc_wait */
0x21f40800,
0x1fffc868,
0xa0fa0bf4,
0xf408044e,
0x1fbb6821,
0x0040b700,
0x0132b680,
0xf1be1bf4,
0xf0010007,
0x01d00203,
0xbd04bd00,
0x1f19f014,
0x080007f1,
0xd00203f0,
0x04bd0001,
/* 0x0458: main */
0xf40031f4,
0xd7f00028,
0x3921f410,
0xb1f401f4,
0xf54001e4,
0xbd00de1b,
0x0499f094,
0x0f0007f1,
0xd00203f0,
0x04bd0009,
0x0b0017f1,
0xcf0614b6,
0x11cf4012,
0x1f13c800,
0x00870bf5,
0xf41f23c8,
0x20f9620b,
0xbd0212b9,
0x0799f094,
0x0f0007f1,
0xd00203f0,
0x04bd0009,
0xf40132f4,
0x21f50231,
0x94bd082f,
0xf10799f0,
0xf0170007,
0x09d00203,
0xfc04bd00,
0xf094bd20,
0x07f10699,
0x03f00f00,
0x0009d002,
0x31f404bd,
0x2f21f501,
0xf094bd08,
0x07f10699,
0x03f01700,
0x0009d002,
0x0ef404bd,
/* 0x04f9: chsw_prev_no_next */
0xb920f931,
0x32f40212,
0x0232f401,
0x082f21f5,
0x17f120fc,
0x14b60b00,
0x0012d006,
/* 0x0517: chsw_no_prev */
0xc8130ef4,
0x0bf41f23,
0x0131f40d,
0xf50232f4,
/* 0x0527: chsw_done */
0xf1082f21,
0xb60b0c17,
0x27f00614,
0x0012d001,
0x99f094bd,
0x0007f104,
0x0203f017,
0xbd0009d0,
0x130ef504,
/* 0x0549: main_not_ctx_switch */
0x01e4b0ff,
0xb90d1bf4,
0x21f502f2,
0x0ef407bb,
/* 0x0559: main_not_ctx_chan */
0x02e4b046,
0xbd321bf4,
0x0799f094,
0x0f0007f1,
0xd00203f0,
0x04bd0009,
0xf40132f4,
0x21f50232,
0x94bd082f,
0xf10799f0,
0xf0170007,
0x09d00203,
0xf404bd00,
/* 0x058e: main_not_ctx_save */
0xef94110e,
0x01f5f010,
0x02fe21f5,
0xfec00ef5,
/* 0x059c: main_done */
0x29f024bd,
0x0007f11f,
0x0203f008,
0xbd0002d0,
0xab0ef504,
/* 0x05b1: ih */
0xfe80f9fe,
0x80f90188,
0xa0f990f9,
0xd0f9b0f9,
0xf0f9e0f9,
0x0acf04bd,
0x04abc480,
0xf11d0bf4,
0xf01900b7,
0xbecf10d7,
0x00bfcf40,
0xb70421f4,
0xf00400b0,
0xbed001e7,
/* 0x05e9: ih_no_fifo */
0x00abe400,
0x0d0bf401,
0xf110d7f0,
0xf44001e7,
/* 0x05fa: ih_no_ctxsw */
0xb7f10421,
0xb0bd0104,
0xf4b4abff,
0xa7f10d0b,
0xa4b60c1c,
0x00abd006,
/* 0x0610: ih_no_other */
0xfc400ad0,
0xfce0fcf0,
0xfcb0fcd0,
0xfc90fca0,
0x0088fe80,
0x32f480fc,
/* 0x062b: ctx_4160s */
0xf101f800,
0xf04160e7,
0xf7f040e3,
0x8d21f401,
/* 0x0638: ctx_4160s_wait */
0xc86821f4,
0x0bf404ff,
/* 0x0643: ctx_4160c */
0xf100f8fa,
0xf04160e7,
0xf4bd40e3,
0xf88d21f4,
/* 0x0651: ctx_4170s */
0x70e7f100,
0x40e3f041,
0xf410f5f0,
0x00f88d21,
/* 0x0660: ctx_4170w */
0x4170e7f1,
0xf440e3f0,
0xf4f06821,
0xf31bf410,
/* 0x0672: ctx_redswitch */
0xe7f100f8,
0xe4b60614,
0x70f7f106,
0x00efd002,
/* 0x0683: ctx_redswitch_delay */
0xb608f7f0,
0x1bf401f2,
0x70f7f1fd,
0x00efd007,
/* 0x0692: ctx_86c */
0xe7f100f8,
0xe4b6086c,
0x00efd006,
0x8a14e7f1,
0xf440e3f0,
0xe7f18d21,
0xe3f0a86c,
0x8d21f441,
/* 0x06b2: ctx_load */
0x94bd00f8,
0xf10599f0,
0xf00f0007,
0x09d00203,
0xf004bd00,
0x21f40ca7,
0x2417f1c9,
0x0614b60a,
0xf10010d0,
0xb60b0037,
0x32d00634,
0x0c17f140,
0x0614b60a,
0xd00747f0,
0x14d00012,
/* 0x06ed: ctx_chan_wait_0 */
0x4014cf40,
0xf41f44f0,
0x32d0fa1b,
0x000bfe00,
0xb61f2af0,
0x20b60424,
0xf094bd02,
0x07f10899,
0x03f00f00,
0x0009d002,
0x17f104bd,
0x14b60a04,
0x0012d006,
0x0a2017f1,
0xf00614b6,
0x23f10227,
0x12d08000,
0x1017f000,
0x020027f1,
0xfa0223f0,
0x03f80512,
0x99f094bd,
0x0007f108,
0x0203f017,
0xbd0009d0,
0x81019804,
0x981814b6,
0x25b68002,
0x0512fd08,
0xbd160180,
0x0999f094,
0x0f0007f1,
0xd00203f0,
0x04bd0009,
0x0a0427f1,
0xd00624b6,
0x27f00021,
0x2017f101,
0x0614b60a,
0xf10012d0,
0xf0010017,
0x01fa0613,
0xbd03f805,
0x0999f094,
0x170007f1,
0xd00203f0,
0x04bd0009,
0x99f094bd,
0x0007f105,
0x0203f017,
0xbd0009d0,
/* 0x07bb: ctx_chan */
0xf500f804,
0xf5062b21,
0xf006b221,
0x21f40ca7,
0x1017f1c9,
0x0614b60a,
0xd00527f0,
/* 0x07d6: ctx_chan_wait */
0x12cf0012,
0x0522fd00,
0xf5fa1bf4,
0xf8064321,
/* 0x07e5: ctx_mmio_exec */
0x41039800,
0x0a0427f1,
0xd00624b6,
0x34bd0023,
/* 0x07f4: ctx_mmio_loop */
0xf4ff34c4,
0x57f10f1b,
0x53f00200,
0x0535fa06,
/* 0x0806: ctx_mmio_pull */
0x4e9803f8,
0x814f9880,
0xb68d21f4,
0x12b60830,
0xdf1bf401,
/* 0x0818: ctx_mmio_done */
0xd0160398,
0x00800023,
0x0017f140,
0x0613f001,
0xf80601fa,
/* 0x082f: ctx_xfer */
0xf100f803,
0xb60c00f7,
0xe7f006f4,
0x80fed004,
/* 0x083c: ctx_xfer_idle */
0xf100fecf,
0xf42000e4,
0x11f4f91b,
0x1102f406,
/* 0x084c: ctx_xfer_pre */
0xf510f7f0,
0xf5069221,
0xf4062b21,
/* 0x085a: ctx_xfer_pre_load */
0xf7f01c11,
0x5121f502,
0x6021f506,
0x7221f506,
0xf5f4bd06,
0xf5065121,
/* 0x0873: ctx_xfer_exec */
0x9806b221,
0x27f11601,
0x24b60414,
0x0020d006,
0xa500e7f1,
0xb941e3f0,
0x21f4021f,
0x04e0b68d,
0xf001fcf0,
0x24b6022c,
0x05f2fd01,
0xf18d21f4,
0xf04afc17,
0x27f00213,
0x0012d00c,
0x021521f5,
0x47fc27f1,
0xd00223f0,
0x2cf00020,
0x0320b601,
0xf00012d0,
0xa5f001ac,
0x00b7f006,
0x98000c98,
0xe7f0010d,
0x6621f500,
0x08a7f001,
0x010921f5,
0x021521f5,
0xf02201f4,
0x21f40ca7,
0x1017f1c9,
0x0614b60a,
0xd00527f0,
/* 0x08fa: ctx_xfer_post_save_wait */
0x12cf0012,
0x0522fd00,
0xf4fa1bf4,
/* 0x0906: ctx_xfer_post */
0xf7f03202,
0x5121f502,
0xf5f4bd06,
0xf5069221,
0xf5023421,
0xbd066021,
0x5121f5f4,
0x1011f406,
0xfd400198,
0x0bf40511,
0xe521f507,
/* 0x0931: ctx_xfer_no_post_mmio */
0x4321f507,
/* 0x0935: ctx_xfer_done */
0x0000f806,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};

127
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc
View File

@ -22,138 +22,13 @@
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#define NVGK
#define CHIPSET GK100
#include "macros.fuc"
.section #nve0_grhub_data
#define INCLUDE_DATA
#include "com.fuc"
#include "hub.fuc"
chipsets:
.b8 0xe4 0 0 0
.b16 #nve4_hub_mmio_head
.b16 #nve4_hub_mmio_tail
.b8 0xe7 0 0 0
.b16 #nve4_hub_mmio_head
.b16 #nve4_hub_mmio_tail
.b8 0xe6 0 0 0
.b16 #nve4_hub_mmio_head
.b16 #nve4_hub_mmio_tail
.b8 0xf0 0 0 0
.b16 #nvf0_hub_mmio_head
.b16 #nvf0_hub_mmio_tail
.b8 0 0 0 0
nve4_hub_mmio_head:
mmctx_data(0x17e91c, 2)
mmctx_data(0x400204, 2)
mmctx_data(0x404010, 7)
mmctx_data(0x4040a8, 9)
mmctx_data(0x4040d0, 7)
mmctx_data(0x4040f8, 1)
mmctx_data(0x404130, 3)
mmctx_data(0x404150, 3)
mmctx_data(0x404164, 1)
mmctx_data(0x4041a0, 4)
mmctx_data(0x404200, 4)
mmctx_data(0x404404, 14)
mmctx_data(0x404460, 4)
mmctx_data(0x404480, 1)
mmctx_data(0x404498, 1)
mmctx_data(0x404604, 4)
mmctx_data(0x404618, 4)
mmctx_data(0x40462c, 2)
mmctx_data(0x404640, 1)
mmctx_data(0x404654, 1)
mmctx_data(0x404660, 1)
mmctx_data(0x404678, 19)
mmctx_data(0x4046c8, 3)
mmctx_data(0x404700, 3)
mmctx_data(0x404718, 10)
mmctx_data(0x404744, 2)
mmctx_data(0x404754, 1)
mmctx_data(0x405800, 1)
mmctx_data(0x405830, 3)
mmctx_data(0x405854, 1)
mmctx_data(0x405870, 4)
mmctx_data(0x405a00, 2)
mmctx_data(0x405a18, 1)
mmctx_data(0x405b00, 1)
mmctx_data(0x405b10, 1)
mmctx_data(0x406020, 1)
mmctx_data(0x406028, 4)
mmctx_data(0x4064a8, 2)
mmctx_data(0x4064b4, 2)
mmctx_data(0x4064c0, 12)
mmctx_data(0x4064fc, 1)
mmctx_data(0x407040, 1)
mmctx_data(0x407804, 1)
mmctx_data(0x40780c, 6)
mmctx_data(0x4078bc, 1)
mmctx_data(0x408000, 7)
mmctx_data(0x408064, 1)
mmctx_data(0x408800, 3)
mmctx_data(0x408840, 1)
mmctx_data(0x408900, 3)
mmctx_data(0x408980, 1)
nve4_hub_mmio_tail:
nvf0_hub_mmio_head:
mmctx_data(0x17e91c, 2)
mmctx_data(0x400204, 2)
mmctx_data(0x404004, 17)
mmctx_data(0x4040a8, 9)
mmctx_data(0x4040d0, 7)
mmctx_data(0x4040f8, 1)
mmctx_data(0x404100, 10)
mmctx_data(0x404130, 3)
mmctx_data(0x404150, 3)
mmctx_data(0x404164, 1)
mmctx_data(0x40417c, 2)
mmctx_data(0x4041a0, 4)
mmctx_data(0x404200, 4)
mmctx_data(0x404404, 12)
mmctx_data(0x404438, 1)
mmctx_data(0x404460, 4)
mmctx_data(0x404480, 1)
mmctx_data(0x404498, 1)
mmctx_data(0x404604, 4)
mmctx_data(0x404618, 4)
mmctx_data(0x40462c, 2)
mmctx_data(0x404640, 1)
mmctx_data(0x404654, 1)
mmctx_data(0x404660, 1)
mmctx_data(0x404678, 19)
mmctx_data(0x4046c8, 3)
mmctx_data(0x404700, 3)
mmctx_data(0x404718, 10)
mmctx_data(0x404744, 2)
mmctx_data(0x404754, 1)
mmctx_data(0x405800, 1)
mmctx_data(0x405830, 3)
mmctx_data(0x405854, 1)
mmctx_data(0x405870, 4)
mmctx_data(0x405a00, 2)
mmctx_data(0x405a18, 1)
mmctx_data(0x405b00, 1)
mmctx_data(0x405b10, 1)
mmctx_data(0x405b20, 1)
mmctx_data(0x406020, 1)
mmctx_data(0x406028, 4)
mmctx_data(0x4064a8, 5)
mmctx_data(0x4064c0, 12)
mmctx_data(0x4064fc, 1)
mmctx_data(0x407804, 1)
mmctx_data(0x40780c, 6)
mmctx_data(0x4078bc, 1)
mmctx_data(0x408000, 7)
mmctx_data(0x408064, 1)
mmctx_data(0x408800, 3)
mmctx_data(0x408840, 1)
mmctx_data(0x408900, 3)
mmctx_data(0x408980, 1)
nvf0_hub_mmio_tail:
#undef INCLUDE_DATA
.section #nve0_grhub_code

1229
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc.h
View File

File diff suppressed because it is too large Load Diff

40
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvf0.fuc Normal file
View File

@ -0,0 +1,40 @@
/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#define CHIPSET GK110
#include "macros.fuc"
.section #nvf0_grhub_data
#define INCLUDE_DATA
#include "com.fuc"
#include "hub.fuc"
#undef INCLUDE_DATA
.section #nvf0_grhub_code
#define INCLUDE_CODE
bra #init
#include "com.fuc"
#include "hub.fuc"
.align 256
#undef INCLUDE_CODE

918
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvf0.fuc.h Normal file
View File

@ -0,0 +1,918 @@
uint32_t nvf0_grhub_data[] = {
/* 0x0000: hub_mmio_list_head */
0x00000300,
/* 0x0004: hub_mmio_list_tail */
0x00000304,
/* 0x0008: gpc_count */
0x00000000,
/* 0x000c: rop_count */
0x00000000,
/* 0x0010: cmd_queue */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0058: ctx_current */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0100: chan_data */
/* 0x0100: chan_mmio_count */
0x00000000,
/* 0x0104: chan_mmio_address */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0200: xfer_data */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0300: hub_mmio_list_base */
0x0417e91c,
};
uint32_t nvf0_grhub_code[] = {
0x031b0ef5,
/* 0x0004: queue_put */
0x9800d898,
0x86f001d9,
0x0489b808,
0xf00c1bf4,
0x21f502f7,
0x00f802fe,
/* 0x001c: queue_put_next */
0xb60798c4,
0x8dbb0384,
0x0880b600,
0x80008e80,
0x90b6018f,
0x0f94f001,
0xf801d980,
/* 0x0039: queue_get */
0x0131f400,
0x9800d898,
0x89b801d9,
0x210bf404,
0xb60789c4,
0x9dbb0394,
0x0890b600,
0x98009e98,
0x80b6019f,
0x0f84f001,
0xf400d880,
/* 0x0066: queue_get_done */
0x00f80132,
/* 0x0068: nv_rd32 */
0x0728b7f1,
0xb906b4b6,
0xc9f002ec,
0x00bcd01f,
/* 0x0078: nv_rd32_wait */
0xc800bccf,
0x1bf41fcc,
0x06a7f0fa,
0x010921f5,
0xf840bfcf,
/* 0x008d: nv_wr32 */
0x28b7f100,
0x06b4b607,
0xb980bfd0,
0xc9f002ec,
0x1ec9f01f,
/* 0x00a3: nv_wr32_wait */
0xcf00bcd0,
0xccc800bc,
0xfa1bf41f,
/* 0x00ae: watchdog_reset */
0x87f100f8,
0x84b60430,
0x1ff9f006,
0xf8008fd0,
/* 0x00bd: watchdog_clear */
0x3087f100,
0x0684b604,
0xf80080d0,
/* 0x00c9: wait_donez */
0xf094bd00,
0x07f10099,
0x03f03700,
0x0009d002,
0x07f104bd,
0x03f00600,
0x000ad002,
/* 0x00e6: wait_donez_ne */
0x87f104bd,
0x83f00000,
0x0088cf01,
0xf4888aff,
0x94bdf31b,
0xf10099f0,
0xf0170007,
0x09d00203,
0xf804bd00,
/* 0x0109: wait_doneo */
0xf094bd00,
0x07f10099,
0x03f03700,
0x0009d002,
0x87f104bd,
0x84b60818,
0x008ad006,
/* 0x0124: wait_doneo_e */
0x040087f1,
0xcf0684b6,
0x8aff0088,
0xf30bf488,
0x99f094bd,
0x0007f100,
0x0203f017,
0xbd0009d0,
/* 0x0147: mmctx_size */
0xbd00f804,
/* 0x0149: nv_mmctx_size_loop */
0x00e89894,
0xb61a85b6,
0x84b60180,
0x0098bb02,
0xb804e0b6,
0x1bf404ef,
0x029fb9eb,
/* 0x0166: mmctx_xfer */
0x94bd00f8,
0xf10199f0,
0xf0370007,
0x09d00203,
0xf104bd00,
0xb6071087,
0x94bd0684,
0xf405bbfd,
0x8bd0090b,
0x0099f000,
/* 0x018c: mmctx_base_disabled */
0xf405eefd,
0x8ed00c0b,
0xc08fd080,
/* 0x019b: mmctx_multi_disabled */
0xb70199f0,
0xc8010080,
0xb4b600ab,
0x0cb9f010,
0xb601aec8,
0xbefd11e4,
0x008bd005,
/* 0x01b4: mmctx_exec_loop */
/* 0x01b4: mmctx_wait_free */
0xf0008ecf,
0x0bf41fe4,
0x00ce98fa,
0xd005e9fd,
0xc0b6c08e,
0x04cdb804,
0xc8e81bf4,
0x1bf402ab,
/* 0x01d5: mmctx_fini_wait */
0x008bcf18,
0xb01fb4f0,
0x1bf410b4,
0x02a7f0f7,
0xf4c921f4,
/* 0x01ea: mmctx_stop */
0xabc81b0e,
0x10b4b600,
0xf00cb9f0,
0x8bd012b9,
/* 0x01f9: mmctx_stop_wait */
0x008bcf00,
0xf412bbc8,
/* 0x0202: mmctx_done */
0x94bdfa1b,
0xf10199f0,
0xf0170007,
0x09d00203,
0xf804bd00,
/* 0x0215: strand_wait */
0xf0a0f900,
0x21f402a7,
0xf8a0fcc9,
/* 0x0221: strand_pre */
0xfc87f100,
0x0283f04a,
0xd00c97f0,
0x21f50089,
0x00f80215,
/* 0x0234: strand_post */
0x4afc87f1,
0xf00283f0,
0x89d00d97,
0x1521f500,
/* 0x0247: strand_set */
0xf100f802,
0xf04ffca7,
0xaba202a3,
0xc7f00500,
0x00acd00f,
0xd00bc7f0,
0x21f500bc,
0xaed00215,
0x0ac7f000,
0xf500bcd0,
0xf8021521,
/* 0x0271: strand_ctx_init */
0xf094bd00,
0x07f10399,
0x03f03700,
0x0009d002,
0x21f504bd,
0xe7f00221,
0x4721f503,
0xfca7f102,
0x02a3f046,
0x0400aba0,
0xf040a0d0,
0xbcd001c7,
0x1521f500,
0x010c9202,
0xf000acd0,
0xbcd002c7,
0x1521f500,
0x3421f502,
0x8087f102,
0x0684b608,
0xb70089cf,
0x95220080,
/* 0x02ca: ctx_init_strand_loop */
0x8ed008fe,
0x408ed000,
0xb6808acf,
0xa0b606a5,
0x00eabb01,
0xb60480b6,
0x1bf40192,
0x08e4b6e8,
0xbdf2efbc,
0x0399f094,
0x170007f1,
0xd00203f0,
0x04bd0009,
/* 0x02fe: error */
0x07f100f8,
0x03f00500,
0x000fd002,
0xf7f004bd,
0x0007f101,
0x0303f007,
0xbd000fd0,
/* 0x031b: init */
0xbd00f804,
0x0004fe04,
0xf10007fe,
0xf0120017,
0x12d00227,
0xb117f100,
0x0010fe05,
0x040017f1,
0xf1c010d0,
0xb6040437,
0x27f10634,
0x32d02003,
0x0427f100,
0x0132d020,
0x200b27f1,
0xf10232d0,
0xd0200c27,
0x27f10732,
0x24b60c24,
0x0003b906,
0xf10023d0,
0xf0870427,
0x12d00023,
0x0012b700,
0x0427f001,
0xf40012d0,
0xe7f11031,
0xe3f09604,
0x6821f440,
0x8090f1c7,
0xf4f00301,
0x020f801f,
0xbb0117f0,
0x12b6041f,
0x0c27f101,
0x0624b604,
0xd00021d0,
0x17f14021,
0x0e980100,
0x010f9800,
0x014721f5,
0x070037f1,
0x950634b6,
0x34d00814,
0x4034d000,
0x130030b7,
0xb6001fbb,
0x3fd002f5,
0x0815b600,
0xb60110b6,
0x1fb90814,
0x7121f502,
0x001fbb02,
0xf1020398,
0xf0200047,
/* 0x03f6: init_gpc */
0x4ea05043,
0x1fb90804,
0x8d21f402,
0x010c4ea0,
0x21f4f4bd,
0x044ea08d,
0x8d21f401,
0x01004ea0,
0xf402f7f0,
0x4ea08d21,
/* 0x041e: init_gpc_wait */
0x21f40800,
0x1fffc868,
0xa0fa0bf4,
0xf408044e,
0x1fbb6821,
0x0040b700,
0x0132b680,
0xf1be1bf4,
0xf0010007,
0x01d00203,
0xbd04bd00,
0x1f19f014,
0x300007f1,
0xd00203f0,
0x04bd0001,
/* 0x0458: main */
0xf40031f4,
0xd7f00028,
0x3921f410,
0xb1f401f4,
0xf54001e4,
0xbd00de1b,
0x0499f094,
0x370007f1,
0xd00203f0,
0x04bd0009,
0x0b0017f1,
0xcf0614b6,
0x11cf4012,
0x1f13c800,
0x00870bf5,
0xf41f23c8,
0x20f9620b,
0xbd0212b9,
0x0799f094,
0x370007f1,
0xd00203f0,
0x04bd0009,
0xf40132f4,
0x21f50231,
0x94bd0801,
0xf10799f0,
0xf0170007,
0x09d00203,
0xfc04bd00,
0xf094bd20,
0x07f10699,
0x03f03700,
0x0009d002,
0x31f404bd,
0x0121f501,
0xf094bd08,
0x07f10699,
0x03f01700,
0x0009d002,
0x0ef404bd,
/* 0x04f9: chsw_prev_no_next */
0xb920f931,
0x32f40212,
0x0232f401,
0x080121f5,
0x17f120fc,
0x14b60b00,
0x0012d006,
/* 0x0517: chsw_no_prev */
0xc8130ef4,
0x0bf41f23,
0x0131f40d,
0xf50232f4,
/* 0x0527: chsw_done */
0xf1080121,
0xb60b0c17,
0x27f00614,
0x0012d001,
0x99f094bd,
0x0007f104,
0x0203f017,
0xbd0009d0,
0x130ef504,
/* 0x0549: main_not_ctx_switch */
0x01e4b0ff,
0xb90d1bf4,
0x21f502f2,
0x0ef40795,
/* 0x0559: main_not_ctx_chan */
0x02e4b046,
0xbd321bf4,
0x0799f094,
0x370007f1,
0xd00203f0,
0x04bd0009,
0xf40132f4,
0x21f50232,
0x94bd0801,
0xf10799f0,
0xf0170007,
0x09d00203,
0xf404bd00,
/* 0x058e: main_not_ctx_save */
0xef94110e,
0x01f5f010,
0x02fe21f5,
0xfec00ef5,
/* 0x059c: main_done */
0x29f024bd,
0x0007f11f,
0x0203f030,
0xbd0002d0,
0xab0ef504,
/* 0x05b1: ih */
0xfe80f9fe,
0x80f90188,
0xa0f990f9,
0xd0f9b0f9,
0xf0f9e0f9,
0x0acf04bd,
0x04abc480,
0xf11d0bf4,
0xf01900b7,
0xbecf10d7,
0x00bfcf40,
0xb70421f4,
0xf00400b0,
0xbed001e7,
/* 0x05e9: ih_no_fifo */
0x00abe400,
0x0d0bf401,
0xf110d7f0,
0xf44001e7,
/* 0x05fa: ih_no_ctxsw */
0xb7f10421,
0xb0bd0104,
0xf4b4abff,
0xa7f10d0b,
0xa4b60c1c,
0x00abd006,
/* 0x0610: ih_no_other */
0xfc400ad0,
0xfce0fcf0,
0xfcb0fcd0,
0xfc90fca0,
0x0088fe80,
0x32f480fc,
/* 0x062b: ctx_4170s */
0xf101f800,
0xf04170e7,
0xf5f040e3,
0x8d21f410,
/* 0x063a: ctx_4170w */
0xe7f100f8,
0xe3f04170,
0x6821f440,
0xf410f4f0,
0x00f8f31b,
/* 0x064c: ctx_redswitch */
0x0614e7f1,
0xf106e4b6,
0xd00270f7,
0xf7f000ef,
/* 0x065d: ctx_redswitch_delay */
0x01f2b608,
0xf1fd1bf4,
0xd00770f7,
0x00f800ef,
/* 0x066c: ctx_86c */
0x086ce7f1,
0xd006e4b6,
0xe7f100ef,
0xe3f08a14,
0x8d21f440,
0xa86ce7f1,
0xf441e3f0,
0x00f88d21,
/* 0x068c: ctx_load */
0x99f094bd,
0x0007f105,
0x0203f037,
0xbd0009d0,
0x0ca7f004,
0xf1c921f4,
0xb60a2417,
0x10d00614,
0x0037f100,
0x0634b60b,
0xf14032d0,
0xb60a0c17,
0x47f00614,
0x0012d007,
/* 0x06c7: ctx_chan_wait_0 */
0xcf4014d0,
0x44f04014,
0xfa1bf41f,
0xfe0032d0,
0x2af0000b,
0x0424b61f,
0xbd0220b6,
0x0899f094,
0x370007f1,
0xd00203f0,
0x04bd0009,
0x0a0417f1,
0xd00614b6,
0x17f10012,
0x14b60a20,
0x0227f006,
0x800023f1,
0xf00012d0,
0x27f11017,
0x23f00200,
0x0512fa02,
0x94bd03f8,
0xf10899f0,
0xf0170007,
0x09d00203,
0x9804bd00,
0x14b68101,
0x80029818,
0xfd0825b6,
0x01800512,
0xf094bd16,
0x07f10999,
0x03f03700,
0x0009d002,
0x27f104bd,
0x24b60a04,
0x0021d006,
0xf10127f0,
0xb60a2017,
0x12d00614,
0x0017f100,
0x0613f001,
0xf80501fa,
0xf094bd03,
0x07f10999,
0x03f01700,
0x0009d002,
0x94bd04bd,
0xf10599f0,
0xf0170007,
0x09d00203,
0xf804bd00,
/* 0x0795: ctx_chan */
0x8c21f500,
0x0ca7f006,
0xf1c921f4,
0xb60a1017,
0x27f00614,
0x0012d005,
/* 0x07ac: ctx_chan_wait */
0xfd0012cf,
0x1bf40522,
/* 0x07b7: ctx_mmio_exec */
0x9800f8fa,
0x27f14103,
0x24b60a04,
0x0023d006,
/* 0x07c6: ctx_mmio_loop */
0x34c434bd,
0x0f1bf4ff,
0x020057f1,
0xfa0653f0,
0x03f80535,
/* 0x07d8: ctx_mmio_pull */
0x98804e98,
0x21f4814f,
0x0830b68d,
0xf40112b6,
/* 0x07ea: ctx_mmio_done */
0x0398df1b,
0x0023d016,
0xf1400080,
0xf0010017,
0x01fa0613,
0xf803f806,
/* 0x0801: ctx_xfer */
0x00f7f100,
0x06f4b60c,
0xd004e7f0,
/* 0x080e: ctx_xfer_idle */
0xfecf80fe,
0x00e4f100,
0xf91bf420,
0xf40611f4,
/* 0x081e: ctx_xfer_pre */
0xf7f00d02,
0x6c21f510,
0x1c11f406,
/* 0x0828: ctx_xfer_pre_load */
0xf502f7f0,
0xf5062b21,
0xf5063a21,
0xbd064c21,
0x2b21f5f4,
0x8c21f506,
/* 0x0841: ctx_xfer_exec */
0x16019806,
0x041427f1,
0xd00624b6,
0xe7f10020,
0xe3f0a500,
0x021fb941,
0xb68d21f4,
0xfcf004e0,
0x022cf001,
0xfd0124b6,
0x21f405f2,
0xfc17f18d,
0x0213f04a,
0xd00c27f0,
0x21f50012,
0x27f10215,
0x23f047fc,
0x0020d002,
0xb6012cf0,
0x12d00320,
0x01acf000,
0xf006a5f0,
0x0c9800b7,
0x010d9800,
0xf500e7f0,
0xf0016621,
0x21f508a7,
0x21f50109,
0x01f40215,
0x0ca7f022,
0xf1c921f4,
0xb60a1017,
0x27f00614,
0x0012d005,
/* 0x08c8: ctx_xfer_post_save_wait */
0xfd0012cf,
0x1bf40522,
0x2e02f4fa,
/* 0x08d4: ctx_xfer_post */
0xf502f7f0,
0xbd062b21,
0x6c21f5f4,
0x3421f506,
0x3a21f502,
0xf5f4bd06,
0xf4062b21,
0x01981011,
0x0511fd40,
0xf5070bf4,
/* 0x08ff: ctx_xfer_no_post_mmio */
/* 0x08ff: ctx_xfer_done */
0xf807b721,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};

56
drivers/gpu/drm/nouveau/core/engine/graph/fuc/macros.fuc
View File

@ -24,6 +24,33 @@
#include "os.h"
#define GF100 0xc0
#define GF117 0xd7
#define GK100 0xe0
#define GK110 0xf0
#define NV_PGRAPH_FECS_SIGNAL 0x409400
#if CHIPSET < GK110
#define NV_PGRAPH_FECS_CC_SCRATCH_VAL(n) ((n) * 4 + 0x409800)
#define NV_PGRAPH_FECS_CC_SCRATCH_SET(n) ((n) * 4 + 0x409820)
#define NV_PGRAPH_FECS_CC_SCRATCH_CLR(n) ((n) * 4 + 0x409840)
#else
#define NV_PGRAPH_FECS_CC_SCRATCH_VAL(n) ((n) * 4 + 0x409800)
#define NV_PGRAPH_FECS_CC_SCRATCH_CLR(n) ((n) * 4 + 0x409840)
#define NV_PGRAPH_FECS_CC_SCRATCH_SET(n) ((n) * 4 + 0x4098c0)
#endif
#define NV_PGRAPH_FECS_INTR_UP_SET 0x409c1c
#if CHIPSET < GK110
#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_VAL(n) ((n) * 4 + 0x41a800)
#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_SET(n) ((n) * 4 + 0x41a820)
#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_CLR(n) ((n) * 4 + 0x41a840)
#else
#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_VAL(n) ((n) * 4 + 0x41a800)
#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_CLR(n) ((n) * 4 + 0x41a840)
#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_SET(n) ((n) * 4 + 0x41a8c0)
#endif
#define mmctx_data(r,c) .b32 (((c - 1) << 26) | r)
#define queue_init .skip 72 // (2 * 4) + ((8 * 4) * 2)
@ -38,16 +65,25 @@
#define T_LCHAN 8
#define T_LCTXH 9
#define trace_set(bit) /*
*/ mov $r8 0x83c /*
*/ shl b32 $r8 6 /*
*/ clear b32 $r9 /*
*/ bset $r9 bit /*
*/ iowr I[$r8 + 0x000] $r9
#define nv_mkmm(rv,r) /*
*/ movw rv ((r) & 0x0000fffc) /*
*/ sethi rv ((r) & 0x00ff0000)
#define nv_mkio(rv,r,i) /*
*/ nv_mkmm(rv, (((r) & 0xffc) << 6) | ((i) << 2))
#define trace_clr(bit) /*
*/ mov $r8 0x85c /*
*/ shl b32 $r8 6 /*
#define nv_iord(rv,r,i) /*
*/ nv_mkio(rv,r,i) /*
*/ iord rv I[rv]
#define nv_iowr(r,i,rv) /*
*/ nv_mkio($r0,r,i) /*
*/ iowr I[$r0] rv /*
*/ clear b32 $r0
#define trace_set(bit) /*
*/ clear b32 $r9 /*
*/ bset $r9 bit /*
*/ iowr I[$r8 + 0x000] $r9
*/ nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_SET(7), 0, $r9)
#define trace_clr(bit) /*
*/ clear b32 $r9 /*
*/ bset $r9 bit /*
*/ nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_CLR(7), 0, $r9)

1681
drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c
View File

File diff suppressed because it is too large Load Diff

239
drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h
View File

@ -102,76 +102,187 @@ struct nvc0_graph_chan {
} data[4];
};
static inline u32
nvc0_graph_class(void *obj)
{
struct nouveau_device *device = nv_device(obj);
switch (device->chipset) {
case 0xc0:
case 0xc3:
case 0xc4:
case 0xce: /* guess, mmio trace shows only 0x9097 state */
case 0xcf: /* guess, mmio trace shows only 0x9097 state */
return 0x9097;
case 0xc1:
return 0x9197;
case 0xc8:
case 0xd9:
case 0xd7:
return 0x9297;
case 0xe4:
case 0xe7:
case 0xe6:
return 0xa097;
case 0xf0:
return 0xa197;
default:
return 0;
}
}
void nv_icmd(struct nvc0_graph_priv *priv, u32 icmd, u32 data);
static inline void
nv_mthd(struct nvc0_graph_priv *priv, u32 class, u32 mthd, u32 data)
{
nv_wr32(priv, 0x40448c, data);
nv_wr32(priv, 0x404488, 0x80000000 | (mthd << 14) | class);
}
struct nvc0_grctx {
struct nvc0_graph_priv *priv;
struct nvc0_graph_data *data;
struct nvc0_graph_mmio *mmio;
struct nouveau_gpuobj *chan;
int buffer_nr;
u64 buffer[4];
u64 addr;
};
int nvc0_grctx_generate(struct nvc0_graph_priv *);
int nvc0_grctx_init(struct nvc0_graph_priv *, struct nvc0_grctx *);
void nvc0_grctx_data(struct nvc0_grctx *, u32, u32, u32);
void nvc0_grctx_mmio(struct nvc0_grctx *, u32, u32, u32, u32);
int nvc0_grctx_fini(struct nvc0_grctx *);
int nve0_grctx_generate(struct nvc0_graph_priv *);
#define mmio_data(s,a,p) nvc0_grctx_data(&info, (s), (a), (p))
#define mmio_list(r,d,s,b) nvc0_grctx_mmio(&info, (r), (d), (s), (b))
void nvc0_graph_ctxctl_debug(struct nvc0_graph_priv *);
int nvc0_graph_ctor_fw(struct nvc0_graph_priv *, const char *,
struct nvc0_graph_fuc *);
void nvc0_graph_dtor(struct nouveau_object *);
void nvc0_graph_init_fw(struct nvc0_graph_priv *, u32 base,
struct nvc0_graph_fuc *, struct nvc0_graph_fuc *);
int nvc0_graph_context_ctor(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, void *, u32,
struct nouveau_object **);
void nvc0_graph_context_dtor(struct nouveau_object *);
u64 nvc0_graph_units(struct nouveau_graph *);
void nvc0_graph_ctxctl_debug(struct nvc0_graph_priv *);
u64 nvc0_graph_units(struct nouveau_graph *);
int nvc0_graph_ctor(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, void *data, u32 size,
struct nouveau_object **);
void nvc0_graph_dtor(struct nouveau_object *);
int nvc0_graph_init(struct nouveau_object *);
int nve4_graph_init(struct nouveau_object *);
extern struct nouveau_oclass nvc0_graph_sclass[];
extern struct nouveau_oclass nvc8_graph_sclass[];
struct nvc0_graph_init {
u32 addr;
u8 count;
u8 pitch;
u32 data;
};
struct nvc0_graph_mthd {
u16 oclass;
struct nvc0_graph_init *init;
};
struct nvc0_grctx {
struct nvc0_graph_priv *priv;
struct nvc0_graph_data *data;
struct nvc0_graph_mmio *mmio;
int buffer_nr;
u64 buffer[4];
u64 addr;
};
struct nvc0_grctx_oclass {
struct nouveau_oclass base;
/* main context generation function */
void (*main)(struct nvc0_graph_priv *, struct nvc0_grctx *);
/* context-specific modify-on-first-load list generation function */
void (*mods)(struct nvc0_graph_priv *, struct nvc0_grctx *);
void (*unkn)(struct nvc0_graph_priv *);
/* mmio context data */
struct nvc0_graph_init **hub;
struct nvc0_graph_init **gpc;
/* indirect context data, generated with icmds/mthds */
struct nvc0_graph_init *icmd;
struct nvc0_graph_mthd *mthd;
};
struct nvc0_graph_ucode {
struct nvc0_graph_fuc code;
struct nvc0_graph_fuc data;
};
extern struct nvc0_graph_ucode nvc0_graph_fecs_ucode;
extern struct nvc0_graph_ucode nvc0_graph_gpccs_ucode;
struct nvc0_graph_oclass {
struct nouveau_oclass base;
struct nouveau_oclass **cclass;
struct nouveau_oclass *sclass;
struct nvc0_graph_init **mmio;
struct {
struct nvc0_graph_ucode *ucode;
} fecs;
struct {
struct nvc0_graph_ucode *ucode;
} gpccs;
};
void nvc0_graph_mmio(struct nvc0_graph_priv *, struct nvc0_graph_init *);
void nvc0_graph_icmd(struct nvc0_graph_priv *, struct nvc0_graph_init *);
void nvc0_graph_mthd(struct nvc0_graph_priv *, struct nvc0_graph_mthd *);
int nvc0_graph_init_ctxctl(struct nvc0_graph_priv *);
extern struct nvc0_graph_init nvc0_graph_init_regs[];
extern struct nvc0_graph_init nvc0_graph_init_unk40xx[];
extern struct nvc0_graph_init nvc0_graph_init_unk44xx[];
extern struct nvc0_graph_init nvc0_graph_init_unk78xx[];
extern struct nvc0_graph_init nvc0_graph_init_unk60xx[];
extern struct nvc0_graph_init nvc0_graph_init_unk58xx[];
extern struct nvc0_graph_init nvc0_graph_init_unk80xx[];
extern struct nvc0_graph_init nvc0_graph_init_gpc[];
extern struct nvc0_graph_init nvc0_graph_init_unk88xx[];
extern struct nvc0_graph_init nvc0_graph_tpc_0[];
extern struct nvc0_graph_init nvc3_graph_init_unk58xx[];
extern struct nvc0_graph_init nvd9_graph_init_unk58xx[];
extern struct nvc0_graph_init nvd9_graph_init_unk64xx[];
extern struct nvc0_graph_init nve4_graph_init_regs[];
extern struct nvc0_graph_init nve4_graph_init_unk[];
extern struct nvc0_graph_init nve4_graph_init_unk88xx[];
int nvc0_grctx_generate(struct nvc0_graph_priv *);
void nvc0_grctx_generate_main(struct nvc0_graph_priv *, struct nvc0_grctx *);
void nvc0_grctx_generate_mods(struct nvc0_graph_priv *, struct nvc0_grctx *);
void nvc0_grctx_generate_unkn(struct nvc0_graph_priv *);
void nvc0_grctx_generate_tpcid(struct nvc0_graph_priv *);
void nvc0_grctx_generate_r406028(struct nvc0_graph_priv *);
void nvc0_grctx_generate_r4060a8(struct nvc0_graph_priv *);
void nvc0_grctx_generate_r418bb8(struct nvc0_graph_priv *);
void nve4_grctx_generate_r418bb8(struct nvc0_graph_priv *);
void nvc0_grctx_generate_r406800(struct nvc0_graph_priv *);
extern struct nouveau_oclass *nvc0_grctx_oclass;
extern struct nvc0_graph_init *nvc0_grctx_init_hub[];
extern struct nvc0_graph_init nvc0_grctx_init_base[];
extern struct nvc0_graph_init nvc0_grctx_init_unk40xx[];
extern struct nvc0_graph_init nvc0_grctx_init_unk44xx[];
extern struct nvc0_graph_init nvc0_grctx_init_unk46xx[];
extern struct nvc0_graph_init nvc0_grctx_init_unk47xx[];
extern struct nvc0_graph_init nvc0_grctx_init_unk60xx[];
extern struct nvc0_graph_init nvc0_grctx_init_unk64xx[];
extern struct nvc0_graph_init nvc0_grctx_init_unk78xx[];
extern struct nvc0_graph_init nvc0_grctx_init_unk80xx[];
extern struct nvc0_graph_init nvc0_grctx_init_gpc_0[];
extern struct nvc0_graph_init nvc0_grctx_init_gpc_1[];
extern struct nvc0_graph_init nvc0_grctx_init_tpc[];
extern struct nvc0_graph_init nvc0_grctx_init_icmd[];
extern struct nvc0_graph_init nvd9_grctx_init_icmd[]; //
extern struct nvc0_graph_mthd nvc0_grctx_init_mthd[];
extern struct nvc0_graph_init nvc0_grctx_init_902d[];
extern struct nvc0_graph_init nvc0_grctx_init_9039[];
extern struct nvc0_graph_init nvc0_grctx_init_90c0[];
extern struct nvc0_graph_init nvc0_grctx_init_mthd_magic[];
void nvc1_grctx_generate_mods(struct nvc0_graph_priv *, struct nvc0_grctx *);
void nvc1_grctx_generate_unkn(struct nvc0_graph_priv *);
extern struct nouveau_oclass *nvc1_grctx_oclass;
extern struct nvc0_graph_init nvc1_grctx_init_9097[];
extern struct nouveau_oclass *nvc3_grctx_oclass;
extern struct nouveau_oclass *nvc8_grctx_oclass;
extern struct nvc0_graph_init nvc8_grctx_init_9197[];
extern struct nvc0_graph_init nvc8_grctx_init_9297[];
extern struct nouveau_oclass *nvd7_grctx_oclass;
extern struct nouveau_oclass *nvd9_grctx_oclass;
extern struct nvc0_graph_init nvd9_grctx_init_rop[];
extern struct nvc0_graph_mthd nvd9_grctx_init_mthd[];
void nve4_grctx_generate_main(struct nvc0_graph_priv *, struct nvc0_grctx *);
void nve4_grctx_generate_unkn(struct nvc0_graph_priv *);
extern struct nouveau_oclass *nve4_grctx_oclass;
extern struct nvc0_graph_init nve4_grctx_init_unk46xx[];
extern struct nvc0_graph_init nve4_grctx_init_unk47xx[];
extern struct nvc0_graph_init nve4_grctx_init_unk58xx[];
extern struct nvc0_graph_init nve4_grctx_init_unk80xx[];
extern struct nvc0_graph_init nve4_grctx_init_unk90xx[];
extern struct nouveau_oclass *nvf0_grctx_oclass;
#define mmio_data(s,a,p) do { \
info->buffer[info->buffer_nr] = round_up(info->addr, (a)); \
info->addr = info->buffer[info->buffer_nr++] + (s); \
info->data->size = (s); \
info->data->align = (a); \
info->data->access = (p); \
info->data++; \
} while(0)
#define mmio_list(r,d,s,b) do { \
info->mmio->addr = (r); \
info->mmio->data = (d); \
info->mmio->shift = (s); \
info->mmio->buffer = (b); \
info->mmio++; \
nv_wr32(priv, (r), (d) | ((s) ? (info->buffer[(b)] >> (s)) : 0)); \
} while(0)
#endif

144
drivers/gpu/drm/nouveau/core/engine/graph/nvc1.c Normal file
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/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "nvc0.h"
/*******************************************************************************
* Graphics object classes
******************************************************************************/
static struct nouveau_oclass
nvc1_graph_sclass[] = {
{ 0x902d, &nouveau_object_ofuncs },
{ 0x9039, &nouveau_object_ofuncs },
{ 0x9097, &nouveau_object_ofuncs },
{ 0x90c0, &nouveau_object_ofuncs },
{ 0x9197, &nouveau_object_ofuncs },
{}
};
/*******************************************************************************
* PGRAPH engine/subdev functions
******************************************************************************/
static struct nvc0_graph_init
nvc1_graph_init_gpc[] = {
{ 0x4184a0, 1, 0x04, 0x00000000 },
{ 0x418604, 1, 0x04, 0x00000000 },
{ 0x418680, 1, 0x04, 0x00000000 },
{ 0x418714, 1, 0x04, 0x00000000 },
{ 0x418384, 1, 0x04, 0x00000000 },
{ 0x418814, 3, 0x04, 0x00000000 },
{ 0x418b04, 1, 0x04, 0x00000000 },
{ 0x4188c8, 2, 0x04, 0x00000000 },
{ 0x4188d0, 1, 0x04, 0x00010000 },
{ 0x4188d4, 1, 0x04, 0x00000001 },
{ 0x418910, 1, 0x04, 0x00010001 },
{ 0x418914, 1, 0x04, 0x00000301 },
{ 0x418918, 1, 0x04, 0x00800000 },
{ 0x418980, 1, 0x04, 0x77777770 },
{ 0x418984, 3, 0x04, 0x77777777 },
{ 0x418c04, 1, 0x04, 0x00000000 },
{ 0x418c88, 1, 0x04, 0x00000000 },
{ 0x418d00, 1, 0x04, 0x00000000 },
{ 0x418f08, 1, 0x04, 0x00000000 },
{ 0x418e00, 1, 0x04, 0x00000003 },
{ 0x418e08, 1, 0x04, 0x00000000 },
{ 0x41900c, 1, 0x04, 0x00000000 },
{ 0x419018, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvc1_graph_init_tpc[] = {
{ 0x419d08, 2, 0x04, 0x00000000 },
{ 0x419d10, 1, 0x04, 0x00000014 },
{ 0x419ab0, 1, 0x04, 0x00000000 },
{ 0x419ac8, 1, 0x04, 0x00000000 },
{ 0x419ab8, 1, 0x04, 0x000000e7 },
{ 0x419abc, 2, 0x04, 0x00000000 },
{ 0x41980c, 2, 0x04, 0x00000000 },
{ 0x419814, 1, 0x04, 0x00000004 },
{ 0x419844, 1, 0x04, 0x00000000 },
{ 0x41984c, 1, 0x04, 0x00005bc5 },
{ 0x419850, 4, 0x04, 0x00000000 },
{ 0x419880, 1, 0x04, 0x00000002 },
{ 0x419c98, 1, 0x04, 0x00000000 },
{ 0x419ca8, 1, 0x04, 0x80000000 },
{ 0x419cb4, 1, 0x04, 0x00000000 },
{ 0x419cb8, 1, 0x04, 0x00008bf4 },
{ 0x419cbc, 1, 0x04, 0x28137606 },
{ 0x419cc0, 2, 0x04, 0x00000000 },
{ 0x419bd4, 1, 0x04, 0x00800000 },
{ 0x419bdc, 1, 0x04, 0x00000000 },
{ 0x419d2c, 1, 0x04, 0x00000000 },
{ 0x419c0c, 1, 0x04, 0x00000000 },
{ 0x419e00, 1, 0x04, 0x00000000 },
{ 0x419ea0, 1, 0x04, 0x00000000 },
{ 0x419ea4, 1, 0x04, 0x00000100 },
{ 0x419ea8, 1, 0x04, 0x00001100 },
{ 0x419eac, 1, 0x04, 0x11100702 },
{ 0x419eb0, 1, 0x04, 0x00000003 },
{ 0x419eb4, 4, 0x04, 0x00000000 },
{ 0x419ec8, 1, 0x04, 0x0e063818 },
{ 0x419ecc, 1, 0x04, 0x0e060e06 },
{ 0x419ed0, 1, 0x04, 0x00003818 },
{ 0x419ed4, 1, 0x04, 0x011104f1 },
{ 0x419edc, 1, 0x04, 0x00000000 },
{ 0x419f00, 1, 0x04, 0x00000000 },
{ 0x419f2c, 1, 0x04, 0x00000000 },
{}
};
struct nvc0_graph_init *
nvc1_graph_init_mmio[] = {
nvc0_graph_init_regs,
nvc0_graph_init_unk40xx,
nvc0_graph_init_unk44xx,
nvc0_graph_init_unk78xx,
nvc0_graph_init_unk60xx,
nvc3_graph_init_unk58xx,
nvc0_graph_init_unk80xx,
nvc1_graph_init_gpc,
nvc1_graph_init_tpc,
nvc0_graph_init_unk88xx,
nvc0_graph_tpc_0,
NULL
};
struct nouveau_oclass *
nvc1_graph_oclass = &(struct nvc0_graph_oclass) {
.base.handle = NV_ENGINE(GR, 0xc1),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvc0_graph_ctor,
.dtor = nvc0_graph_dtor,
.init = nvc0_graph_init,
.fini = _nouveau_graph_fini,
},
.cclass = &nvc1_grctx_oclass,
.sclass = nvc1_graph_sclass,
.mmio = nvc1_graph_init_mmio,
.fecs.ucode = &nvc0_graph_fecs_ucode,
.gpccs.ucode = &nvc0_graph_gpccs_ucode,
}.base;

110
drivers/gpu/drm/nouveau/core/engine/graph/nvc3.c Normal file
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/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "nvc0.h"
/*******************************************************************************
* PGRAPH engine/subdev functions
******************************************************************************/
struct nvc0_graph_init
nvc3_graph_init_unk58xx[] = {
{ 0x405844, 1, 0x04, 0x00ffffff },
{ 0x405850, 1, 0x04, 0x00000000 },
{ 0x405900, 1, 0x04, 0x00002834 },
{ 0x405908, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvc3_graph_init_tpc[] = {
{ 0x419d08, 2, 0x04, 0x00000000 },
{ 0x419d10, 1, 0x04, 0x00000014 },
{ 0x419ab0, 1, 0x04, 0x00000000 },
{ 0x419ac8, 1, 0x04, 0x00000000 },
{ 0x419ab8, 1, 0x04, 0x000000e7 },
{ 0x419abc, 2, 0x04, 0x00000000 },
{ 0x41980c, 3, 0x04, 0x00000000 },
{ 0x419844, 1, 0x04, 0x00000000 },
{ 0x41984c, 1, 0x04, 0x00005bc5 },
{ 0x419850, 4, 0x04, 0x00000000 },
{ 0x419880, 1, 0x04, 0x00000002 },
{ 0x419c98, 1, 0x04, 0x00000000 },
{ 0x419ca8, 1, 0x04, 0x80000000 },
{ 0x419cb4, 1, 0x04, 0x00000000 },
{ 0x419cb8, 1, 0x04, 0x00008bf4 },
{ 0x419cbc, 1, 0x04, 0x28137606 },
{ 0x419cc0, 2, 0x04, 0x00000000 },
{ 0x419bd4, 1, 0x04, 0x00800000 },
{ 0x419bdc, 1, 0x04, 0x00000000 },
{ 0x419d2c, 1, 0x04, 0x00000000 },
{ 0x419c0c, 1, 0x04, 0x00000000 },
{ 0x419e00, 1, 0x04, 0x00000000 },
{ 0x419ea0, 1, 0x04, 0x00000000 },
{ 0x419ea4, 1, 0x04, 0x00000100 },
{ 0x419ea8, 1, 0x04, 0x00001100 },
{ 0x419eac, 1, 0x04, 0x11100702 },
{ 0x419eb0, 1, 0x04, 0x00000003 },
{ 0x419eb4, 4, 0x04, 0x00000000 },
{ 0x419ec8, 1, 0x04, 0x0e063818 },
{ 0x419ecc, 1, 0x04, 0x0e060e06 },
{ 0x419ed0, 1, 0x04, 0x00003818 },
{ 0x419ed4, 1, 0x04, 0x011104f1 },
{ 0x419edc, 1, 0x04, 0x00000000 },
{ 0x419f00, 1, 0x04, 0x00000000 },
{ 0x419f2c, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init *
nvc3_graph_init_mmio[] = {
nvc0_graph_init_regs,
nvc0_graph_init_unk40xx,
nvc0_graph_init_unk44xx,
nvc0_graph_init_unk78xx,
nvc0_graph_init_unk60xx,
nvc3_graph_init_unk58xx,
nvc0_graph_init_unk80xx,
nvc0_graph_init_gpc,
nvc3_graph_init_tpc,
nvc0_graph_init_unk88xx,
nvc0_graph_tpc_0,
NULL
};
struct nouveau_oclass *
nvc3_graph_oclass = &(struct nvc0_graph_oclass) {
.base.handle = NV_ENGINE(GR, 0xc3),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvc0_graph_ctor,
.dtor = nvc0_graph_dtor,
.init = nvc0_graph_init,
.fini = _nouveau_graph_fini,
},
.cclass = &nvc3_grctx_oclass,
.sclass = nvc0_graph_sclass,
.mmio = nvc3_graph_init_mmio,
.fecs.ucode = &nvc0_graph_fecs_ucode,
.gpccs.ucode = &nvc0_graph_gpccs_ucode,
}.base;

141
drivers/gpu/drm/nouveau/core/engine/graph/nvc8.c Normal file
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/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "nvc0.h"
/*******************************************************************************
* Graphics object classes
******************************************************************************/
struct nouveau_oclass
nvc8_graph_sclass[] = {
{ 0x902d, &nouveau_object_ofuncs },
{ 0x9039, &nouveau_object_ofuncs },
{ 0x9097, &nouveau_object_ofuncs },
{ 0x90c0, &nouveau_object_ofuncs },
{ 0x9197, &nouveau_object_ofuncs },
{ 0x9297, &nouveau_object_ofuncs },
{}
};
/*******************************************************************************
* PGRAPH engine/subdev functions
******************************************************************************/
static struct nvc0_graph_init
nvc8_graph_init_gpc[] = {
{ 0x4184a0, 1, 0x04, 0x00000000 },
{ 0x418604, 1, 0x04, 0x00000000 },
{ 0x418680, 1, 0x04, 0x00000000 },
{ 0x418714, 1, 0x04, 0x80000000 },
{ 0x418384, 1, 0x04, 0x00000000 },
{ 0x418814, 3, 0x04, 0x00000000 },
{ 0x418b04, 1, 0x04, 0x00000000 },
{ 0x4188c8, 2, 0x04, 0x00000000 },
{ 0x4188d0, 1, 0x04, 0x00010000 },
{ 0x4188d4, 1, 0x04, 0x00000001 },
{ 0x418910, 1, 0x04, 0x00010001 },
{ 0x418914, 1, 0x04, 0x00000301 },
{ 0x418918, 1, 0x04, 0x00800000 },
{ 0x418980, 1, 0x04, 0x77777770 },
{ 0x418984, 3, 0x04, 0x77777777 },
{ 0x418c04, 1, 0x04, 0x00000000 },
{ 0x418c88, 1, 0x04, 0x00000000 },
{ 0x418d00, 1, 0x04, 0x00000000 },
{ 0x418f08, 1, 0x04, 0x00000000 },
{ 0x418e00, 1, 0x04, 0x00000050 },
{ 0x418e08, 1, 0x04, 0x00000000 },
{ 0x41900c, 1, 0x04, 0x00000000 },
{ 0x419018, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvc8_graph_init_tpc[] = {
{ 0x419d08, 2, 0x04, 0x00000000 },
{ 0x419d10, 1, 0x04, 0x00000014 },
{ 0x419ab0, 1, 0x04, 0x00000000 },
{ 0x419ab8, 1, 0x04, 0x000000e7 },
{ 0x419abc, 2, 0x04, 0x00000000 },
{ 0x41980c, 3, 0x04, 0x00000000 },
{ 0x419844, 1, 0x04, 0x00000000 },
{ 0x41984c, 1, 0x04, 0x00005bc5 },
{ 0x419850, 4, 0x04, 0x00000000 },
{ 0x419c98, 1, 0x04, 0x00000000 },
{ 0x419ca8, 1, 0x04, 0x80000000 },
{ 0x419cb4, 1, 0x04, 0x00000000 },
{ 0x419cb8, 1, 0x04, 0x00008bf4 },
{ 0x419cbc, 1, 0x04, 0x28137606 },
{ 0x419cc0, 2, 0x04, 0x00000000 },
{ 0x419bd4, 1, 0x04, 0x00800000 },
{ 0x419bdc, 1, 0x04, 0x00000000 },
{ 0x419d2c, 1, 0x04, 0x00000000 },
{ 0x419c0c, 1, 0x04, 0x00000000 },
{ 0x419e00, 1, 0x04, 0x00000000 },
{ 0x419ea0, 1, 0x04, 0x00000000 },
{ 0x419ea4, 1, 0x04, 0x00000100 },
{ 0x419ea8, 1, 0x04, 0x00001100 },
{ 0x419eac, 1, 0x04, 0x11100f02 },
{ 0x419eb0, 1, 0x04, 0x00000003 },
{ 0x419eb4, 4, 0x04, 0x00000000 },
{ 0x419ec8, 1, 0x04, 0x06060618 },
{ 0x419ed0, 1, 0x04, 0x0eff0e38 },
{ 0x419ed4, 1, 0x04, 0x011104f1 },
{ 0x419edc, 1, 0x04, 0x00000000 },
{ 0x419f00, 1, 0x04, 0x00000000 },
{ 0x419f2c, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init *
nvc8_graph_init_mmio[] = {
nvc0_graph_init_regs,
nvc0_graph_init_unk40xx,
nvc0_graph_init_unk44xx,
nvc0_graph_init_unk78xx,
nvc0_graph_init_unk60xx,
nvc0_graph_init_unk58xx,
nvc0_graph_init_unk80xx,
nvc8_graph_init_gpc,
nvc8_graph_init_tpc,
nvc0_graph_init_unk88xx,
nvc0_graph_tpc_0,
NULL
};
struct nouveau_oclass *
nvc8_graph_oclass = &(struct nvc0_graph_oclass) {
.base.handle = NV_ENGINE(GR, 0xc8),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvc0_graph_ctor,
.dtor = nvc0_graph_dtor,
.init = nvc0_graph_init,
.fini = _nouveau_graph_fini,
},
.cclass = &nvc8_grctx_oclass,
.sclass = nvc8_graph_sclass,
.mmio = nvc8_graph_init_mmio,
.fecs.ucode = &nvc0_graph_fecs_ucode,
.gpccs.ucode = &nvc0_graph_gpccs_ucode,
}.base;

167
drivers/gpu/drm/nouveau/core/engine/graph/nvd7.c Normal file
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/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "nvc0.h"
/*******************************************************************************
* PGRAPH engine/subdev functions
******************************************************************************/
#include "fuc/hubnvd7.fuc.h"
struct nvc0_graph_ucode
nvd7_graph_fecs_ucode = {
.code.data = nvd7_grhub_code,
.code.size = sizeof(nvd7_grhub_code),
.data.data = nvd7_grhub_data,
.data.size = sizeof(nvd7_grhub_data),
};
#include "fuc/gpcnvd7.fuc.h"
struct nvc0_graph_ucode
nvd7_graph_gpccs_ucode = {
.code.data = nvd7_grgpc_code,
.code.size = sizeof(nvd7_grgpc_code),
.data.data = nvd7_grgpc_data,
.data.size = sizeof(nvd7_grgpc_data),
};
static struct nvc0_graph_init
nvd7_graph_init_gpc[] = {
{ 0x418408, 1, 0x04, 0x00000000 },
{ 0x4184a0, 1, 0x04, 0x00000000 },
{ 0x4184a4, 2, 0x04, 0x00000000 },
{ 0x418604, 1, 0x04, 0x00000000 },
{ 0x418680, 1, 0x04, 0x00000000 },
{ 0x418714, 1, 0x04, 0x00000000 },
{ 0x418384, 1, 0x04, 0x00000000 },
{ 0x418814, 3, 0x04, 0x00000000 },
{ 0x418b04, 1, 0x04, 0x00000000 },
{ 0x4188c8, 2, 0x04, 0x00000000 },
{ 0x4188d0, 1, 0x04, 0x00010000 },
{ 0x4188d4, 1, 0x04, 0x00000001 },
{ 0x418910, 1, 0x04, 0x00010001 },
{ 0x418914, 1, 0x04, 0x00000301 },
{ 0x418918, 1, 0x04, 0x00800000 },
{ 0x418980, 1, 0x04, 0x77777770 },
{ 0x418984, 3, 0x04, 0x77777777 },
{ 0x418c04, 1, 0x04, 0x00000000 },
{ 0x418c64, 1, 0x04, 0x00000000 },
{ 0x418c68, 1, 0x04, 0x00000000 },
{ 0x418c88, 1, 0x04, 0x00000000 },
{ 0x418cb4, 2, 0x04, 0x00000000 },
{ 0x418d00, 1, 0x04, 0x00000000 },
{ 0x418d28, 1, 0x04, 0x00000000 },
{ 0x418f00, 1, 0x04, 0x00000000 },
{ 0x418f08, 1, 0x04, 0x00000000 },
{ 0x418f20, 2, 0x04, 0x00000000 },
{ 0x418e00, 1, 0x04, 0x00000003 },
{ 0x418e08, 1, 0x04, 0x00000000 },
{ 0x418e1c, 1, 0x04, 0x00000000 },
{ 0x418e20, 1, 0x04, 0x00000000 },
{ 0x41900c, 1, 0x04, 0x00000000 },
{ 0x419018, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvd7_graph_init_tpc[] = {
{ 0x419d08, 2, 0x04, 0x00000000 },
{ 0x419d10, 1, 0x04, 0x00000014 },
{ 0x419ab0, 1, 0x04, 0x00000000 },
{ 0x419ac8, 1, 0x04, 0x00000000 },
{ 0x419ab8, 1, 0x04, 0x000000e7 },
{ 0x419abc, 2, 0x04, 0x00000000 },
{ 0x419ab4, 1, 0x04, 0x00000000 },
{ 0x41980c, 1, 0x04, 0x00000010 },
{ 0x419844, 1, 0x04, 0x00000000 },
{ 0x41984c, 1, 0x04, 0x00005bc8 },
{ 0x419850, 2, 0x04, 0x00000000 },
{ 0x419c98, 1, 0x04, 0x00000000 },
{ 0x419ca8, 1, 0x04, 0x80000000 },
{ 0x419cb4, 1, 0x04, 0x00000000 },
{ 0x419cb8, 1, 0x04, 0x00008bf4 },
{ 0x419cbc, 1, 0x04, 0x28137606 },
{ 0x419cc0, 2, 0x04, 0x00000000 },
{ 0x419c0c, 1, 0x04, 0x00000000 },
{ 0x419e00, 1, 0x04, 0x00000000 },
{ 0x419ea0, 1, 0x04, 0x00000000 },
{ 0x419ea4, 1, 0x04, 0x00000100 },
{ 0x419ea8, 1, 0x04, 0x02001100 },
{ 0x419eac, 1, 0x04, 0x11100702 },
{ 0x419eb0, 1, 0x04, 0x00000003 },
{ 0x419eb4, 4, 0x04, 0x00000000 },
{ 0x419ec8, 1, 0x04, 0x0e063818 },
{ 0x419ecc, 1, 0x04, 0x0e060e06 },
{ 0x419ed0, 1, 0x04, 0x00003818 },
{ 0x419ed4, 1, 0x04, 0x011104f1 },
{ 0x419edc, 1, 0x04, 0x00000000 },
{ 0x419f00, 1, 0x04, 0x00000000 },
{ 0x419f2c, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvd7_graph_init_tpc_0[] = {
{ 0x40402c, 1, 0x04, 0x00000000 },
{ 0x4040f0, 1, 0x04, 0x00000000 },
{ 0x404174, 1, 0x04, 0x00000000 },
{ 0x503018, 1, 0x04, 0x00000001 },
{}
};
static struct nvc0_graph_init *
nvd7_graph_init_mmio[] = {
nvc0_graph_init_regs,
nvc0_graph_init_unk40xx,
nvc0_graph_init_unk44xx,
nvc0_graph_init_unk78xx,
nvc0_graph_init_unk60xx,
nvd9_graph_init_unk64xx,
nvd9_graph_init_unk58xx,
nvc0_graph_init_unk80xx,
nvd7_graph_init_gpc,
nvd7_graph_init_tpc,
nve4_graph_init_unk,
nvc0_graph_init_unk88xx,
nvd7_graph_init_tpc_0,
NULL
};
struct nouveau_oclass *
nvd7_graph_oclass = &(struct nvc0_graph_oclass) {
.base.handle = NV_ENGINE(GR, 0xd7),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvc0_graph_ctor,
.dtor = nvc0_graph_dtor,
.init = nvc0_graph_init,
.fini = _nouveau_graph_fini,
},
.cclass = &nvd7_grctx_oclass,
.sclass = nvc8_graph_sclass,
.mmio = nvd7_graph_init_mmio,
.fecs.ucode = &nvd7_graph_fecs_ucode,
.gpccs.ucode = &nvd7_graph_gpccs_ucode,
}.base;

165
drivers/gpu/drm/nouveau/core/engine/graph/nvd9.c Normal file
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/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "nvc0.h"
/*******************************************************************************
* PGRAPH engine/subdev functions
******************************************************************************/
struct nvc0_graph_init
nvd9_graph_init_unk64xx[] = {
{ 0x4064f0, 3, 0x04, 0x00000000 },
{}
};
struct nvc0_graph_init
nvd9_graph_init_unk58xx[] = {
{ 0x405844, 1, 0x04, 0x00ffffff },
{ 0x405850, 1, 0x04, 0x00000000 },
{ 0x405900, 1, 0x04, 0x00002834 },
{ 0x405908, 1, 0x04, 0x00000000 },
{ 0x405928, 1, 0x04, 0x00000000 },
{ 0x40592c, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvd9_graph_init_gpc[] = {
{ 0x418408, 1, 0x04, 0x00000000 },
{ 0x4184a0, 1, 0x04, 0x00000000 },
{ 0x4184a4, 2, 0x04, 0x00000000 },
{ 0x418604, 1, 0x04, 0x00000000 },
{ 0x418680, 1, 0x04, 0x00000000 },
{ 0x418714, 1, 0x04, 0x00000000 },
{ 0x418384, 1, 0x04, 0x00000000 },
{ 0x418814, 3, 0x04, 0x00000000 },
{ 0x418b04, 1, 0x04, 0x00000000 },
{ 0x4188c8, 2, 0x04, 0x00000000 },
{ 0x4188d0, 1, 0x04, 0x00010000 },
{ 0x4188d4, 1, 0x04, 0x00000001 },
{ 0x418910, 1, 0x04, 0x00010001 },
{ 0x418914, 1, 0x04, 0x00000301 },
{ 0x418918, 1, 0x04, 0x00800000 },
{ 0x418980, 1, 0x04, 0x77777770 },
{ 0x418984, 3, 0x04, 0x77777777 },
{ 0x418c04, 1, 0x04, 0x00000000 },
{ 0x418c64, 1, 0x04, 0x00000000 },
{ 0x418c68, 1, 0x04, 0x00000000 },
{ 0x418c88, 1, 0x04, 0x00000000 },
{ 0x418cb4, 2, 0x04, 0x00000000 },
{ 0x418d00, 1, 0x04, 0x00000000 },
{ 0x418d28, 1, 0x04, 0x00000000 },
{ 0x418d2c, 1, 0x04, 0x00000000 },
{ 0x418f00, 1, 0x04, 0x00000000 },
{ 0x418f08, 1, 0x04, 0x00000000 },
{ 0x418f20, 2, 0x04, 0x00000000 },
{ 0x418e00, 1, 0x04, 0x00000003 },
{ 0x418e08, 1, 0x04, 0x00000000 },
{ 0x418e1c, 1, 0x04, 0x00000000 },
{ 0x418e20, 1, 0x04, 0x00000000 },
{ 0x41900c, 1, 0x04, 0x00000000 },
{ 0x419018, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvd9_graph_init_tpc[] = {
{ 0x419d08, 2, 0x04, 0x00000000 },
{ 0x419d10, 1, 0x04, 0x00000014 },
{ 0x419ab0, 1, 0x04, 0x00000000 },
{ 0x419ac8, 1, 0x04, 0x00000000 },
{ 0x419ab8, 1, 0x04, 0x000000e7 },
{ 0x419abc, 2, 0x04, 0x00000000 },
{ 0x419ab4, 1, 0x04, 0x00000000 },
{ 0x41980c, 1, 0x04, 0x00000010 },
{ 0x419810, 1, 0x04, 0x00000000 },
{ 0x419814, 1, 0x04, 0x00000004 },
{ 0x419844, 1, 0x04, 0x00000000 },
{ 0x41984c, 1, 0x04, 0x0000a918 },
{ 0x419850, 4, 0x04, 0x00000000 },
{ 0x419880, 1, 0x04, 0x00000002 },
{ 0x419c98, 1, 0x04, 0x00000000 },
{ 0x419ca8, 1, 0x04, 0x80000000 },
{ 0x419cb4, 1, 0x04, 0x00000000 },
{ 0x419cb8, 1, 0x04, 0x00008bf4 },
{ 0x419cbc, 1, 0x04, 0x28137606 },
{ 0x419cc0, 2, 0x04, 0x00000000 },
{ 0x419bd4, 1, 0x04, 0x00800000 },
{ 0x419bdc, 1, 0x04, 0x00000000 },
{ 0x419bf8, 1, 0x04, 0x00000000 },
{ 0x419bfc, 1, 0x04, 0x00000000 },
{ 0x419d2c, 1, 0x04, 0x00000000 },
{ 0x419d48, 1, 0x04, 0x00000000 },
{ 0x419d4c, 1, 0x04, 0x00000000 },
{ 0x419c0c, 1, 0x04, 0x00000000 },
{ 0x419e00, 1, 0x04, 0x00000000 },
{ 0x419ea0, 1, 0x04, 0x00000000 },
{ 0x419ea4, 1, 0x04, 0x00000100 },
{ 0x419ea8, 1, 0x04, 0x02001100 },
{ 0x419eac, 1, 0x04, 0x11100702 },
{ 0x419eb0, 1, 0x04, 0x00000003 },
{ 0x419eb4, 4, 0x04, 0x00000000 },
{ 0x419ec8, 1, 0x04, 0x0e063818 },
{ 0x419ecc, 1, 0x04, 0x0e060e06 },
{ 0x419ed0, 1, 0x04, 0x00003818 },
{ 0x419ed4, 1, 0x04, 0x011104f1 },
{ 0x419edc, 1, 0x04, 0x00000000 },
{ 0x419f00, 1, 0x04, 0x00000000 },
{ 0x419f2c, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init *
nvd9_graph_init_mmio[] = {
nvc0_graph_init_regs,
nvc0_graph_init_unk40xx,
nvc0_graph_init_unk44xx,
nvc0_graph_init_unk78xx,
nvc0_graph_init_unk60xx,
nvd9_graph_init_unk64xx,
nvd9_graph_init_unk58xx,
nvc0_graph_init_unk80xx,
nvd9_graph_init_gpc,
nvd9_graph_init_tpc,
nvc0_graph_init_unk88xx,
nvc0_graph_tpc_0,
NULL
};
struct nouveau_oclass *
nvd9_graph_oclass = &(struct nvc0_graph_oclass) {
.base.handle = NV_ENGINE(GR, 0xd9),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvc0_graph_ctor,
.dtor = nvc0_graph_dtor,
.init = nvc0_graph_init,
.fini = _nouveau_graph_fini,
},
.cclass = &nvd9_grctx_oclass,
.sclass = nvc8_graph_sclass,
.mmio = nvd9_graph_init_mmio,
.fecs.ucode = &nvc0_graph_fecs_ucode,
.gpccs.ucode = &nvc0_graph_gpccs_ucode,
}.base;

1105
drivers/gpu/drm/nouveau/core/engine/graph/nve0.c
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354
drivers/gpu/drm/nouveau/core/engine/graph/nve4.c Normal file
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/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "nvc0.h"
/*******************************************************************************
* Graphics object classes
******************************************************************************/
static struct nouveau_oclass
nve4_graph_sclass[] = {
{ 0x902d, &nouveau_object_ofuncs },
{ 0xa040, &nouveau_object_ofuncs },
{ 0xa097, &nouveau_object_ofuncs },
{ 0xa0c0, &nouveau_object_ofuncs },
{}
};
/*******************************************************************************
* PGRAPH engine/subdev functions
******************************************************************************/
struct nvc0_graph_init
nve4_graph_init_regs[] = {
{ 0x400080, 1, 0x04, 0x003083c2 },
{ 0x400088, 1, 0x04, 0x0001ffe7 },
{ 0x40008c, 1, 0x04, 0x00000000 },
{ 0x400090, 1, 0x04, 0x00000030 },
{ 0x40013c, 1, 0x04, 0x003901f7 },
{ 0x400140, 1, 0x04, 0x00000100 },
{ 0x400144, 1, 0x04, 0x00000000 },
{ 0x400148, 1, 0x04, 0x00000110 },
{ 0x400138, 1, 0x04, 0x00000000 },
{ 0x400130, 2, 0x04, 0x00000000 },
{ 0x400124, 1, 0x04, 0x00000002 },
{}
};
static struct nvc0_graph_init
nve4_graph_init_unk58xx[] = {
{ 0x405844, 1, 0x04, 0x00ffffff },
{ 0x405850, 1, 0x04, 0x00000000 },
{ 0x405900, 1, 0x04, 0x0000ff34 },
{ 0x405908, 1, 0x04, 0x00000000 },
{ 0x405928, 1, 0x04, 0x00000000 },
{ 0x40592c, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nve4_graph_init_unk70xx[] = {
{ 0x407010, 1, 0x04, 0x00000000 },
{}
};
struct nvc0_graph_init
nve4_graph_init_unk5bxx[] = {
{ 0x405b50, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nve4_graph_init_gpc[] = {
{ 0x418408, 1, 0x04, 0x00000000 },
{ 0x4184a0, 1, 0x04, 0x00000000 },
{ 0x4184a4, 2, 0x04, 0x00000000 },
{ 0x418604, 1, 0x04, 0x00000000 },
{ 0x418680, 1, 0x04, 0x00000000 },
{ 0x418714, 1, 0x04, 0x00000000 },
{ 0x418384, 1, 0x04, 0x00000000 },
{ 0x418814, 3, 0x04, 0x00000000 },
{ 0x418b04, 1, 0x04, 0x00000000 },
{ 0x4188c8, 2, 0x04, 0x00000000 },
{ 0x4188d0, 1, 0x04, 0x00010000 },
{ 0x4188d4, 1, 0x04, 0x00000001 },
{ 0x418910, 1, 0x04, 0x00010001 },
{ 0x418914, 1, 0x04, 0x00000301 },
{ 0x418918, 1, 0x04, 0x00800000 },
{ 0x418980, 1, 0x04, 0x77777770 },
{ 0x418984, 3, 0x04, 0x77777777 },
{ 0x418c04, 1, 0x04, 0x00000000 },
{ 0x418c64, 1, 0x04, 0x00000000 },
{ 0x418c68, 1, 0x04, 0x00000000 },
{ 0x418c88, 1, 0x04, 0x00000000 },
{ 0x418cb4, 2, 0x04, 0x00000000 },
{ 0x418d00, 1, 0x04, 0x00000000 },
{ 0x418d28, 1, 0x04, 0x00000000 },
{ 0x418d2c, 1, 0x04, 0x00000000 },
{ 0x418f00, 1, 0x04, 0x00000000 },
{ 0x418f08, 1, 0x04, 0x00000000 },
{ 0x418f20, 2, 0x04, 0x00000000 },
{ 0x418e00, 1, 0x04, 0x00000060 },
{ 0x418e08, 1, 0x04, 0x00000000 },
{ 0x418e1c, 1, 0x04, 0x00000000 },
{ 0x418e20, 1, 0x04, 0x00000000 },
{ 0x41900c, 1, 0x04, 0x00000000 },
{ 0x419018, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nve4_graph_init_tpc[] = {
{ 0x419d0c, 1, 0x04, 0x00000000 },
{ 0x419d10, 1, 0x04, 0x00000014 },
{ 0x419ab0, 1, 0x04, 0x00000000 },
{ 0x419ac8, 1, 0x04, 0x00000000 },
{ 0x419ab8, 1, 0x04, 0x000000e7 },
{ 0x419abc, 2, 0x04, 0x00000000 },
{ 0x419ab4, 1, 0x04, 0x00000000 },
{ 0x41980c, 1, 0x04, 0x00000010 },
{ 0x419844, 1, 0x04, 0x00000000 },
{ 0x419850, 1, 0x04, 0x00000004 },
{ 0x419854, 2, 0x04, 0x00000000 },
{ 0x419c98, 1, 0x04, 0x00000000 },
{ 0x419ca8, 1, 0x04, 0x00000000 },
{ 0x419cb0, 1, 0x04, 0x01000000 },
{ 0x419cb4, 1, 0x04, 0x00000000 },
{ 0x419cb8, 1, 0x04, 0x00b08bea },
{ 0x419c84, 1, 0x04, 0x00010384 },
{ 0x419cbc, 1, 0x04, 0x28137646 },
{ 0x419cc0, 2, 0x04, 0x00000000 },
{ 0x419c80, 1, 0x04, 0x00020232 },
{ 0x419c0c, 1, 0x04, 0x00000000 },
{ 0x419e00, 1, 0x04, 0x00000000 },
{ 0x419ea0, 1, 0x04, 0x00000000 },
{ 0x419ee4, 1, 0x04, 0x00000000 },
{ 0x419ea4, 1, 0x04, 0x00000100 },
{ 0x419ea8, 1, 0x04, 0x00000000 },
{ 0x419eb4, 1, 0x04, 0x00000000 },
{ 0x419eb8, 3, 0x04, 0x00000000 },
{ 0x419edc, 1, 0x04, 0x00000000 },
{ 0x419f00, 1, 0x04, 0x00000000 },
{ 0x419f74, 1, 0x04, 0x00000555 },
{}
};
struct nvc0_graph_init
nve4_graph_init_unk[] = {
{ 0x41be04, 1, 0x04, 0x00000000 },
{ 0x41be08, 1, 0x04, 0x00000004 },
{ 0x41be0c, 1, 0x04, 0x00000000 },
{ 0x41be10, 1, 0x04, 0x003b8bc7 },
{ 0x41be14, 2, 0x04, 0x00000000 },
{ 0x41bfd4, 1, 0x04, 0x00800000 },
{ 0x41bfdc, 1, 0x04, 0x00000000 },
{ 0x41bff8, 1, 0x04, 0x00000000 },
{ 0x41bffc, 1, 0x04, 0x00000000 },
{ 0x41becc, 1, 0x04, 0x00000000 },
{ 0x41bee8, 1, 0x04, 0x00000000 },
{ 0x41beec, 1, 0x04, 0x00000000 },
{}
};
struct nvc0_graph_init
nve4_graph_init_unk88xx[] = {
{ 0x40880c, 1, 0x04, 0x00000000 },
{ 0x408850, 1, 0x04, 0x00000004 },
{ 0x408910, 9, 0x04, 0x00000000 },
{ 0x408950, 1, 0x04, 0x00000000 },
{ 0x408954, 1, 0x04, 0x0000ffff },
{ 0x408958, 1, 0x04, 0x00000034 },
{ 0x408984, 1, 0x04, 0x00000000 },
{ 0x408988, 1, 0x04, 0x08040201 },
{ 0x40898c, 1, 0x04, 0x80402010 },
{}
};
int
nve4_graph_init(struct nouveau_object *object)
{
struct nvc0_graph_oclass *oclass = (void *)object->oclass;
struct nvc0_graph_priv *priv = (void *)object;
const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, priv->tpc_total);
u32 data[TPC_MAX / 8] = {};
u8 tpcnr[GPC_MAX];
int gpc, tpc, rop;
int ret, i;
ret = nouveau_graph_init(&priv->base);
if (ret)
return ret;
nv_wr32(priv, GPC_BCAST(0x0880), 0x00000000);
nv_wr32(priv, GPC_BCAST(0x08a4), 0x00000000);
nv_wr32(priv, GPC_BCAST(0x0888), 0x00000000);
nv_wr32(priv, GPC_BCAST(0x088c), 0x00000000);
nv_wr32(priv, GPC_BCAST(0x0890), 0x00000000);
nv_wr32(priv, GPC_BCAST(0x0894), 0x00000000);
nv_wr32(priv, GPC_BCAST(0x08b4), priv->unk4188b4->addr >> 8);
nv_wr32(priv, GPC_BCAST(0x08b8), priv->unk4188b8->addr >> 8);
for (i = 0; oclass->mmio[i]; i++)
nvc0_graph_mmio(priv, oclass->mmio[i]);
nv_wr32(priv, GPC_UNIT(0, 0x3018), 0x00000001);
memset(data, 0x00, sizeof(data));
memcpy(tpcnr, priv->tpc_nr, sizeof(priv->tpc_nr));
for (i = 0, gpc = -1; i < priv->tpc_total; i++) {
do {
gpc = (gpc + 1) % priv->gpc_nr;
} while (!tpcnr[gpc]);
tpc = priv->tpc_nr[gpc] - tpcnr[gpc]--;
data[i / 8] |= tpc << ((i % 8) * 4);
}
nv_wr32(priv, GPC_BCAST(0x0980), data[0]);
nv_wr32(priv, GPC_BCAST(0x0984), data[1]);
nv_wr32(priv, GPC_BCAST(0x0988), data[2]);
nv_wr32(priv, GPC_BCAST(0x098c), data[3]);
for (gpc = 0; gpc < priv->gpc_nr; gpc++) {
nv_wr32(priv, GPC_UNIT(gpc, 0x0914),
priv->magic_not_rop_nr << 8 | priv->tpc_nr[gpc]);
nv_wr32(priv, GPC_UNIT(gpc, 0x0910), 0x00040000 |
priv->tpc_total);
nv_wr32(priv, GPC_UNIT(gpc, 0x0918), magicgpc918);
}
nv_wr32(priv, GPC_BCAST(0x3fd4), magicgpc918);
nv_wr32(priv, GPC_BCAST(0x08ac), nv_rd32(priv, 0x100800));
nv_wr32(priv, 0x400500, 0x00010001);
nv_wr32(priv, 0x400100, 0xffffffff);
nv_wr32(priv, 0x40013c, 0xffffffff);
nv_wr32(priv, 0x409ffc, 0x00000000);
nv_wr32(priv, 0x409c14, 0x00003e3e);
nv_wr32(priv, 0x409c24, 0x000f0001);
nv_wr32(priv, 0x404000, 0xc0000000);
nv_wr32(priv, 0x404600, 0xc0000000);
nv_wr32(priv, 0x408030, 0xc0000000);
nv_wr32(priv, 0x404490, 0xc0000000);
nv_wr32(priv, 0x406018, 0xc0000000);
nv_wr32(priv, 0x407020, 0x40000000);
nv_wr32(priv, 0x405840, 0xc0000000);
nv_wr32(priv, 0x405844, 0x00ffffff);
nv_mask(priv, 0x419cc0, 0x00000008, 0x00000008);
nv_mask(priv, 0x419eb4, 0x00001000, 0x00001000);
for (gpc = 0; gpc < priv->gpc_nr; gpc++) {
nv_wr32(priv, GPC_UNIT(gpc, 0x3038), 0xc0000000);
nv_wr32(priv, GPC_UNIT(gpc, 0x0420), 0xc0000000);
nv_wr32(priv, GPC_UNIT(gpc, 0x0900), 0xc0000000);
nv_wr32(priv, GPC_UNIT(gpc, 0x1028), 0xc0000000);
nv_wr32(priv, GPC_UNIT(gpc, 0x0824), 0xc0000000);
for (tpc = 0; tpc < priv->tpc_nr[gpc]; tpc++) {
nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000);
nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x644), 0x001ffffe);
nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x64c), 0x0000000f);
}
nv_wr32(priv, GPC_UNIT(gpc, 0x2c90), 0xffffffff);
nv_wr32(priv, GPC_UNIT(gpc, 0x2c94), 0xffffffff);
}
for (rop = 0; rop < priv->rop_nr; rop++) {
nv_wr32(priv, ROP_UNIT(rop, 0x144), 0xc0000000);
nv_wr32(priv, ROP_UNIT(rop, 0x070), 0xc0000000);
nv_wr32(priv, ROP_UNIT(rop, 0x204), 0xffffffff);
nv_wr32(priv, ROP_UNIT(rop, 0x208), 0xffffffff);
}
nv_wr32(priv, 0x400108, 0xffffffff);
nv_wr32(priv, 0x400138, 0xffffffff);
nv_wr32(priv, 0x400118, 0xffffffff);
nv_wr32(priv, 0x400130, 0xffffffff);
nv_wr32(priv, 0x40011c, 0xffffffff);
nv_wr32(priv, 0x400134, 0xffffffff);
nv_wr32(priv, 0x400054, 0x34ce3464);
return nvc0_graph_init_ctxctl(priv);
}
static struct nvc0_graph_init *
nve4_graph_init_mmio[] = {
nve4_graph_init_regs,
nvc0_graph_init_unk40xx,
nvc0_graph_init_unk44xx,
nvc0_graph_init_unk78xx,
nvc0_graph_init_unk60xx,
nvd9_graph_init_unk64xx,
nve4_graph_init_unk58xx,
nvc0_graph_init_unk80xx,
nve4_graph_init_unk70xx,
nve4_graph_init_unk5bxx,
nve4_graph_init_gpc,
nve4_graph_init_tpc,
nve4_graph_init_unk,
nve4_graph_init_unk88xx,
NULL
};
#include "fuc/hubnve0.fuc.h"
static struct nvc0_graph_ucode
nve4_graph_fecs_ucode = {
.code.data = nve0_grhub_code,
.code.size = sizeof(nve0_grhub_code),
.data.data = nve0_grhub_data,
.data.size = sizeof(nve0_grhub_data),
};
#include "fuc/gpcnve0.fuc.h"
static struct nvc0_graph_ucode
nve4_graph_gpccs_ucode = {
.code.data = nve0_grgpc_code,
.code.size = sizeof(nve0_grgpc_code),
.data.data = nve0_grgpc_data,
.data.size = sizeof(nve0_grgpc_data),
};
struct nouveau_oclass *
nve4_graph_oclass = &(struct nvc0_graph_oclass) {
.base.handle = NV_ENGINE(GR, 0xe4),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvc0_graph_ctor,
.dtor = nvc0_graph_dtor,
.init = nve4_graph_init,
.fini = _nouveau_graph_fini,
},
.cclass = &nve4_grctx_oclass,
.sclass = nve4_graph_sclass,
.mmio = nve4_graph_init_mmio,
.fecs.ucode = &nve4_graph_fecs_ucode,
.gpccs.ucode = &nve4_graph_gpccs_ucode,
}.base;

248
drivers/gpu/drm/nouveau/core/engine/graph/nvf0.c Normal file
View File

@ -0,0 +1,248 @@
/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "nvc0.h"
/*******************************************************************************
* Graphics object classes
******************************************************************************/
static struct nouveau_oclass
nvf0_graph_sclass[] = {
{ 0x902d, &nouveau_object_ofuncs },
{ 0xa140, &nouveau_object_ofuncs },
{ 0xa197, &nouveau_object_ofuncs },
{ 0xa1c0, &nouveau_object_ofuncs },
{}
};
/*******************************************************************************
* PGRAPH engine/subdev functions
******************************************************************************/
static struct nvc0_graph_init
nvf0_graph_init_unk40xx[] = {
{ 0x40415c, 1, 0x04, 0x00000000 },
{ 0x404170, 1, 0x04, 0x00000000 },
{ 0x4041b4, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvf0_graph_init_unk58xx[] = {
{ 0x405844, 1, 0x04, 0x00ffffff },
{ 0x405850, 1, 0x04, 0x00000000 },
{ 0x405900, 1, 0x04, 0x0000ff00 },
{ 0x405908, 1, 0x04, 0x00000000 },
{ 0x405928, 1, 0x04, 0x00000000 },
{ 0x40592c, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvf0_graph_init_unk70xx[] = {
{ 0x407010, 1, 0x04, 0x00000000 },
{ 0x407040, 1, 0x04, 0x80440424 },
{ 0x407048, 1, 0x04, 0x0000000a },
{}
};
static struct nvc0_graph_init
nvf0_graph_init_unk5bxx[] = {
{ 0x405b44, 1, 0x04, 0x00000000 },
{ 0x405b50, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvf0_graph_init_gpc[] = {
{ 0x418408, 1, 0x04, 0x00000000 },
{ 0x4184a0, 1, 0x04, 0x00000000 },
{ 0x4184a4, 2, 0x04, 0x00000000 },
{ 0x418604, 1, 0x04, 0x00000000 },
{ 0x418680, 1, 0x04, 0x00000000 },
{ 0x418714, 1, 0x04, 0x00000000 },
{ 0x418384, 1, 0x04, 0x00000000 },
{ 0x418814, 3, 0x04, 0x00000000 },
{ 0x418b04, 1, 0x04, 0x00000000 },
{ 0x4188c8, 2, 0x04, 0x00000000 },
{ 0x4188d0, 1, 0x04, 0x00010000 },
{ 0x4188d4, 1, 0x04, 0x00000001 },
{ 0x418910, 1, 0x04, 0x00010001 },
{ 0x418914, 1, 0x04, 0x00000301 },
{ 0x418918, 1, 0x04, 0x00800000 },
{ 0x418980, 1, 0x04, 0x77777770 },
{ 0x418984, 3, 0x04, 0x77777777 },
{ 0x418c04, 1, 0x04, 0x00000000 },
{ 0x418c64, 1, 0x04, 0x00000000 },
{ 0x418c68, 1, 0x04, 0x00000000 },
{ 0x418c88, 1, 0x04, 0x00000000 },
{ 0x418cb4, 2, 0x04, 0x00000000 },
{ 0x418d00, 1, 0x04, 0x00000000 },
{ 0x418d28, 1, 0x04, 0x00000000 },
{ 0x418d2c, 1, 0x04, 0x00000000 },
{ 0x418f00, 1, 0x04, 0x00000400 },
{ 0x418f08, 1, 0x04, 0x00000000 },
{ 0x418f20, 1, 0x04, 0x00000000 },
{ 0x418f24, 1, 0x04, 0x00000000 },
{ 0x418e00, 1, 0x04, 0x00000000 },
{ 0x418e08, 1, 0x04, 0x00000000 },
{ 0x418e1c, 2, 0x04, 0x00000000 },
{ 0x41900c, 1, 0x04, 0x00000000 },
{ 0x419018, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init
nvf0_graph_init_tpc[] = {
{ 0x419d0c, 1, 0x04, 0x00000000 },
{ 0x419d10, 1, 0x04, 0x00000014 },
{ 0x419ab0, 1, 0x04, 0x00000000 },
{ 0x419ac8, 1, 0x04, 0x00000000 },
{ 0x419ab8, 1, 0x04, 0x000000e7 },
{ 0x419aec, 1, 0x04, 0x00000000 },
{ 0x419abc, 2, 0x04, 0x00000000 },
{ 0x419ab4, 1, 0x04, 0x00000000 },
{ 0x419aa8, 2, 0x04, 0x00000000 },
{ 0x41980c, 1, 0x04, 0x00000010 },
{ 0x419844, 1, 0x04, 0x00000000 },
{ 0x419850, 1, 0x04, 0x00000004 },
{ 0x419854, 2, 0x04, 0x00000000 },
{ 0x419c98, 1, 0x04, 0x00000000 },
{ 0x419ca8, 1, 0x04, 0x00000000 },
{ 0x419cb0, 1, 0x04, 0x01000000 },
{ 0x419cb4, 1, 0x04, 0x00000000 },
{ 0x419cb8, 1, 0x04, 0x00b08bea },
{ 0x419c84, 1, 0x04, 0x00010384 },
{ 0x419cbc, 1, 0x04, 0x281b3646 },
{ 0x419cc0, 2, 0x04, 0x00000000 },
{ 0x419c80, 1, 0x04, 0x00020230 },
{ 0x419ccc, 2, 0x04, 0x00000000 },
{ 0x419c0c, 1, 0x04, 0x00000000 },
{ 0x419e00, 1, 0x04, 0x00000080 },
{ 0x419ea0, 1, 0x04, 0x00000000 },
{ 0x419ee4, 1, 0x04, 0x00000000 },
{ 0x419ea4, 1, 0x04, 0x00000100 },
{ 0x419ea8, 1, 0x04, 0x00000000 },
{ 0x419eb4, 1, 0x04, 0x00000000 },
{ 0x419ebc, 2, 0x04, 0x00000000 },
{ 0x419edc, 1, 0x04, 0x00000000 },
{ 0x419f00, 1, 0x04, 0x00000000 },
{ 0x419ed0, 1, 0x04, 0x00003234 },
{ 0x419f74, 1, 0x04, 0x00015555 },
{ 0x419f80, 4, 0x04, 0x00000000 },
{}
};
static int
nvf0_graph_fini(struct nouveau_object *object, bool suspend)
{
struct nvc0_graph_priv *priv = (void *)object;
static const struct {
u32 addr;
u32 data;
} magic[] = {
{ 0x020520, 0xfffffffc },
{ 0x020524, 0xfffffffe },
{ 0x020524, 0xfffffffc },
{ 0x020524, 0xfffffff8 },
{ 0x020524, 0xffffffe0 },
{ 0x020530, 0xfffffffe },
{ 0x02052c, 0xfffffffa },
{ 0x02052c, 0xfffffff0 },
{ 0x02052c, 0xffffffc0 },
{ 0x02052c, 0xffffff00 },
{ 0x02052c, 0xfffffc00 },
{ 0x02052c, 0xfffcfc00 },
{ 0x02052c, 0xfff0fc00 },
{ 0x02052c, 0xff80fc00 },
{ 0x020528, 0xfffffffe },
{ 0x020528, 0xfffffffc },
};
int i;
nv_mask(priv, 0x000200, 0x08001000, 0x00000000);
nv_mask(priv, 0x0206b4, 0x00000000, 0x00000000);
for (i = 0; i < ARRAY_SIZE(magic); i++) {
nv_wr32(priv, magic[i].addr, magic[i].data);
nv_wait(priv, magic[i].addr, 0x80000000, 0x00000000);
}
return nouveau_graph_fini(&priv->base, suspend);
}
static struct nvc0_graph_init *
nvf0_graph_init_mmio[] = {
nve4_graph_init_regs,
nvf0_graph_init_unk40xx,
nvc0_graph_init_unk44xx,
nvc0_graph_init_unk78xx,
nvc0_graph_init_unk60xx,
nvd9_graph_init_unk64xx,
nvf0_graph_init_unk58xx,
nvc0_graph_init_unk80xx,
nvf0_graph_init_unk70xx,
nvf0_graph_init_unk5bxx,
nvf0_graph_init_gpc,
nvf0_graph_init_tpc,
nve4_graph_init_unk,
nve4_graph_init_unk88xx,
NULL
};
#include "fuc/hubnvf0.fuc.h"
static struct nvc0_graph_ucode
nvf0_graph_fecs_ucode = {
.code.data = nvf0_grhub_code,
.code.size = sizeof(nvf0_grhub_code),
.data.data = nvf0_grhub_data,
.data.size = sizeof(nvf0_grhub_data),
};
#include "fuc/gpcnvf0.fuc.h"
static struct nvc0_graph_ucode
nvf0_graph_gpccs_ucode = {
.code.data = nvf0_grgpc_code,
.code.size = sizeof(nvf0_grgpc_code),
.data.data = nvf0_grgpc_data,
.data.size = sizeof(nvf0_grgpc_data),
};
struct nouveau_oclass *
nvf0_graph_oclass = &(struct nvc0_graph_oclass) {
.base.handle = NV_ENGINE(GR, 0xf0),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvc0_graph_ctor,
.dtor = nvc0_graph_dtor,
.init = nve4_graph_init,
.fini = nvf0_graph_fini,
},
.cclass = &nvf0_grctx_oclass,
.sclass = nvf0_graph_sclass,
.mmio = nvf0_graph_init_mmio,
.fecs.ucode = 0 ? &nvf0_graph_fecs_ucode : NULL,
.gpccs.ucode = &nvf0_graph_gpccs_ucode,
}.base;

10
drivers/gpu/drm/nouveau/core/include/engine/graph.h
View File

@ -61,8 +61,14 @@ extern struct nouveau_oclass nv34_graph_oclass;
extern struct nouveau_oclass nv35_graph_oclass;
extern struct nouveau_oclass nv40_graph_oclass;
extern struct nouveau_oclass nv50_graph_oclass;
extern struct nouveau_oclass nvc0_graph_oclass;
extern struct nouveau_oclass nve0_graph_oclass;
extern struct nouveau_oclass *nvc0_graph_oclass;
extern struct nouveau_oclass *nvc1_graph_oclass;
extern struct nouveau_oclass *nvc3_graph_oclass;
extern struct nouveau_oclass *nvc8_graph_oclass;
extern struct nouveau_oclass *nvd7_graph_oclass;
extern struct nouveau_oclass *nvd9_graph_oclass;
extern struct nouveau_oclass *nve4_graph_oclass;
extern struct nouveau_oclass *nvf0_graph_oclass;
extern const struct nouveau_bitfield nv04_graph_nsource[];
extern struct nouveau_ofuncs nv04_graph_ofuncs;

2
drivers/gpu/drm/nouveau/core/subdev/devinit/nvc0.c
View File

@ -80,7 +80,7 @@ nvc0_devinit_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass
nvc0_devinit_oclass = {
.handle = NV_SUBDEV(DEVINIT, 0xa3),
.handle = NV_SUBDEV(DEVINIT, 0xc0),
.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvc0_devinit_ctor,
.dtor = _nouveau_devinit_dtor,

6
drivers/gpu/drm/nouveau/core/subdev/vm/base.c
View File

@ -365,7 +365,7 @@ nouveau_vm_create(struct nouveau_vmmgr *vmm, u64 offset, u64 length,
vm->fpde = offset >> (vmm->pgt_bits + 12);
vm->lpde = (offset + length - 1) >> (vmm->pgt_bits + 12);
vm->pgt = kcalloc(vm->lpde - vm->fpde + 1, sizeof(*vm->pgt), GFP_KERNEL);
vm->pgt = vzalloc((vm->lpde - vm->fpde + 1) * sizeof(*vm->pgt));
if (!vm->pgt) {
kfree(vm);
return -ENOMEM;
@ -374,7 +374,7 @@ nouveau_vm_create(struct nouveau_vmmgr *vmm, u64 offset, u64 length,
ret = nouveau_mm_init(&vm->mm, mm_offset >> 12, mm_length >> 12,
block >> 12);
if (ret) {
kfree(vm->pgt);
vfree(vm->pgt);
kfree(vm);
return ret;
}
@ -450,7 +450,7 @@ nouveau_vm_del(struct nouveau_vm *vm)
}
nouveau_mm_fini(&vm->mm);
kfree(vm->pgt);
vfree(vm->pgt);
kfree(vm);
}