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ARM: 5890/1: Fix incorrect Realview board IRQs for L220 and PMU
In anticipation of PMU support for Realview boards, the IRQs defined for some of these boards need updating. This patch removes incorrect L220 IRQ definitions, corrects incorrect PMU IRQs and adds any missing IRQs that are required. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -31,6 +31,7 @@
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#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */
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#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */
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#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */
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#define IRQ_DC1176_CORE_PMU (IRQ_DC1176_GIC_START + 7) /* Core PMU interrupt */
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#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */
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#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */
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#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */
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@ -23,12 +23,6 @@
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#define IRQ_PBA8_GIC_START 32
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/* L220
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#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
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#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
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#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
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*/
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/*
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* PB-A8 on-board gic irq sources
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*/
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@ -65,6 +59,8 @@
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#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
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#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
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#define IRQ_PBA8_PMU (IRQ_PBA8_GIC_START + 47) /* Cortex-A8 PMU */
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/* ... */
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#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
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#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
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@ -22,12 +22,6 @@
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#define IRQ_PBX_GIC_START 32
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/* L220
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#define IRQ_PBX_L220_EVENT (IRQ_PBX_GIC_START + 29)
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#define IRQ_PBX_L220_SLAVE (IRQ_PBX_GIC_START + 30)
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#define IRQ_PBX_L220_DECODE (IRQ_PBX_GIC_START + 31)
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*/
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/*
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* PBX on-board gic irq sources
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*/
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@ -77,10 +71,10 @@
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#define IRQ_PBX_TIMER4_5 (IRQ_PBX_GIC_START + 41) /* Timer 0/1 (default timer) */
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#define IRQ_PBX_TIMER6_7 (IRQ_PBX_GIC_START + 42) /* Timer 2/3 */
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/* ... */
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#define IRQ_PBX_PMU_CPU3 (IRQ_PBX_GIC_START + 44) /* CPU PMU Interrupts */
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#define IRQ_PBX_PMU_CPU2 (IRQ_PBX_GIC_START + 45)
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#define IRQ_PBX_PMU_CPU1 (IRQ_PBX_GIC_START + 46)
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#define IRQ_PBX_PMU_CPU0 (IRQ_PBX_GIC_START + 47)
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#define IRQ_PBX_PMU_CPU0 (IRQ_PBX_GIC_START + 44) /* CPU PMU Interrupts */
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#define IRQ_PBX_PMU_CPU1 (IRQ_PBX_GIC_START + 45)
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#define IRQ_PBX_PMU_CPU2 (IRQ_PBX_GIC_START + 46)
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#define IRQ_PBX_PMU_CPU3 (IRQ_PBX_GIC_START + 47)
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/* ... */
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#define IRQ_PBX_PCI0 (IRQ_PBX_GIC_START + 50)
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