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xsk: Fix missing validation for skb and unaligned mode
Fix a missing validation of a Tx descriptor when executing in skb mode
and the umem is in unaligned mode. A descriptor could point to a
buffer straddling the end of the umem, thus effectively tricking the
kernel to read outside the allowed umem region. This could lead to a
kernel crash if that part of memory is not mapped.
In zero-copy mode, the descriptor validation code rejects such
descriptors by checking a bit in the DMA address that tells us if the
next page is physically contiguous or not. For the last page in the
umem, this bit is not set, therefore any descriptor pointing to a
packet straddling this last page boundary will be rejected. However,
the skb path does not use this bit since it copies out data and can do
so to two different pages. (It also does not have the array of DMA
address, so it cannot even store this bit.) The code just returned
that the packet is always physically contiguous. But this is
unfortunately also returned for the last page in the umem, which means
that packets that cross the end of the umem are being allowed, which
they should not be.
Fix this by introducing a check for this in the SKB path only, not
penalizing the zero-copy path.
Fixes: 2b43470add
("xsk: Introduce AF_XDP buffer allocation API")
Signed-off-by: Magnus Karlsson <magnus.karlsson@intel.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Björn Töpel <bjorn@kernel.org>
Link: https://lore.kernel.org/bpf/20210617092255.3487-1-magnus.karlsson@gmail.com
This commit is contained in:
parent
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@ -147,11 +147,16 @@ static inline bool xp_desc_crosses_non_contig_pg(struct xsk_buff_pool *pool,
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{
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bool cross_pg = (addr & (PAGE_SIZE - 1)) + len > PAGE_SIZE;
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if (pool->dma_pages_cnt && cross_pg) {
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if (likely(!cross_pg))
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return false;
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if (pool->dma_pages_cnt) {
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return !(pool->dma_pages[addr >> PAGE_SHIFT] &
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XSK_NEXT_PG_CONTIG_MASK);
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}
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return false;
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/* skb path */
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return addr + len > pool->addrs_cnt;
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}
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static inline u64 xp_aligned_extract_addr(struct xsk_buff_pool *pool, u64 addr)
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