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[ARM] pxa: make pxa2xx_spi driver use ssp_request()/ssp_free()
1. make pxa2xx_spi.c use ssp_request() and ssp_free() to get the common information of the designated SSP port. 2. remove those IRQ/memory request code, ssp_request() has done that for the driver 3. the SPI platform device is thus made psuedo, no resource (memory/IRQ) has to be defined, all will be retreived by ssp_request() 4. introduce ssp_get_clk_div() to handle controller difference in clock divisor setting 5. use clk_xxx() API for clock enable/disable, and clk_get_rate() to handle the different SSP clock frequency between different processors Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
parent
3dcb00ea58
commit
2f1a74e5a2
@ -206,30 +206,13 @@ static struct resource smc91x_resources[] = {
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* (to J5) and poking board registers (as done below). Else it's only useful
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* (to J5) and poking board registers (as done below). Else it's only useful
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* for the temperature sensors.
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* for the temperature sensors.
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*/
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*/
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static struct resource pxa_ssp_resources[] = {
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[0] = {
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.start = __PREG(SSCR0_P(1)),
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.end = __PREG(SSCR0_P(1)) + 0x14,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_SSP,
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.end = IRQ_SSP,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct pxa2xx_spi_master pxa_ssp_master_info = {
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static struct pxa2xx_spi_master pxa_ssp_master_info = {
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.ssp_type = PXA25x_SSP,
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.clock_enable = CKEN_SSP,
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.num_chipselect = 0,
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.num_chipselect = 0,
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};
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};
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static struct platform_device pxa_ssp = {
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static struct platform_device pxa_ssp = {
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.name = "pxa2xx-spi",
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.name = "pxa2xx-spi",
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.id = 1,
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.id = 1,
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.resource = pxa_ssp_resources,
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.num_resources = ARRAY_SIZE(pxa_ssp_resources),
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.dev = {
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.dev = {
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.platform_data = &pxa_ssp_master_info,
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.platform_data = &pxa_ssp_master_info,
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},
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},
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@ -153,6 +153,7 @@ config SPI_OMAP24XX
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config SPI_PXA2XX
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config SPI_PXA2XX
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tristate "PXA2xx SSP SPI master"
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tristate "PXA2xx SSP SPI master"
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depends on SPI_MASTER && ARCH_PXA && EXPERIMENTAL
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depends on SPI_MASTER && ARCH_PXA && EXPERIMENTAL
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select PXA_SSP
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help
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help
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This enables using a PXA2xx SSP port as a SPI master controller.
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This enables using a PXA2xx SSP port as a SPI master controller.
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The driver can be configured to use any SSP port and additional
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The driver can be configured to use any SSP port and additional
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@ -27,6 +27,7 @@
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#include <linux/spi/spi.h>
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#include <linux/spi/spi.h>
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#include <linux/workqueue.h>
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#include <linux/workqueue.h>
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#include <linux/delay.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/irq.h>
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@ -37,6 +38,7 @@
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#include <asm/arch/hardware.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/regs-ssp.h>
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#include <asm/arch/regs-ssp.h>
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#include <asm/arch/ssp.h>
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#include <asm/arch/pxa2xx_spi.h>
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#include <asm/arch/pxa2xx_spi.h>
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MODULE_AUTHOR("Stephen Street");
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MODULE_AUTHOR("Stephen Street");
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@ -81,6 +83,9 @@ struct driver_data {
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/* Driver model hookup */
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/* Driver model hookup */
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struct platform_device *pdev;
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struct platform_device *pdev;
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/* SSP Info */
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struct ssp_device *ssp;
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/* SPI framework hookup */
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/* SPI framework hookup */
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enum pxa_ssp_type ssp_type;
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enum pxa_ssp_type ssp_type;
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struct spi_master *master;
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struct spi_master *master;
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@ -779,6 +784,16 @@ int set_dma_burst_and_threshold(struct chip_data *chip, struct spi_device *spi,
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return retval;
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return retval;
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}
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}
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static unsigned int ssp_get_clk_div(struct ssp_device *ssp, int rate)
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{
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unsigned long ssp_clk = clk_get_rate(ssp->clk);
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if (ssp->type == PXA25x_SSP)
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return ((ssp_clk / (2 * rate) - 1) & 0xff) << 8;
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else
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return ((ssp_clk / rate - 1) & 0xfff) << 8;
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}
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static void pump_transfers(unsigned long data)
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static void pump_transfers(unsigned long data)
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{
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{
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struct driver_data *drv_data = (struct driver_data *)data;
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struct driver_data *drv_data = (struct driver_data *)data;
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@ -786,6 +801,7 @@ static void pump_transfers(unsigned long data)
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struct spi_transfer *transfer = NULL;
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struct spi_transfer *transfer = NULL;
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struct spi_transfer *previous = NULL;
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struct spi_transfer *previous = NULL;
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struct chip_data *chip = NULL;
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struct chip_data *chip = NULL;
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struct ssp_device *ssp = drv_data->ssp;
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void *reg = drv_data->ioaddr;
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void *reg = drv_data->ioaddr;
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u32 clk_div = 0;
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u32 clk_div = 0;
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u8 bits = 0;
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u8 bits = 0;
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@ -867,12 +883,7 @@ static void pump_transfers(unsigned long data)
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if (transfer->bits_per_word)
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if (transfer->bits_per_word)
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bits = transfer->bits_per_word;
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bits = transfer->bits_per_word;
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if (reg == SSP1_VIRT)
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clk_div = ssp_get_clk_div(ssp, speed);
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clk_div = SSP1_SerClkDiv(speed);
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else if (reg == SSP2_VIRT)
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clk_div = SSP2_SerClkDiv(speed);
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else if (reg == SSP3_VIRT)
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clk_div = SSP3_SerClkDiv(speed);
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if (bits <= 8) {
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if (bits <= 8) {
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drv_data->n_bytes = 1;
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drv_data->n_bytes = 1;
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@ -1075,6 +1086,7 @@ static int setup(struct spi_device *spi)
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struct pxa2xx_spi_chip *chip_info = NULL;
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struct pxa2xx_spi_chip *chip_info = NULL;
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struct chip_data *chip;
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struct chip_data *chip;
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struct driver_data *drv_data = spi_master_get_devdata(spi->master);
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struct driver_data *drv_data = spi_master_get_devdata(spi->master);
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struct ssp_device *ssp = drv_data->ssp;
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unsigned int clk_div;
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unsigned int clk_div;
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if (!spi->bits_per_word)
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if (!spi->bits_per_word)
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@ -1158,18 +1170,7 @@ static int setup(struct spi_device *spi)
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}
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}
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}
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}
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if (drv_data->ioaddr == SSP1_VIRT)
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clk_div = ssp_get_clk_div(ssp, spi->max_speed_hz);
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clk_div = SSP1_SerClkDiv(spi->max_speed_hz);
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else if (drv_data->ioaddr == SSP2_VIRT)
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clk_div = SSP2_SerClkDiv(spi->max_speed_hz);
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else if (drv_data->ioaddr == SSP3_VIRT)
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clk_div = SSP3_SerClkDiv(spi->max_speed_hz);
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else
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{
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dev_err(&spi->dev, "failed setup: unknown IO address=0x%p\n",
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drv_data->ioaddr);
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return -ENODEV;
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}
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chip->speed_hz = spi->max_speed_hz;
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chip->speed_hz = spi->max_speed_hz;
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chip->cr0 = clk_div
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chip->cr0 = clk_div
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@ -1184,15 +1185,15 @@ static int setup(struct spi_device *spi)
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/* NOTE: PXA25x_SSP _could_ use external clocking ... */
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/* NOTE: PXA25x_SSP _could_ use external clocking ... */
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if (drv_data->ssp_type != PXA25x_SSP)
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if (drv_data->ssp_type != PXA25x_SSP)
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dev_dbg(&spi->dev, "%d bits/word, %d Hz, mode %d\n",
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dev_dbg(&spi->dev, "%d bits/word, %ld Hz, mode %d\n",
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spi->bits_per_word,
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spi->bits_per_word,
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(CLOCK_SPEED_HZ)
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clk_get_rate(ssp->clk)
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/ (1 + ((chip->cr0 & SSCR0_SCR) >> 8)),
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/ (1 + ((chip->cr0 & SSCR0_SCR) >> 8)),
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spi->mode & 0x3);
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spi->mode & 0x3);
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else
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else
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dev_dbg(&spi->dev, "%d bits/word, %d Hz, mode %d\n",
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dev_dbg(&spi->dev, "%d bits/word, %ld Hz, mode %d\n",
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spi->bits_per_word,
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spi->bits_per_word,
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(CLOCK_SPEED_HZ/2)
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clk_get_rate(ssp->clk)
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/ (1 + ((chip->cr0 & SSCR0_SCR) >> 8)),
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/ (1 + ((chip->cr0 & SSCR0_SCR) >> 8)),
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spi->mode & 0x3);
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spi->mode & 0x3);
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@ -1324,14 +1325,14 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
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struct pxa2xx_spi_master *platform_info;
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struct pxa2xx_spi_master *platform_info;
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struct spi_master *master;
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struct spi_master *master;
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struct driver_data *drv_data = 0;
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struct driver_data *drv_data = 0;
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struct resource *memory_resource;
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struct ssp_device *ssp;
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int irq;
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int status = 0;
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int status = 0;
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platform_info = dev->platform_data;
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platform_info = dev->platform_data;
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if (platform_info->ssp_type == SSP_UNDEFINED) {
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ssp = ssp_request(pdev->id, pdev->name);
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dev_err(&pdev->dev, "undefined SSP\n");
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if (ssp == NULL) {
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dev_err(&pdev->dev, "failed to request SSP%d\n", pdev->id);
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return -ENODEV;
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return -ENODEV;
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}
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}
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@ -1339,12 +1340,14 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
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master = spi_alloc_master(dev, sizeof(struct driver_data) + 16);
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master = spi_alloc_master(dev, sizeof(struct driver_data) + 16);
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if (!master) {
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if (!master) {
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dev_err(&pdev->dev, "can not alloc spi_master\n");
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dev_err(&pdev->dev, "can not alloc spi_master\n");
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ssp_free(ssp);
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return -ENOMEM;
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return -ENOMEM;
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}
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}
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drv_data = spi_master_get_devdata(master);
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drv_data = spi_master_get_devdata(master);
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drv_data->master = master;
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drv_data->master = master;
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drv_data->master_info = platform_info;
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drv_data->master_info = platform_info;
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drv_data->pdev = pdev;
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drv_data->pdev = pdev;
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drv_data->ssp = ssp;
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master->bus_num = pdev->id;
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master->bus_num = pdev->id;
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master->num_chipselect = platform_info->num_chipselect;
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master->num_chipselect = platform_info->num_chipselect;
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@ -1352,21 +1355,13 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
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master->setup = setup;
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master->setup = setup;
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master->transfer = transfer;
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master->transfer = transfer;
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drv_data->ssp_type = platform_info->ssp_type;
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drv_data->ssp_type = ssp->type;
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drv_data->null_dma_buf = (u32 *)ALIGN((u32)(drv_data +
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drv_data->null_dma_buf = (u32 *)ALIGN((u32)(drv_data +
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sizeof(struct driver_data)), 8);
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sizeof(struct driver_data)), 8);
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/* Setup register addresses */
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drv_data->ioaddr = ssp->mmio_base;
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memory_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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drv_data->ssdr_physical = ssp->phys_base + SSDR;
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if (!memory_resource) {
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if (ssp->type == PXA25x_SSP) {
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dev_err(&pdev->dev, "memory resources not defined\n");
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status = -ENODEV;
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goto out_error_master_alloc;
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}
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drv_data->ioaddr = (void *)io_p2v((unsigned long)(memory_resource->start));
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drv_data->ssdr_physical = memory_resource->start + 0x00000010;
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if (platform_info->ssp_type == PXA25x_SSP) {
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drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE;
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drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE;
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drv_data->dma_cr1 = 0;
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drv_data->dma_cr1 = 0;
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drv_data->clear_sr = SSSR_ROR;
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drv_data->clear_sr = SSSR_ROR;
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@ -1378,15 +1373,7 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
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drv_data->mask_sr = SSSR_TINT | SSSR_RFS | SSSR_TFS | SSSR_ROR;
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drv_data->mask_sr = SSSR_TINT | SSSR_RFS | SSSR_TFS | SSSR_ROR;
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}
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}
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/* Attach to IRQ */
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status = request_irq(ssp->irq, ssp_int, 0, dev->bus_id, drv_data);
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_err(&pdev->dev, "irq resource not defined\n");
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status = -ENODEV;
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goto out_error_master_alloc;
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}
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status = request_irq(irq, ssp_int, 0, dev->bus_id, drv_data);
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if (status < 0) {
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if (status < 0) {
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dev_err(&pdev->dev, "can not get IRQ\n");
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dev_err(&pdev->dev, "can not get IRQ\n");
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goto out_error_master_alloc;
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goto out_error_master_alloc;
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@ -1419,29 +1406,12 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
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goto out_error_dma_alloc;
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goto out_error_dma_alloc;
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}
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}
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if (drv_data->ioaddr == SSP1_VIRT) {
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DRCMR(ssp->drcmr_rx) = DRCMR_MAPVLD | drv_data->rx_channel;
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DRCMRRXSSDR = DRCMR_MAPVLD
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DRCMR(ssp->drcmr_tx) = DRCMR_MAPVLD | drv_data->tx_channel;
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| drv_data->rx_channel;
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DRCMRTXSSDR = DRCMR_MAPVLD
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| drv_data->tx_channel;
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} else if (drv_data->ioaddr == SSP2_VIRT) {
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DRCMRRXSS2DR = DRCMR_MAPVLD
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| drv_data->rx_channel;
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DRCMRTXSS2DR = DRCMR_MAPVLD
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| drv_data->tx_channel;
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} else if (drv_data->ioaddr == SSP3_VIRT) {
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DRCMRRXSS3DR = DRCMR_MAPVLD
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| drv_data->rx_channel;
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DRCMRTXSS3DR = DRCMR_MAPVLD
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| drv_data->tx_channel;
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} else {
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dev_err(dev, "bad SSP type\n");
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goto out_error_dma_alloc;
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}
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}
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}
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/* Enable SOC clock */
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/* Enable SOC clock */
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pxa_set_cken(platform_info->clock_enable, 1);
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clk_enable(ssp->clk);
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/* Load default SSP configuration */
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/* Load default SSP configuration */
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write_SSCR0(0, drv_data->ioaddr);
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write_SSCR0(0, drv_data->ioaddr);
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@ -1480,7 +1450,7 @@ out_error_queue_alloc:
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destroy_queue(drv_data);
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destroy_queue(drv_data);
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out_error_clock_enabled:
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out_error_clock_enabled:
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pxa_set_cken(platform_info->clock_enable, 0);
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clk_disable(ssp->clk);
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out_error_dma_alloc:
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out_error_dma_alloc:
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if (drv_data->tx_channel != -1)
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if (drv_data->tx_channel != -1)
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@ -1489,17 +1459,18 @@ out_error_dma_alloc:
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pxa_free_dma(drv_data->rx_channel);
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pxa_free_dma(drv_data->rx_channel);
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out_error_irq_alloc:
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out_error_irq_alloc:
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free_irq(irq, drv_data);
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free_irq(ssp->irq, drv_data);
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out_error_master_alloc:
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out_error_master_alloc:
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spi_master_put(master);
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spi_master_put(master);
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ssp_free(ssp);
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return status;
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return status;
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}
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}
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static int pxa2xx_spi_remove(struct platform_device *pdev)
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static int pxa2xx_spi_remove(struct platform_device *pdev)
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{
|
{
|
||||||
struct driver_data *drv_data = platform_get_drvdata(pdev);
|
struct driver_data *drv_data = platform_get_drvdata(pdev);
|
||||||
int irq;
|
struct ssp_device *ssp = drv_data->ssp;
|
||||||
int status = 0;
|
int status = 0;
|
||||||
|
|
||||||
if (!drv_data)
|
if (!drv_data)
|
||||||
@ -1521,28 +1492,21 @@ static int pxa2xx_spi_remove(struct platform_device *pdev)
|
|||||||
|
|
||||||
/* Disable the SSP at the peripheral and SOC level */
|
/* Disable the SSP at the peripheral and SOC level */
|
||||||
write_SSCR0(0, drv_data->ioaddr);
|
write_SSCR0(0, drv_data->ioaddr);
|
||||||
pxa_set_cken(drv_data->master_info->clock_enable, 0);
|
clk_disable(ssp->clk);
|
||||||
|
|
||||||
/* Release DMA */
|
/* Release DMA */
|
||||||
if (drv_data->master_info->enable_dma) {
|
if (drv_data->master_info->enable_dma) {
|
||||||
if (drv_data->ioaddr == SSP1_VIRT) {
|
DRCMR(ssp->drcmr_rx) = 0;
|
||||||
DRCMRRXSSDR = 0;
|
DRCMR(ssp->drcmr_tx) = 0;
|
||||||
DRCMRTXSSDR = 0;
|
|
||||||
} else if (drv_data->ioaddr == SSP2_VIRT) {
|
|
||||||
DRCMRRXSS2DR = 0;
|
|
||||||
DRCMRTXSS2DR = 0;
|
|
||||||
} else if (drv_data->ioaddr == SSP3_VIRT) {
|
|
||||||
DRCMRRXSS3DR = 0;
|
|
||||||
DRCMRTXSS3DR = 0;
|
|
||||||
}
|
|
||||||
pxa_free_dma(drv_data->tx_channel);
|
pxa_free_dma(drv_data->tx_channel);
|
||||||
pxa_free_dma(drv_data->rx_channel);
|
pxa_free_dma(drv_data->rx_channel);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Release IRQ */
|
/* Release IRQ */
|
||||||
irq = platform_get_irq(pdev, 0);
|
free_irq(ssp->irq, drv_data);
|
||||||
if (irq >= 0)
|
|
||||||
free_irq(irq, drv_data);
|
/* Release SSP */
|
||||||
|
ssp_free(ssp);
|
||||||
|
|
||||||
/* Disconnect from the SPI framework */
|
/* Disconnect from the SPI framework */
|
||||||
spi_unregister_master(drv_data->master);
|
spi_unregister_master(drv_data->master);
|
||||||
@ -1577,6 +1541,7 @@ static int suspend_devices(struct device *dev, void *pm_message)
|
|||||||
static int pxa2xx_spi_suspend(struct platform_device *pdev, pm_message_t state)
|
static int pxa2xx_spi_suspend(struct platform_device *pdev, pm_message_t state)
|
||||||
{
|
{
|
||||||
struct driver_data *drv_data = platform_get_drvdata(pdev);
|
struct driver_data *drv_data = platform_get_drvdata(pdev);
|
||||||
|
struct ssp_device *ssp = drv_data->ssp;
|
||||||
int status = 0;
|
int status = 0;
|
||||||
|
|
||||||
/* Check all childern for current power state */
|
/* Check all childern for current power state */
|
||||||
@ -1589,7 +1554,7 @@ static int pxa2xx_spi_suspend(struct platform_device *pdev, pm_message_t state)
|
|||||||
if (status != 0)
|
if (status != 0)
|
||||||
return status;
|
return status;
|
||||||
write_SSCR0(0, drv_data->ioaddr);
|
write_SSCR0(0, drv_data->ioaddr);
|
||||||
pxa_set_cken(drv_data->master_info->clock_enable, 0);
|
clk_disable(ssp->clk);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
@ -1597,10 +1562,11 @@ static int pxa2xx_spi_suspend(struct platform_device *pdev, pm_message_t state)
|
|||||||
static int pxa2xx_spi_resume(struct platform_device *pdev)
|
static int pxa2xx_spi_resume(struct platform_device *pdev)
|
||||||
{
|
{
|
||||||
struct driver_data *drv_data = platform_get_drvdata(pdev);
|
struct driver_data *drv_data = platform_get_drvdata(pdev);
|
||||||
|
struct ssp_device *ssp = drv_data->ssp;
|
||||||
int status = 0;
|
int status = 0;
|
||||||
|
|
||||||
/* Enable the SSP clock */
|
/* Enable the SSP clock */
|
||||||
pxa_set_cken(drv_data->master_info->clock_enable, 1);
|
clk_disable(ssp->clk);
|
||||||
|
|
||||||
/* Start the queue running */
|
/* Start the queue running */
|
||||||
status = start_queue(drv_data);
|
status = start_queue(drv_data);
|
||||||
|
@ -22,32 +22,8 @@
|
|||||||
#define PXA2XX_CS_ASSERT (0x01)
|
#define PXA2XX_CS_ASSERT (0x01)
|
||||||
#define PXA2XX_CS_DEASSERT (0x02)
|
#define PXA2XX_CS_DEASSERT (0x02)
|
||||||
|
|
||||||
#if defined(CONFIG_PXA25x)
|
|
||||||
#define CLOCK_SPEED_HZ 3686400
|
|
||||||
#define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/2/(x+1))<<8)&0x0000ff00)
|
|
||||||
#define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
|
|
||||||
#define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
|
|
||||||
#elif defined(CONFIG_PXA27x)
|
|
||||||
#define CLOCK_SPEED_HZ 13000000
|
|
||||||
#define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
|
|
||||||
#define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
|
|
||||||
#define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define SSP1_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(1)))))
|
|
||||||
#define SSP2_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(2)))))
|
|
||||||
#define SSP3_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(3)))))
|
|
||||||
|
|
||||||
enum pxa_ssp_type {
|
|
||||||
SSP_UNDEFINED = 0,
|
|
||||||
PXA25x_SSP, /* pxa 210, 250, 255, 26x */
|
|
||||||
PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
|
|
||||||
PXA27x_SSP,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* device.platform_data for SSP controller devices */
|
/* device.platform_data for SSP controller devices */
|
||||||
struct pxa2xx_spi_master {
|
struct pxa2xx_spi_master {
|
||||||
enum pxa_ssp_type ssp_type;
|
|
||||||
u32 clock_enable;
|
u32 clock_enable;
|
||||||
u16 num_chipselect;
|
u16 num_chipselect;
|
||||||
u8 enable_dma;
|
u8 enable_dma;
|
||||||
|
Loading…
Reference in New Issue
Block a user