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drm/i915/psr: Move intel_psr_disable_source() code to intel_psr_disable_locked()
In the past we had hooks to configure HW for VLV/CHV too, in the drop of VLV/CHV support the intel_psr_disable_source() code was not moved to the caller, so doing it here. Suggested-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181106190843.18009-4-jose.souza@intel.com
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@ -680,13 +680,20 @@ static void intel_psr_exit(struct drm_i915_private *dev_priv)
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dev_priv->psr.active = false;
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dev_priv->psr.active = false;
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}
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}
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static void
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static void intel_psr_disable_locked(struct intel_dp *intel_dp)
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intel_psr_disable_source(struct intel_dp *intel_dp)
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{
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{
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struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
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struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
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i915_reg_t psr_status;
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i915_reg_t psr_status;
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u32 psr_status_mask;
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u32 psr_status_mask;
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lockdep_assert_held(&dev_priv->psr.lock);
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if (!dev_priv->psr.enabled)
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return;
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DRM_DEBUG_KMS("Disabling PSR%s\n",
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dev_priv->psr.psr2_enabled ? "2" : "1");
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intel_psr_exit(dev_priv);
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intel_psr_exit(dev_priv);
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if (dev_priv->psr.psr2_enabled) {
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if (dev_priv->psr.psr2_enabled) {
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@ -701,20 +708,6 @@ intel_psr_disable_source(struct intel_dp *intel_dp)
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if (intel_wait_for_register(dev_priv, psr_status, psr_status_mask, 0,
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if (intel_wait_for_register(dev_priv, psr_status, psr_status_mask, 0,
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2000))
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2000))
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DRM_ERROR("Timed out waiting PSR idle state\n");
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DRM_ERROR("Timed out waiting PSR idle state\n");
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}
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static void intel_psr_disable_locked(struct intel_dp *intel_dp)
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{
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struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
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lockdep_assert_held(&dev_priv->psr.lock);
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if (!dev_priv->psr.enabled)
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return;
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DRM_DEBUG_KMS("Disabling PSR%s\n",
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dev_priv->psr.psr2_enabled ? "2" : "1");
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intel_psr_disable_source(intel_dp);
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/* Disable PSR on Sink */
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/* Disable PSR on Sink */
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drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
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drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
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