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powerpc/mm: Move common pte bits and accessors to book3s/64/pgtable.h
Now that we have moved book3s hash64 Linux pte bits to match Power ISA 3.0 radix pte bit positions, we move the matching pte bits to a common header. Only code movement in this patch. No functionality change. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Aneesh Kumar K.V
Michael Ellerman
parent
d2cf005038
commit
2e8735198a
@ -13,54 +13,12 @@
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* We could create separate kernel read-only if we used the 3 PP bits
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* combinations that newer processors provide but we currently don't.
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*/
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#define _PAGE_BIT_SWAP_TYPE 0
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#define _PAGE_EXEC 0x00001 /* execute permission */
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#define _PAGE_WRITE 0x00002 /* write access allowed */
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#define _PAGE_READ 0x00004 /* read access allowed */
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#define _PAGE_RW (_PAGE_READ | _PAGE_WRITE)
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#define _PAGE_RWX (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC)
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#define _PAGE_PRIVILEGED 0x00008 /* kernel access only */
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#define _PAGE_SAO 0x00010 /* Strong access order */
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#define _PAGE_NON_IDEMPOTENT 0x00020 /* non idempotent memory */
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#define _PAGE_TOLERANT 0x00030 /* tolerant memory, cache inhibited */
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#define _PAGE_DIRTY 0x00080 /* C: page changed */
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#define _PAGE_ACCESSED 0x00100 /* R: page referenced */
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/*
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* Software bits
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*/
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#ifdef CONFIG_MEM_SOFT_DIRTY
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#define _PAGE_SOFT_DIRTY 0x00200 /* software: software dirty tracking */
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#else
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#define _PAGE_SOFT_DIRTY 0x00000
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#endif
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#define _PAGE_SPECIAL 0x00400 /* software: special page */
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#define H_PAGE_BUSY 0x00800 /* software: PTE & hash are busy */
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#define H_PTE_NONE_MASK _PAGE_HPTEFLAGS
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#define H_PAGE_F_GIX_SHIFT 57
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#define H_PAGE_F_GIX (7ul << 57) /* HPTE index within HPTEG */
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#define H_PAGE_F_SECOND (1ul << 60) /* HPTE is in 2ndary HPTEG */
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#define H_PAGE_HASHPTE (1ul << 61) /* PTE has associated HPTE */
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#define _PAGE_PTE (1ul << 62) /* distinguishes PTEs from pointers */
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#define _PAGE_PRESENT (1ul << 63) /* pte contains a translation */
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/*
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* Drivers request for cache inhibited pte mapping using _PAGE_NO_CACHE
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* Instead of fixing all of them, add an alternate define which
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* maps CI pte mapping.
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*/
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#define _PAGE_NO_CACHE _PAGE_TOLERANT
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/*
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* We support 57 bit real address in pte. Clear everything above 57, and
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* every thing below PAGE_SHIFT;
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*/
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#define PTE_RPN_MASK (((1UL << 57) - 1) & (PAGE_MASK))
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/*
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* set of bits not changed in pmd_modify.
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*/
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#define _HPAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
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_PAGE_ACCESSED | H_PAGE_THP_HUGE | _PAGE_PTE | \
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_PAGE_SOFT_DIRTY)
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#ifdef CONFIG_PPC_64K_PAGES
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#include <asm/book3s/64/hash-64k.h>
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@ -118,105 +76,11 @@
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#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
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#endif /* CONFIG_PPC_MM_SLICES */
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/*
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* user access blocked by key
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*/
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#define _PAGE_KERNEL_RW (_PAGE_PRIVILEGED | _PAGE_RW | _PAGE_DIRTY)
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#define _PAGE_KERNEL_RO (_PAGE_PRIVILEGED | _PAGE_READ)
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#define _PAGE_KERNEL_RWX (_PAGE_PRIVILEGED | _PAGE_DIRTY | \
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_PAGE_RW | _PAGE_EXEC)
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/* No page size encoding in the linux PTE */
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#define _PAGE_PSIZE 0
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/* PTEIDX nibble */
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#define _PTEIDX_SECONDARY 0x8
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#define _PTEIDX_GROUP_IX 0x7
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/*
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* _PAGE_CHG_MASK masks of bits that are to be preserved across
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* pgprot changes
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*/
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#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
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_PAGE_ACCESSED | _PAGE_SPECIAL | _PAGE_PTE | \
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_PAGE_SOFT_DIRTY)
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/*
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* Mask of bits returned by pte_pgprot()
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*/
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#define PAGE_PROT_BITS (_PAGE_SAO | _PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT | \
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H_PAGE_4K_PFN | _PAGE_PRIVILEGED | _PAGE_ACCESSED | \
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_PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_EXEC | \
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_PAGE_SOFT_DIRTY)
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/*
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* We define 2 sets of base prot bits, one for basic pages (ie,
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* cacheable kernel and user pages) and one for non cacheable
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* pages. We always set _PAGE_COHERENT when SMP is enabled or
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* the processor might need it for DMA coherency.
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*/
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#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
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#define _PAGE_BASE (_PAGE_BASE_NC)
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/* Permission masks used to generate the __P and __S table,
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*
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* Note:__pgprot is defined in arch/powerpc/include/asm/page.h
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*
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* Write permissions imply read permissions for now (we could make write-only
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* pages on BookE but we don't bother for now). Execute permission control is
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* possible on platforms that define _PAGE_EXEC
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*
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* Note due to the way vm flags are laid out, the bits are XWR
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*/
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#define PAGE_NONE __pgprot(_PAGE_BASE | _PAGE_PRIVILEGED)
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#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW)
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#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_EXEC)
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#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_READ)
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#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
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#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_READ)
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#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
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#define __P000 PAGE_NONE
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#define __P001 PAGE_READONLY
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#define __P010 PAGE_COPY
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#define __P011 PAGE_COPY
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#define __P100 PAGE_READONLY_X
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#define __P101 PAGE_READONLY_X
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#define __P110 PAGE_COPY_X
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#define __P111 PAGE_COPY_X
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#define __S000 PAGE_NONE
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#define __S001 PAGE_READONLY
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#define __S010 PAGE_SHARED
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#define __S011 PAGE_SHARED
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#define __S100 PAGE_READONLY_X
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#define __S101 PAGE_READONLY_X
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#define __S110 PAGE_SHARED_X
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#define __S111 PAGE_SHARED_X
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/* Permission masks used for kernel mappings */
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#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
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#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
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_PAGE_TOLERANT)
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#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
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_PAGE_NON_IDEMPOTENT)
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#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
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#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
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#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
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/* Protection used for kernel text. We want the debuggers to be able to
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* set breakpoints anywhere, so don't write protect the kernel text
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* on platforms where such control is possible.
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*/
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#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
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defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
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#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
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#else
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#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
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#endif
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/* Make modules code happy. We don't set RO yet */
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#define PAGE_KERNEL_EXEC PAGE_KERNEL_X
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#define PAGE_AGP (PAGE_KERNEL_NC)
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#define PMD_BAD_BITS (PTE_TABLE_SIZE-1)
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#define PUD_BAD_BITS (PMD_TABLE_SIZE-1)
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@ -1,9 +1,148 @@
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#ifndef _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
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#define _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
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/*
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* This file contains the functions and defines necessary to modify and use
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* the ppc64 hashed page table.
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* Common bits between hash and Radix page table
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*/
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#define _PAGE_BIT_SWAP_TYPE 0
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#define _PAGE_EXEC 0x00001 /* execute permission */
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#define _PAGE_WRITE 0x00002 /* write access allowed */
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#define _PAGE_READ 0x00004 /* read access allowed */
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#define _PAGE_RW (_PAGE_READ | _PAGE_WRITE)
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#define _PAGE_RWX (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC)
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#define _PAGE_PRIVILEGED 0x00008 /* kernel access only */
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#define _PAGE_SAO 0x00010 /* Strong access order */
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#define _PAGE_NON_IDEMPOTENT 0x00020 /* non idempotent memory */
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#define _PAGE_TOLERANT 0x00030 /* tolerant memory, cache inhibited */
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#define _PAGE_DIRTY 0x00080 /* C: page changed */
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#define _PAGE_ACCESSED 0x00100 /* R: page referenced */
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/*
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* Software bits
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*/
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#ifdef CONFIG_MEM_SOFT_DIRTY
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#define _PAGE_SOFT_DIRTY 0x00200 /* software: software dirty tracking */
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#else
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#define _PAGE_SOFT_DIRTY 0x00000
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#endif
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#define _PAGE_SPECIAL 0x00400 /* software: special page */
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#define _PAGE_PTE (1ul << 62) /* distinguishes PTEs from pointers */
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#define _PAGE_PRESENT (1ul << 63) /* pte contains a translation */
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/*
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* Drivers request for cache inhibited pte mapping using _PAGE_NO_CACHE
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* Instead of fixing all of them, add an alternate define which
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* maps CI pte mapping.
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*/
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#define _PAGE_NO_CACHE _PAGE_TOLERANT
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/*
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* We support 57 bit real address in pte. Clear everything above 57, and
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* every thing below PAGE_SHIFT;
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*/
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#define PTE_RPN_MASK (((1UL << 57) - 1) & (PAGE_MASK))
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/*
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* set of bits not changed in pmd_modify. Even though we have hash specific bits
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* in here, on radix we expect them to be zero.
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*/
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#define _HPAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
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_PAGE_ACCESSED | H_PAGE_THP_HUGE | _PAGE_PTE | \
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_PAGE_SOFT_DIRTY)
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/*
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* user access blocked by key
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*/
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#define _PAGE_KERNEL_RW (_PAGE_PRIVILEGED | _PAGE_RW | _PAGE_DIRTY)
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#define _PAGE_KERNEL_RO (_PAGE_PRIVILEGED | _PAGE_READ)
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#define _PAGE_KERNEL_RWX (_PAGE_PRIVILEGED | _PAGE_DIRTY | \
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_PAGE_RW | _PAGE_EXEC)
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/*
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* No page size encoding in the linux PTE
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*/
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#define _PAGE_PSIZE 0
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/*
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* _PAGE_CHG_MASK masks of bits that are to be preserved across
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* pgprot changes
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*/
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#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
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_PAGE_ACCESSED | _PAGE_SPECIAL | _PAGE_PTE | \
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_PAGE_SOFT_DIRTY)
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/*
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* Mask of bits returned by pte_pgprot()
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*/
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#define PAGE_PROT_BITS (_PAGE_SAO | _PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT | \
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H_PAGE_4K_PFN | _PAGE_PRIVILEGED | _PAGE_ACCESSED | \
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_PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_EXEC | \
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_PAGE_SOFT_DIRTY)
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/*
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* We define 2 sets of base prot bits, one for basic pages (ie,
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* cacheable kernel and user pages) and one for non cacheable
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* pages. We always set _PAGE_COHERENT when SMP is enabled or
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* the processor might need it for DMA coherency.
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*/
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#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
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#define _PAGE_BASE (_PAGE_BASE_NC)
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/* Permission masks used to generate the __P and __S table,
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*
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* Note:__pgprot is defined in arch/powerpc/include/asm/page.h
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*
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* Write permissions imply read permissions for now (we could make write-only
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* pages on BookE but we don't bother for now). Execute permission control is
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* possible on platforms that define _PAGE_EXEC
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*
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* Note due to the way vm flags are laid out, the bits are XWR
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*/
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#define PAGE_NONE __pgprot(_PAGE_BASE | _PAGE_PRIVILEGED)
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#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW)
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#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_EXEC)
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#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_READ)
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#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
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#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_READ)
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#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
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#define __P000 PAGE_NONE
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#define __P001 PAGE_READONLY
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#define __P010 PAGE_COPY
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#define __P011 PAGE_COPY
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#define __P100 PAGE_READONLY_X
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#define __P101 PAGE_READONLY_X
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#define __P110 PAGE_COPY_X
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#define __P111 PAGE_COPY_X
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#define __S000 PAGE_NONE
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#define __S001 PAGE_READONLY
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#define __S010 PAGE_SHARED
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#define __S011 PAGE_SHARED
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#define __S100 PAGE_READONLY_X
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#define __S101 PAGE_READONLY_X
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#define __S110 PAGE_SHARED_X
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#define __S111 PAGE_SHARED_X
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/* Permission masks used for kernel mappings */
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#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
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#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
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_PAGE_TOLERANT)
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#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
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_PAGE_NON_IDEMPOTENT)
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#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
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#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
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#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
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/*
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* Protection used for kernel text. We want the debuggers to be able to
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* set breakpoints anywhere, so don't write protect the kernel text
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* on platforms where such control is possible.
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*/
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#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) || \
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defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
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#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
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#else
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#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
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#endif
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/* Make modules code happy. We don't set RO yet */
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#define PAGE_KERNEL_EXEC PAGE_KERNEL_X
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#define PAGE_AGP (PAGE_KERNEL_NC)
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#include <asm/book3s/64/hash.h>
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#include <asm/barrier.h>
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