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PCI updates for v3.17:
Enumeration - Revert "PCI: Don't scan random busses in pci_scan_bridge()" (Bjorn Helgaas) - Revert "PCI: Make sure bus number resources stay within their parents bounds" (Bjorn Helgaas) PCI device hotplug - Fix pciehp pcie_wait_cmd() timeout (Yinghai Lu) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUIunLAAoJEFmIoMA60/r80pwQAJSIBhVBlxF2RkygVd6SPmDz Kbj1tCl1A/xyytGhzD1axL170Ead77iUi3E286Qra1kw+0bL8mFStlqnJtIVhLMO jQWnwk2/47ZvINDZ12RxjQfIqgWQojy6i+Rj9Nm/iQl+A/zTstaMph/IBDbSOsfa ZodpXreyO5Ryn0j+U/1M+h6fMf+jT7tvD1WbN/Qa1OaN731UKRbTCl5yewxdt5h5 SlNr6xrPBzubq79YzXIuDj+LujnaPLmylFtXw8q36n3ZVDTeAH7yHNuK5dH0an3x 2k+CxNI/8+PWDF7whq/SqwBC03hagCy/D712qv23aPv5vqAT2mVMxCP90EJHHzsd /sKbb8H5qVzqxJseAc8JaA+2d9HEPEzHhNjmKsUwukTtPYnTFCNa8EErUV988KdV mC0Brp4kFHI+JnV7NTAS0gCZ2tdqNiX+rG/OWyKiC5BY66GlFE9g7s5Du6RrRY2n XBkcrJr/oH9C+evOLZszXk+nLBJKTpLkdPCApbB2b/tjvddurJnXj2PndVPbr+wH cVF2ufafWmAPL401OhvewjEq//C06/K1D/dd9oM9EreDjFUWuXw6bPbYtu+1Mzk7 jjp7hKPMjjBJPhMp7LUsHNOqdUWzn+rpT6sMNUtfq0nfOXFBk/KTe+NXjbN5CY2B qKw+h7wbPdVwsWi/ZhZe =qP+Z -----END PGP SIGNATURE----- Merge tag 'pci-v3.17-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI fixes from Bjorn Helgaas: "Here are a few fixes that should be in v3.17. - Reverting "Don't scan random busses" covers up a CardBus regression having to do with allocating CardBus bus numbers. - Reverting "Make sure bus numbers stay within parents bounds" covers up an ACPI _CRS bug that makes us reconfigure a bridge, causing a broken device behind it to stop responding. - The pciehp timeout change fixes some code we added in v3.17. Without the fix, we can send a new hotplug command too early, before the timeout has expired. I hope for better fixes for the reverts, but those will have to come after v3.17" * tag 'pci-v3.17-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: pciehp: Fix pcie_wait_cmd() timeout Revert "PCI: Make sure bus number resources stay within their parents bounds" Revert "PCI: Don't scan random busses in pci_scan_bridge()"
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commit
2d7ed01e5b
@ -160,7 +160,7 @@ static void pcie_wait_cmd(struct controller *ctrl)
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ctrl->slot_ctrl & PCI_EXP_SLTCTL_CCIE)
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rc = wait_event_timeout(ctrl->queue, !ctrl->cmd_busy, timeout);
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else
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rc = pcie_poll_cmd(ctrl, timeout);
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rc = pcie_poll_cmd(ctrl, jiffies_to_msecs(timeout));
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/*
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* Controllers with errata like Intel CF118 don't generate
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@ -775,7 +775,7 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
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/* Check if setup is sensible at all */
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if (!pass &&
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(primary != bus->number || secondary <= bus->number ||
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secondary > subordinate || subordinate > bus->busn_res.end)) {
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secondary > subordinate)) {
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dev_info(&dev->dev, "bridge configuration invalid ([bus %02x-%02x]), reconfiguring\n",
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secondary, subordinate);
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broken = 1;
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@ -838,23 +838,18 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
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goto out;
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}
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if (max >= bus->busn_res.end) {
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dev_warn(&dev->dev, "can't allocate child bus %02x from %pR\n",
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max, &bus->busn_res);
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goto out;
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}
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/* Clear errors */
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pci_write_config_word(dev, PCI_STATUS, 0xffff);
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/* The bus will already exist if we are rescanning */
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/* Prevent assigning a bus number that already exists.
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* This can happen when a bridge is hot-plugged, so in
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* this case we only re-scan this bus. */
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child = pci_find_bus(pci_domain_nr(bus), max+1);
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if (!child) {
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child = pci_add_new_bus(bus, dev, max+1);
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if (!child)
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goto out;
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pci_bus_insert_busn_res(child, max+1,
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bus->busn_res.end);
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pci_bus_insert_busn_res(child, max+1, 0xff);
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}
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max++;
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buses = (buses & 0xff000000)
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@ -913,11 +908,6 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
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/*
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* Set the subordinate bus number to its real value.
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*/
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if (max > bus->busn_res.end) {
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dev_warn(&dev->dev, "max busn %02x is outside %pR\n",
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max, &bus->busn_res);
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max = bus->busn_res.end;
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}
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pci_bus_update_busn_res_end(child, max);
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pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);
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}
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