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dmaengine: hsu: allow more than 3 descriptors

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Current code allows only up to 3 descriptors to be programmed to the hardware
since it is used wrong calculations. Change % to min_t() to allow as many
descriptors as user supplied. At once it could be programmed up to 4
descriptors due to hardware limitations.

The issue was found under stress test, so it might not bother ordinary users.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
Andy Shevchenko 2016-03-18 14:26:34 +02:00 committed by Vinod Koul
parent f55532a0c0
commit 2d4d689f3e
1 changed files with 2 additions and 2 deletions
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4
drivers/dma/hsu/hsu.c
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@ -77,8 +77,8 @@ static void hsu_dma_chan_start(struct hsu_dma_chan *hsuc)
hsu_chan_writel(hsuc, HSU_CH_MTSR, mtsr); hsu_chan_writel(hsuc, HSU_CH_MTSR, mtsr);
/* Set descriptors */ /* Set descriptors */
count = (desc->nents - desc->active) % HSU_DMA_CHAN_NR_DESC; count = desc->nents - desc->active;
for (i = 0; i < count; i++) { for (i = 0; i < count && i < HSU_DMA_CHAN_NR_DESC; i++) {
hsu_chan_writel(hsuc, HSU_CH_DxSAR(i), desc->sg[i].addr); hsu_chan_writel(hsuc, HSU_CH_DxSAR(i), desc->sg[i].addr);
hsu_chan_writel(hsuc, HSU_CH_DxTSR(i), desc->sg[i].len); hsu_chan_writel(hsuc, HSU_CH_DxTSR(i), desc->sg[i].len);