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tty: serial: use uart_port_tx() helper
uart_port_tx() is a new helper to send characters to the device. Use it in these drivers. Cc: Tobias Klauser <tklauser@distanz.ch> Cc: Richard Genoud <richard.genoud@gmail.com> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Claudiu Beznea <claudiu.beznea@microchip.com> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: "Andreas Färber" <afaerber@suse.de> Cc: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org> Link: https://lore.kernel.org/r/20221004104927.14361-3-jirislaby@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
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8275b48b27
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2d141e683e
@ -247,31 +247,12 @@ static void altera_uart_rx_chars(struct uart_port *port)
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static void altera_uart_tx_chars(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->state->xmit;
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u8 ch;
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if (port->x_char) {
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/* Send special char - probably flow control */
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altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
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port->x_char = 0;
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port->icount.tx++;
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return;
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}
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while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
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ALTERA_UART_STATUS_TRDY_MSK) {
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if (xmit->head == xmit->tail)
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break;
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altera_uart_writel(port, xmit->buf[xmit->tail],
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ALTERA_UART_TXDATA_REG);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit))
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altera_uart_stop_tx(port);
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uart_port_tx(port, ch,
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altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
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ALTERA_UART_STATUS_TRDY_MSK,
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altera_uart_writel(port, ch, ALTERA_UART_TXDATA_REG));
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}
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static irqreturn_t altera_uart_interrupt(int irq, void *data)
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@ -824,30 +824,14 @@ static void atmel_rx_chars(struct uart_port *port)
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*/
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static void atmel_tx_chars(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->state->xmit;
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struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
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bool pending;
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u8 ch;
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if (port->x_char &&
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(atmel_uart_readl(port, ATMEL_US_CSR) & ATMEL_US_TXRDY)) {
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atmel_uart_write_char(port, port->x_char);
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port->icount.tx++;
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port->x_char = 0;
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}
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if (uart_circ_empty(xmit) || uart_tx_stopped(port))
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return;
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while (atmel_uart_readl(port, ATMEL_US_CSR) & ATMEL_US_TXRDY) {
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atmel_uart_write_char(port, xmit->buf[xmit->tail]);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (!uart_circ_empty(xmit)) {
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pending = uart_port_tx(port, ch,
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atmel_uart_readl(port, ATMEL_US_CSR) & ATMEL_US_TXRDY,
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atmel_uart_write_char(port, ch));
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if (pending) {
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/* we still have characters to transmit, so we should continue
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* transmitting them when TX is ready, regardless of
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* mode or duplexity
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@ -742,32 +742,12 @@ static int lpuart32_poll_get_char(struct uart_port *port)
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static inline void lpuart_transmit_buffer(struct lpuart_port *sport)
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{
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struct circ_buf *xmit = &sport->port.state->xmit;
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struct uart_port *port = &sport->port;
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u8 ch;
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if (sport->port.x_char) {
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writeb(sport->port.x_char, sport->port.membase + UARTDR);
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sport->port.icount.tx++;
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sport->port.x_char = 0;
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return;
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}
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if (lpuart_stopped_or_empty(&sport->port)) {
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lpuart_stop_tx(&sport->port);
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return;
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}
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while (!uart_circ_empty(xmit) &&
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(readb(sport->port.membase + UARTTCFIFO) < sport->txfifo_size)) {
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writeb(xmit->buf[xmit->tail], sport->port.membase + UARTDR);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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sport->port.icount.tx++;
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(&sport->port);
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if (uart_circ_empty(xmit))
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lpuart_stop_tx(&sport->port);
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uart_port_tx(port, ch,
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readb(port->membase + UARTTCFIFO) < sport->txfifo_size,
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writeb(ch, port->membase + UARTDR));
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}
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static inline void lpuart32_transmit_buffer(struct lpuart_port *sport)
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@ -95,7 +95,6 @@
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#define ASCFSTAT_TXFFLMASK 0x3F00
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#define ASCFSTAT_TXFREEMASK 0x3F000000
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static void lqasc_tx_chars(struct uart_port *port);
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static struct ltq_uart_port *lqasc_port[MAXPORTS];
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static struct uart_driver lqasc_reg;
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@ -151,9 +150,12 @@ lqasc_start_tx(struct uart_port *port)
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{
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unsigned long flags;
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struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
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u8 ch;
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spin_lock_irqsave(<q_port->lock, flags);
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lqasc_tx_chars(port);
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uart_port_tx(port, ch,
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lqasc_tx_ready(port),
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writeb(ch, port->membase + LTQ_ASC_TBUF));
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spin_unlock_irqrestore(<q_port->lock, flags);
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return;
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}
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@ -226,36 +228,6 @@ lqasc_rx_chars(struct uart_port *port)
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return 0;
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}
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static void
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lqasc_tx_chars(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->state->xmit;
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if (uart_tx_stopped(port)) {
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lqasc_stop_tx(port);
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return;
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}
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while (lqasc_tx_ready(port)) {
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if (port->x_char) {
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writeb(port->x_char, port->membase + LTQ_ASC_TBUF);
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port->icount.tx++;
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port->x_char = 0;
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continue;
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}
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if (uart_circ_empty(xmit))
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break;
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writeb(port->state->xmit.buf[port->state->xmit.tail],
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port->membase + LTQ_ASC_TBUF);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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}
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static irqreturn_t
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lqasc_tx_int(int irq, void *_port)
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{
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@ -276,8 +276,6 @@ static void __serial_lpc32xx_rx(struct uart_port *port)
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tty_flip_buffer_push(tport);
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}
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static void serial_lpc32xx_stop_tx(struct uart_port *port);
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static bool serial_lpc32xx_tx_ready(struct uart_port *port)
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{
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u32 level = readl(LPC32XX_HSUART_LEVEL(port->membase));
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@ -287,34 +285,11 @@ static bool serial_lpc32xx_tx_ready(struct uart_port *port)
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static void __serial_lpc32xx_tx(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->state->xmit;
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u8 ch;
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if (port->x_char) {
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writel((u32)port->x_char, LPC32XX_HSUART_FIFO(port->membase));
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port->icount.tx++;
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port->x_char = 0;
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return;
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}
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if (uart_circ_empty(xmit) || uart_tx_stopped(port))
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goto exit_tx;
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/* Transfer data */
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while (serial_lpc32xx_tx_ready(port)) {
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writel((u32) xmit->buf[xmit->tail],
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LPC32XX_HSUART_FIFO(port->membase));
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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exit_tx:
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if (uart_circ_empty(xmit))
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serial_lpc32xx_stop_tx(port);
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uart_port_tx(port, ch,
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serial_lpc32xx_tx_ready(port),
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writel(ch, LPC32XX_HSUART_FIFO(port->membase)));
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}
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static irqreturn_t serial_lpc32xx_interrupt(int irq, void *dev_id)
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static void mcf_tx_chars(struct mcf_uart *pp)
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{
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struct uart_port *port = &pp->port;
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struct circ_buf *xmit = &port->state->xmit;
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bool pending;
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u8 ch;
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if (port->x_char) {
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/* Send special char - probably flow control */
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writeb(port->x_char, port->membase + MCFUART_UTB);
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port->x_char = 0;
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port->icount.tx++;
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return;
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}
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pending = uart_port_tx(port, ch,
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readb(port->membase + MCFUART_USR) & MCFUART_USR_TXREADY,
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writeb(ch, port->membase + MCFUART_UTB));
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while (readb(port->membase + MCFUART_USR) & MCFUART_USR_TXREADY) {
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if (uart_circ_empty(xmit))
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break;
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writeb(xmit->buf[xmit->tail], port->membase + MCFUART_UTB);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE -1);
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port->icount.tx++;
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit)) {
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mcf_stop_tx(port);
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/* Disable TX to negate RTS automatically */
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if (port->rs485.flags & SER_RS485_ENABLED)
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writeb(MCFUART_UCR_TXDISABLE,
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port->membase + MCFUART_UCR);
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}
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/* Disable TX to negate RTS automatically */
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if (!pending && (port->rs485.flags & SER_RS485_ENABLED))
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writeb(MCFUART_UCR_TXDISABLE, port->membase + MCFUART_UCR);
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}
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/****************************************************************************/
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static inline bool
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mpc52xx_uart_int_tx_chars(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->state->xmit;
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u8 ch;
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/* Process out of band chars */
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if (port->x_char) {
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psc_ops->write_char(port, port->x_char);
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port->icount.tx++;
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port->x_char = 0;
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return true;
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}
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/* Nothing to do ? */
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if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
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mpc52xx_uart_stop_tx(port);
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return false;
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}
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/* Send chars */
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while (psc_ops->raw_tx_rdy(port)) {
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psc_ops->write_char(port, xmit->buf[xmit->tail]);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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}
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/* Wake up */
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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/* Maybe we're done after all */
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if (uart_circ_empty(xmit)) {
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mpc52xx_uart_stop_tx(port);
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return false;
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}
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return true;
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return uart_port_tx(port, ch,
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psc_ops->raw_tx_rdy(port),
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psc_ops->write_char(port, ch));
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}
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static irqreturn_t
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@ -129,29 +129,11 @@ static void mps2_uart_stop_tx(struct uart_port *port)
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static void mps2_uart_tx_chars(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->state->xmit;
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u8 ch;
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while (!(mps2_uart_read8(port, UARTn_STATE) & UARTn_STATE_TX_FULL)) {
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if (port->x_char) {
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mps2_uart_write8(port, port->x_char, UARTn_DATA);
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port->x_char = 0;
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port->icount.tx++;
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continue;
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}
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if (uart_circ_empty(xmit) || uart_tx_stopped(port))
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break;
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mps2_uart_write8(port, xmit->buf[xmit->tail], UARTn_DATA);
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xmit->tail = (xmit->tail + 1) % UART_XMIT_SIZE;
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port->icount.tx++;
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit))
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mps2_uart_stop_tx(port);
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uart_port_tx(port, ch,
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mps2_uart_tx_empty(port),
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mps2_uart_write8(port, ch, UARTn_DATA));
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}
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static void mps2_uart_start_tx(struct uart_port *port)
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@ -569,6 +569,8 @@ static int mxs_auart_dma_tx(struct mxs_auart_port *s, int size)
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static void mxs_auart_tx_chars(struct mxs_auart_port *s)
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{
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struct circ_buf *xmit = &s->port.state->xmit;
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bool pending;
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u8 ch;
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if (auart_dma_enabled(s)) {
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u32 i = 0;
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@ -603,31 +605,13 @@ static void mxs_auart_tx_chars(struct mxs_auart_port *s)
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return;
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}
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while (!(mxs_read(s, REG_STAT) & AUART_STAT_TXFF)) {
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if (s->port.x_char) {
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s->port.icount.tx++;
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mxs_write(s->port.x_char, s, REG_DATA);
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s->port.x_char = 0;
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continue;
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}
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if (!uart_circ_empty(xmit) && !uart_tx_stopped(&s->port)) {
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s->port.icount.tx++;
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mxs_write(xmit->buf[xmit->tail], s, REG_DATA);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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} else
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break;
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(&s->port);
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if (uart_circ_empty(&(s->port.state->xmit)))
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mxs_clr(AUART_INTR_TXIEN, s, REG_INTR);
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else
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pending = uart_port_tx(&s->port, ch,
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!(mxs_read(s, REG_STAT) & AUART_STAT_TXFF),
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mxs_write(ch, s, REG_DATA));
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if (pending)
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mxs_set(AUART_INTR_TXIEN, s, REG_INTR);
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if (uart_tx_stopped(&s->port))
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mxs_auart_stop_tx(&s->port);
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else
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mxs_clr(AUART_INTR_TXIEN, s, REG_INTR);
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}
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static void mxs_auart_rx_char(struct mxs_auart_port *s)
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@ -181,35 +181,11 @@ static void owl_uart_start_tx(struct uart_port *port)
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static void owl_uart_send_chars(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->state->xmit;
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unsigned int ch;
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u8 ch;
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if (port->x_char) {
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while (!(owl_uart_read(port, OWL_UART_STAT) & OWL_UART_STAT_TFFU))
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cpu_relax();
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owl_uart_write(port, port->x_char, OWL_UART_TXDAT);
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port->icount.tx++;
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port->x_char = 0;
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}
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if (uart_tx_stopped(port))
|
||||
return;
|
||||
|
||||
while (!(owl_uart_read(port, OWL_UART_STAT) & OWL_UART_STAT_TFFU)) {
|
||||
if (uart_circ_empty(xmit))
|
||||
break;
|
||||
|
||||
ch = xmit->buf[xmit->tail];
|
||||
owl_uart_write(port, ch, OWL_UART_TXDAT);
|
||||
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
|
||||
port->icount.tx++;
|
||||
}
|
||||
|
||||
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
|
||||
uart_write_wakeup(port);
|
||||
|
||||
if (uart_circ_empty(xmit))
|
||||
owl_uart_stop_tx(port);
|
||||
uart_port_tx(port, ch,
|
||||
!(owl_uart_read(port, OWL_UART_STAT) & OWL_UART_STAT_TFFU),
|
||||
owl_uart_write(port, ch, OWL_UART_TXDAT));
|
||||
}
|
||||
|
||||
static void owl_uart_receive_chars(struct uart_port *port)
|
||||
|
@ -228,14 +228,7 @@ sa1100_rx_chars(struct sa1100_port *sport)
|
||||
|
||||
static void sa1100_tx_chars(struct sa1100_port *sport)
|
||||
{
|
||||
struct circ_buf *xmit = &sport->port.state->xmit;
|
||||
|
||||
if (sport->port.x_char) {
|
||||
UART_PUT_CHAR(sport, sport->port.x_char);
|
||||
sport->port.icount.tx++;
|
||||
sport->port.x_char = 0;
|
||||
return;
|
||||
}
|
||||
u8 ch;
|
||||
|
||||
/*
|
||||
* Check the modem control lines before
|
||||
@ -243,28 +236,9 @@ static void sa1100_tx_chars(struct sa1100_port *sport)
|
||||
*/
|
||||
sa1100_mctrl_check(sport);
|
||||
|
||||
if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
|
||||
sa1100_stop_tx(&sport->port);
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* Tried using FIFO (not checking TNF) for fifo fill:
|
||||
* still had the '4 bytes repeated' problem.
|
||||
*/
|
||||
while (UART_GET_UTSR1(sport) & UTSR1_TNF) {
|
||||
UART_PUT_CHAR(sport, xmit->buf[xmit->tail]);
|
||||
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
|
||||
sport->port.icount.tx++;
|
||||
if (uart_circ_empty(xmit))
|
||||
break;
|
||||
}
|
||||
|
||||
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
|
||||
uart_write_wakeup(&sport->port);
|
||||
|
||||
if (uart_circ_empty(xmit))
|
||||
sa1100_stop_tx(&sport->port);
|
||||
uart_port_tx(&sport->port, ch,
|
||||
UART_GET_UTSR1(sport) & UTSR1_TNF,
|
||||
UART_PUT_CHAR(sport, ch));
|
||||
}
|
||||
|
||||
static irqreturn_t sa1100_int(int irq, void *dev_id)
|
||||
|
@ -196,33 +196,11 @@ static unsigned int vt8500_tx_empty(struct uart_port *port)
|
||||
|
||||
static void handle_tx(struct uart_port *port)
|
||||
{
|
||||
struct circ_buf *xmit = &port->state->xmit;
|
||||
u8 ch;
|
||||
|
||||
if (port->x_char) {
|
||||
writeb(port->x_char, port->membase + VT8500_TXFIFO);
|
||||
port->icount.tx++;
|
||||
port->x_char = 0;
|
||||
}
|
||||
if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
|
||||
vt8500_stop_tx(port);
|
||||
return;
|
||||
}
|
||||
|
||||
while (vt8500_tx_empty(port)) {
|
||||
if (uart_circ_empty(xmit))
|
||||
break;
|
||||
|
||||
writeb(xmit->buf[xmit->tail], port->membase + VT8500_TXFIFO);
|
||||
|
||||
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
|
||||
port->icount.tx++;
|
||||
}
|
||||
|
||||
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
|
||||
uart_write_wakeup(port);
|
||||
|
||||
if (uart_circ_empty(xmit))
|
||||
vt8500_stop_tx(port);
|
||||
uart_port_tx(port, ch,
|
||||
vt8500_tx_empty(port),
|
||||
writeb(ch, port->membase + VT8500_TXFIFO));
|
||||
}
|
||||
|
||||
static void vt8500_start_tx(struct uart_port *port)
|
||||
|
Loading…
Reference in New Issue
Block a user