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GPMC: add ECC control definitions
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -50,6 +50,19 @@
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#define GPMC_ECC_SIZE_CONFIG 0x1fc
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#define GPMC_ECC1_RESULT 0x200
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/* GPMC ECC control settings */
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#define GPMC_ECC_CTRL_ECCCLEAR 0x100
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#define GPMC_ECC_CTRL_ECCDISABLE 0x000
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#define GPMC_ECC_CTRL_ECCREG1 0x001
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#define GPMC_ECC_CTRL_ECCREG2 0x002
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#define GPMC_ECC_CTRL_ECCREG3 0x003
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#define GPMC_ECC_CTRL_ECCREG4 0x004
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#define GPMC_ECC_CTRL_ECCREG5 0x005
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#define GPMC_ECC_CTRL_ECCREG6 0x006
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#define GPMC_ECC_CTRL_ECCREG7 0x007
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#define GPMC_ECC_CTRL_ECCREG8 0x008
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#define GPMC_ECC_CTRL_ECCREG9 0x009
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#define GPMC_CS0_OFFSET 0x60
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#define GPMC_CS_SIZE 0x30
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@ -861,8 +874,9 @@ int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size)
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gpmc_ecc_used = cs;
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/* clear ecc and enable bits */
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val = ((0x00000001<<8) | 0x00000001);
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gpmc_write_reg(GPMC_ECC_CONTROL, val);
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gpmc_write_reg(GPMC_ECC_CONTROL,
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GPMC_ECC_CTRL_ECCCLEAR |
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GPMC_ECC_CTRL_ECCREG1);
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/* program ecc and result sizes */
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val = ((((ecc_size >> 1) - 1) << 22) | (0x0000000F));
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@ -870,13 +884,15 @@ int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size)
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switch (mode) {
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case GPMC_ECC_READ:
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gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);
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case GPMC_ECC_WRITE:
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gpmc_write_reg(GPMC_ECC_CONTROL,
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GPMC_ECC_CTRL_ECCCLEAR |
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GPMC_ECC_CTRL_ECCREG1);
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break;
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case GPMC_ECC_READSYN:
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gpmc_write_reg(GPMC_ECC_CONTROL, 0x100);
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break;
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case GPMC_ECC_WRITE:
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gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);
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gpmc_write_reg(GPMC_ECC_CONTROL,
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GPMC_ECC_CTRL_ECCCLEAR |
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GPMC_ECC_CTRL_ECCDISABLE);
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break;
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default:
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printk(KERN_INFO "Error: Unrecognized Mode[%d]!\n", mode);
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