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habanalabs: make some MMU functions common
Some MMU functions can be used by different versions of our MMUs, so move them to be common. Signed-off-by: Ohad Sharabi <osharabi@habana.ai> Reviewed-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
This commit is contained in:
Ohad Sharabi
Oded Gabbay
parent
d280d5954e
commit
2bf338f2ac
@ -402,8 +402,11 @@ enum hl_device_hw_state {
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* @hop4_mask: mask to get the PTE address in hop 4.
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* @hop5_mask: mask to get the PTE address in hop 5.
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* @last_mask: mask to get the bit indicating this is the last hop.
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* @pgt_size: size for page tables.
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* @page_size: default page size used to allocate memory.
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* @num_hops: The amount of hops supported by the translation table.
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* @hop_table_size: HOP table size.
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* @hop0_tables_total_size: total size for all HOP0 tables.
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* @host_resident: Should the MMU page table reside in host memory or in the
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* device DRAM.
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*/
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@ -423,8 +426,11 @@ struct hl_mmu_properties {
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u64 hop4_mask;
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u64 hop5_mask;
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u64 last_mask;
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u64 pgt_size;
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u32 page_size;
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u32 num_hops;
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u32 hop_table_size;
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u32 hop0_tables_total_size;
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u8 host_resident;
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};
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@ -3015,6 +3021,9 @@ int hl_mmu_unmap_contiguous(struct hl_ctx *ctx, u64 virt_addr, u32 size);
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int hl_mmu_invalidate_cache(struct hl_device *hdev, bool is_hard, u32 flags);
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int hl_mmu_invalidate_cache_range(struct hl_device *hdev, bool is_hard,
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u32 flags, u32 asid, u64 va, u64 size);
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u64 hl_mmu_get_next_hop_addr(struct hl_ctx *ctx, u64 curr_pte);
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u64 hl_mmu_get_hop_pte_phys_addr(struct hl_ctx *ctx, struct hl_mmu_properties *mmu_prop,
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u8 hop_idx, u64 hop_addr, u64 virt_addr);
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void hl_mmu_swap_out(struct hl_ctx *ctx);
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void hl_mmu_swap_in(struct hl_ctx *ctx);
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int hl_mmu_if_set_funcs(struct hl_device *hdev);
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@ -662,3 +662,58 @@ int hl_mmu_invalidate_cache_range(struct hl_device *hdev, bool is_hard,
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return rc;
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}
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u64 hl_mmu_get_next_hop_addr(struct hl_ctx *ctx, u64 curr_pte)
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{
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return (curr_pte & PAGE_PRESENT_MASK) ? (curr_pte & HOP_PHYS_ADDR_MASK) : ULLONG_MAX;
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}
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/**
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* hl_mmu_get_hop_pte_phys_addr() - extract PTE address from HOP
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* @ctx: pointer to the context structure to initialize.
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* @hop_idx: HOP index.
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* @hop_addr: HOP address.
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* @virt_addr: virtual address fro the translation.
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*
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* @return the matching PTE value on success, otherwise U64_MAX.
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*/
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u64 hl_mmu_get_hop_pte_phys_addr(struct hl_ctx *ctx, struct hl_mmu_properties *mmu_prop,
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u8 hop_idx, u64 hop_addr, u64 virt_addr)
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{
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u64 mask, shift;
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if (hop_idx >= mmu_prop->num_hops) {
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dev_err_ratelimited(ctx->hdev->dev, "Invalid hop index %d\n", hop_idx);
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return U64_MAX;
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}
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/* currently max number of HOPs is 6 */
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switch (hop_idx) {
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case 0:
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mask = mmu_prop->hop0_mask;
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shift = mmu_prop->hop0_shift;
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break;
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case 1:
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mask = mmu_prop->hop1_mask;
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shift = mmu_prop->hop1_shift;
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break;
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case 2:
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mask = mmu_prop->hop2_mask;
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shift = mmu_prop->hop2_shift;
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break;
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case 3:
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mask = mmu_prop->hop3_mask;
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shift = mmu_prop->hop3_shift;
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break;
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case 4:
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mask = mmu_prop->hop4_mask;
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shift = mmu_prop->hop4_shift;
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break;
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default:
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mask = mmu_prop->hop5_mask;
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shift = mmu_prop->hop5_shift;
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break;
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}
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return hop_addr + ctx->hdev->asic_prop.mmu_pte_size * ((virt_addr & mask) >> shift);
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}
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@ -217,18 +217,10 @@ static inline u64 get_hop4_pte_addr(struct hl_ctx *ctx,
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mmu_prop->hop4_shift);
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}
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static inline u64 get_next_hop_addr(struct hl_ctx *ctx, u64 curr_pte)
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{
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if (curr_pte & PAGE_PRESENT_MASK)
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return curr_pte & HOP_PHYS_ADDR_MASK;
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else
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return ULLONG_MAX;
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}
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static inline u64 get_alloc_next_hop_addr(struct hl_ctx *ctx, u64 curr_pte,
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bool *is_new_hop)
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{
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u64 hop_addr = get_next_hop_addr(ctx, curr_pte);
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u64 hop_addr = hl_mmu_get_next_hop_addr(ctx, curr_pte);
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if (hop_addr == ULLONG_MAX) {
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hop_addr = alloc_hop(ctx);
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@ -546,7 +538,7 @@ static int _hl_mmu_v1_unmap(struct hl_ctx *ctx,
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curr_pte = *(u64 *) (uintptr_t) hop0_pte_addr;
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hop1_addr = get_next_hop_addr(ctx, curr_pte);
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hop1_addr = hl_mmu_get_next_hop_addr(ctx, curr_pte);
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if (hop1_addr == ULLONG_MAX)
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goto not_mapped;
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@ -555,7 +547,7 @@ static int _hl_mmu_v1_unmap(struct hl_ctx *ctx,
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curr_pte = *(u64 *) (uintptr_t) hop1_pte_addr;
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hop2_addr = get_next_hop_addr(ctx, curr_pte);
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hop2_addr = hl_mmu_get_next_hop_addr(ctx, curr_pte);
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if (hop2_addr == ULLONG_MAX)
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goto not_mapped;
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@ -564,7 +556,7 @@ static int _hl_mmu_v1_unmap(struct hl_ctx *ctx,
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curr_pte = *(u64 *) (uintptr_t) hop2_pte_addr;
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hop3_addr = get_next_hop_addr(ctx, curr_pte);
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hop3_addr = hl_mmu_get_next_hop_addr(ctx, curr_pte);
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if (hop3_addr == ULLONG_MAX)
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goto not_mapped;
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@ -582,7 +574,7 @@ static int _hl_mmu_v1_unmap(struct hl_ctx *ctx,
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}
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if (!is_huge) {
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hop4_addr = get_next_hop_addr(ctx, curr_pte);
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hop4_addr = hl_mmu_get_next_hop_addr(ctx, curr_pte);
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if (hop4_addr == ULLONG_MAX)
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goto not_mapped;
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@ -845,27 +837,6 @@ static void hl_mmu_v1_swap_in(struct hl_ctx *ctx)
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}
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static inline u64 get_hop_pte_addr(struct hl_ctx *ctx,
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struct hl_mmu_properties *mmu_prop,
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int hop_num, u64 hop_addr, u64 virt_addr)
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{
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switch (hop_num) {
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case 0:
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return get_hop0_pte_addr(ctx, mmu_prop, hop_addr, virt_addr);
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case 1:
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return get_hop1_pte_addr(ctx, mmu_prop, hop_addr, virt_addr);
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case 2:
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return get_hop2_pte_addr(ctx, mmu_prop, hop_addr, virt_addr);
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case 3:
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return get_hop3_pte_addr(ctx, mmu_prop, hop_addr, virt_addr);
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case 4:
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return get_hop4_pte_addr(ctx, mmu_prop, hop_addr, virt_addr);
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default:
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break;
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}
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return U64_MAX;
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}
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static int hl_mmu_v1_get_tlb_info(struct hl_ctx *ctx, u64 virt_addr,
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struct hl_mmu_hop_info *hops)
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{
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@ -906,7 +877,7 @@ static int hl_mmu_v1_get_tlb_info(struct hl_ctx *ctx, u64 virt_addr,
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hops->hop_info[0].hop_addr = get_phys_hop0_addr(ctx);
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hops->hop_info[0].hop_pte_addr =
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get_hop_pte_addr(ctx, mmu_prop, 0,
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hl_mmu_get_hop_pte_phys_addr(ctx, mmu_prop, 0,
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hops->hop_info[0].hop_addr, virt_addr);
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hops->hop_info[0].hop_pte_val =
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hdev->asic_funcs->read_pte(hdev,
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@ -914,13 +885,13 @@ static int hl_mmu_v1_get_tlb_info(struct hl_ctx *ctx, u64 virt_addr,
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for (i = 1 ; i < used_hops ; i++) {
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hops->hop_info[i].hop_addr =
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get_next_hop_addr(ctx,
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hl_mmu_get_next_hop_addr(ctx,
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hops->hop_info[i - 1].hop_pte_val);
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if (hops->hop_info[i].hop_addr == ULLONG_MAX)
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return -EFAULT;
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hops->hop_info[i].hop_pte_addr =
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get_hop_pte_addr(ctx, mmu_prop, i,
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hl_mmu_get_hop_pte_phys_addr(ctx, mmu_prop, i,
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hops->hop_info[i].hop_addr,
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virt_addr);
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hops->hop_info[i].hop_pte_val =
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