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fs_enet: Convert mii-bitbang to use the generic bitbang MDIO code.
Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Scott Wood
David S. Miller
parent
e2ec4581ad
commit
2b5b3a604a
@ -15,15 +15,13 @@
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/bitops.h>
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#include <linux/platform_device.h>
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#include <linux/mdio-bitbang.h>
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#ifdef CONFIG_PPC_CPM_NEW_BINDING
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#include <linux/of_platform.h>
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@ -32,11 +30,11 @@
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#include "fs_enet.h"
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struct bb_info {
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struct mdiobb_ctrl ctrl;
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__be32 __iomem *dir;
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__be32 __iomem *dat;
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u32 mdio_msk;
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u32 mdc_msk;
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int delay;
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};
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/* FIXME: If any other users of GPIO crop up, then these will have to
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@ -59,212 +57,58 @@ static inline int bb_read(u32 __iomem *p, u32 m)
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return (in_be32(p) & m) != 0;
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}
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static inline void mdio_active(struct bb_info *bitbang)
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static inline void mdio_dir(struct mdiobb_ctrl *ctrl, int dir)
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{
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bb_set(bitbang->dir, bitbang->mdio_msk);
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struct bb_info *bitbang = container_of(ctrl, struct bb_info, ctrl);
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if (dir)
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bb_set(bitbang->dir, bitbang->mdio_msk);
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else
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bb_clr(bitbang->dir, bitbang->mdio_msk);
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/* Read back to flush the write. */
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in_be32(bitbang->dir);
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}
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static inline void mdio_tristate(struct bb_info *bitbang)
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{
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bb_clr(bitbang->dir, bitbang->mdio_msk);
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}
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static inline int mdio_read(struct bb_info *bitbang)
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static inline int mdio_read(struct mdiobb_ctrl *ctrl)
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{
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struct bb_info *bitbang = container_of(ctrl, struct bb_info, ctrl);
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return bb_read(bitbang->dat, bitbang->mdio_msk);
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}
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static inline void mdio(struct bb_info *bitbang, int what)
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static inline void mdio(struct mdiobb_ctrl *ctrl, int what)
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{
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struct bb_info *bitbang = container_of(ctrl, struct bb_info, ctrl);
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if (what)
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bb_set(bitbang->dat, bitbang->mdio_msk);
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else
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bb_clr(bitbang->dat, bitbang->mdio_msk);
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/* Read back to flush the write. */
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in_be32(bitbang->dat);
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}
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static inline void mdc(struct bb_info *bitbang, int what)
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static inline void mdc(struct mdiobb_ctrl *ctrl, int what)
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{
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struct bb_info *bitbang = container_of(ctrl, struct bb_info, ctrl);
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if (what)
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bb_set(bitbang->dat, bitbang->mdc_msk);
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else
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bb_clr(bitbang->dat, bitbang->mdc_msk);
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/* Read back to flush the write. */
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in_be32(bitbang->dat);
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}
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static inline void mii_delay(struct bb_info *bitbang)
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{
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udelay(bitbang->delay);
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}
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/* Utility to send the preamble, address, and register (common to read and write). */
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static void bitbang_pre(struct bb_info *bitbang , int read, u8 addr, u8 reg)
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{
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int j;
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/*
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* Send a 32 bit preamble ('1's) with an extra '1' bit for good measure.
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* The IEEE spec says this is a PHY optional requirement. The AMD
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* 79C874 requires one after power up and one after a MII communications
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* error. This means that we are doing more preambles than we need,
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* but it is safer and will be much more robust.
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*/
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mdio_active(bitbang);
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mdio(bitbang, 1);
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for (j = 0; j < 32; j++) {
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mdc(bitbang, 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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}
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/* send the start bit (01) and the read opcode (10) or write (10) */
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mdc(bitbang, 0);
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mdio(bitbang, 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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mdc(bitbang, 0);
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mdio(bitbang, 1);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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mdc(bitbang, 0);
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mdio(bitbang, read);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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mdc(bitbang, 0);
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mdio(bitbang, !read);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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/* send the PHY address */
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for (j = 0; j < 5; j++) {
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mdc(bitbang, 0);
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mdio(bitbang, (addr & 0x10) != 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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addr <<= 1;
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}
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/* send the register address */
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for (j = 0; j < 5; j++) {
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mdc(bitbang, 0);
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mdio(bitbang, (reg & 0x10) != 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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reg <<= 1;
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}
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}
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static int fs_enet_mii_bb_read(struct mii_bus *bus , int phy_id, int location)
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{
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u16 rdreg;
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int ret, j;
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u8 addr = phy_id & 0xff;
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u8 reg = location & 0xff;
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struct bb_info* bitbang = bus->priv;
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bitbang_pre(bitbang, 1, addr, reg);
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/* tri-state our MDIO I/O pin so we can read */
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mdc(bitbang, 0);
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mdio_tristate(bitbang);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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/* check the turnaround bit: the PHY should be driving it to zero */
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if (mdio_read(bitbang) != 0) {
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/* PHY didn't drive TA low */
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for (j = 0; j < 32; j++) {
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mdc(bitbang, 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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}
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ret = -1;
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goto out;
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}
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mdc(bitbang, 0);
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mii_delay(bitbang);
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/* read 16 bits of register data, MSB first */
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rdreg = 0;
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for (j = 0; j < 16; j++) {
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mdc(bitbang, 1);
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mii_delay(bitbang);
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rdreg <<= 1;
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rdreg |= mdio_read(bitbang);
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mdc(bitbang, 0);
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mii_delay(bitbang);
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}
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mdc(bitbang, 1);
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mii_delay(bitbang);
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mdc(bitbang, 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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ret = rdreg;
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out:
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return ret;
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}
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static int fs_enet_mii_bb_write(struct mii_bus *bus, int phy_id, int location, u16 val)
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{
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int j;
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struct bb_info* bitbang = bus->priv;
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u8 addr = phy_id & 0xff;
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u8 reg = location & 0xff;
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u16 value = val & 0xffff;
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bitbang_pre(bitbang, 0, addr, reg);
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/* send the turnaround (10) */
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mdc(bitbang, 0);
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mdio(bitbang, 1);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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mdc(bitbang, 0);
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mdio(bitbang, 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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/* write 16 bits of register data, MSB first */
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for (j = 0; j < 16; j++) {
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mdc(bitbang, 0);
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mdio(bitbang, (value & 0x8000) != 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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value <<= 1;
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}
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/*
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* Tri-state the MDIO line.
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*/
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mdio_tristate(bitbang);
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mdc(bitbang, 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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return 0;
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}
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static int fs_enet_mii_bb_reset(struct mii_bus *bus)
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{
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/*nothing here - dunno how to reset it*/
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return 0;
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}
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static struct mdiobb_ops bb_ops = {
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.owner = THIS_MODULE,
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.set_mdc = mdc,
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.set_mdio_dir = mdio_dir,
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.set_mdio_data = mdio,
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.get_mdio_data = mdio_read,
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};
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#ifdef CONFIG_PPC_CPM_NEW_BINDING
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static int __devinit fs_mii_bitbang_init(struct mii_bus *bus,
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@ -305,7 +149,6 @@ static int __devinit fs_mii_bitbang_init(struct mii_bus *bus,
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bitbang->dat = bitbang->dir + 4;
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bitbang->mdio_msk = 1 << (31 - mdio_pin);
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bitbang->mdc_msk = 1 << (31 - mdc_pin);
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bitbang->delay = 1; /* 1 us between operations */
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return 0;
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}
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@ -336,23 +179,21 @@ static int __devinit fs_enet_mdio_probe(struct of_device *ofdev,
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int ret = -ENOMEM;
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int i;
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new_bus = kzalloc(sizeof(struct mii_bus), GFP_KERNEL);
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if (!new_bus)
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goto out;
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bitbang = kzalloc(sizeof(struct bb_info), GFP_KERNEL);
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if (!bitbang)
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goto out_free_bus;
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goto out;
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bitbang->ctrl.ops = &bb_ops;
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new_bus = alloc_mdio_bitbang(&bitbang->ctrl);
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if (!new_bus)
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goto out_free_priv;
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new_bus->priv = bitbang;
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new_bus->name = "CPM2 Bitbanged MII",
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new_bus->read = &fs_enet_mii_bb_read,
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new_bus->write = &fs_enet_mii_bb_write,
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new_bus->reset = &fs_enet_mii_bb_reset,
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ret = fs_mii_bitbang_init(new_bus, ofdev->node);
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if (ret)
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goto out_free_bitbang;
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goto out_free_bus;
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new_bus->phy_mask = ~0;
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new_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
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@ -380,10 +221,10 @@ out_free_irqs:
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kfree(new_bus->irq);
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out_unmap_regs:
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iounmap(bitbang->dir);
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out_free_bitbang:
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kfree(bitbang);
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out_free_bus:
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kfree(new_bus);
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out_free_priv:
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free_mdio_bitbang(new_bus);
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out:
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return ret;
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}
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@ -394,6 +235,7 @@ static int fs_enet_mdio_remove(struct of_device *ofdev)
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struct bb_info *bitbang = bus->priv;
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mdiobus_unregister(bus);
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free_mdio_bitbang(bus);
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dev_set_drvdata(&ofdev->dev, NULL);
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kfree(bus->irq);
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iounmap(bitbang->dir);
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@ -417,12 +259,12 @@ static struct of_platform_driver fs_enet_bb_mdio_driver = {
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.remove = fs_enet_mdio_remove,
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};
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int fs_enet_mdio_bb_init(void)
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static int fs_enet_mdio_bb_init(void)
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{
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return of_register_platform_driver(&fs_enet_bb_mdio_driver);
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}
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void fs_enet_mdio_bb_exit(void)
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static void fs_enet_mdio_bb_exit(void)
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{
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of_unregister_platform_driver(&fs_enet_bb_mdio_driver);
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}
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@ -437,7 +279,6 @@ static int __devinit fs_mii_bitbang_init(struct bb_info *bitbang,
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bitbang->dat = (u32 __iomem *)fmpi->mdio_dat.offset;
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bitbang->mdio_msk = 1U << (31 - fmpi->mdio_dat.bit);
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bitbang->mdc_msk = 1U << (31 - fmpi->mdc_dat.bit);
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bitbang->delay = fmpi->delay;
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return 0;
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}
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@ -453,20 +294,19 @@ static int __devinit fs_enet_mdio_probe(struct device *dev)
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if (NULL == dev)
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return -EINVAL;
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new_bus = kzalloc(sizeof(struct mii_bus), GFP_KERNEL);
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if (NULL == new_bus)
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return -ENOMEM;
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bitbang = kzalloc(sizeof(struct bb_info), GFP_KERNEL);
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if (NULL == bitbang)
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return -ENOMEM;
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bitbang->ctrl.ops = &bb_ops;
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new_bus = alloc_mdio_bitbang(&bitbang->ctrl);
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if (NULL == new_bus)
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return -ENOMEM;
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new_bus->name = "BB MII Bus",
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new_bus->read = &fs_enet_mii_bb_read,
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new_bus->write = &fs_enet_mii_bb_write,
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new_bus->reset = &fs_enet_mii_bb_reset,
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new_bus->id = pdev->id;
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new_bus->phy_mask = ~0x9;
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@ -498,8 +338,8 @@ static int __devinit fs_enet_mdio_probe(struct device *dev)
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return 0;
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bus_register_fail:
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free_mdio_bitbang(new_bus);
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kfree(bitbang);
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kfree(new_bus);
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return err;
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}
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@ -512,9 +352,7 @@ static int fs_enet_mdio_remove(struct device *dev)
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dev_set_drvdata(dev, NULL);
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iounmap((void *) (&bus->priv));
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bus->priv = NULL;
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kfree(bus);
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free_mdio_bitbang(bus);
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return 0;
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}
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@ -535,4 +373,4 @@ void fs_enet_mdio_bb_exit(void)
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{
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driver_unregister(&fs_enet_bb_mdio_driver);
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}
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#endif
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