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USB: PHY: JZ4770: Add support for new Ingenic SoCs.
Add support for probing the phy-jz4770 driver on the JZ4780 SoC, the X1000 SoC and the X1830 SoC from Ingenic. Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com> Co-developed-by: 漆鹏振 (Qi Pengzhen) <aric.pzqi@ingenic.com> Signed-off-by: 漆鹏振 (Qi Pengzhen) <aric.pzqi@ingenic.com> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
This commit is contained in:
周琰杰 (Zhou Yanjie)
Felipe Balbi
parent
6e5478aeb3
commit
2a6c0b82e6
@ -185,11 +185,11 @@ config USB_ULPI_VIEWPORT
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controllers with a viewport register (e.g. Chipidea/ARC controllers).
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config JZ4770_PHY
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tristate "Ingenic JZ4770 Transceiver Driver"
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tristate "Ingenic SoCs Transceiver Driver"
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depends on MIPS || COMPILE_TEST
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select USB_PHY
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help
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This driver provides PHY support for the USB controller found
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on the JZ4770 SoC from Ingenic.
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on the JZ-series and X-series SoCs from Ingenic.
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endmenu
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@ -1,7 +1,9 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Ingenic JZ4770 USB PHY driver
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* Ingenic SoCs USB PHY driver
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* Copyright (c) Paul Cercueil <paul@crapouillou.net>
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* Copyright (c) 漆鹏振 (Qi Pengzhen) <aric.pzqi@ingenic.com>
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* Copyright (c) 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
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*/
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#include <linux/clk.h>
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@ -12,12 +14,13 @@
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#include <linux/usb/otg.h>
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#include <linux/usb/phy.h>
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/* OTGPHY register offsets */
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#define REG_USBPCR_OFFSET 0x00
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#define REG_USBRDT_OFFSET 0x04
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#define REG_USBVBFIL_OFFSET 0x08
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#define REG_USBPCR1_OFFSET 0x0c
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/* USBPCR */
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/* bits within the USBPCR register */
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#define USBPCR_USB_MODE BIT(31)
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#define USBPCR_AVLD_REG BIT(30)
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#define USBPCR_COMMONONN BIT(25)
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@ -44,11 +47,21 @@
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#define USBPCR_SQRXTUNE_LSB 11
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#define USBPCR_SQRXTUNE_MASK GENMASK(13, USBPCR_SQRXTUNE_LSB)
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#define USBPCR_SQRXTUNE_DCR_20PCT (0x7 << USBPCR_SQRXTUNE_LSB)
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#define USBPCR_SQRXTUNE_DFT (0x3 << USBPCR_SQRXTUNE_LSB)
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#define USBPCR_TXFSLSTUNE_LSB 7
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#define USBPCR_TXFSLSTUNE_MASK GENMASK(10, USBPCR_TXFSLSTUNE_LSB)
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#define USBPCR_TXFSLSTUNE_DCR_50PPT (0xf << USBPCR_TXFSLSTUNE_LSB)
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#define USBPCR_TXFSLSTUNE_DCR_25PPT (0x7 << USBPCR_TXFSLSTUNE_LSB)
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#define USBPCR_TXFSLSTUNE_DFT (0x3 << USBPCR_TXFSLSTUNE_LSB)
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#define USBPCR_TXFSLSTUNE_INC_25PPT (0x1 << USBPCR_TXFSLSTUNE_LSB)
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#define USBPCR_TXFSLSTUNE_INC_50PPT (0x0 << USBPCR_TXFSLSTUNE_LSB)
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#define USBPCR_TXHSXVTUNE_LSB 4
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#define USBPCR_TXHSXVTUNE_MASK GENMASK(5, USBPCR_TXHSXVTUNE_LSB)
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#define USBPCR_TXHSXVTUNE_DFT (0x3 << USBPCR_TXHSXVTUNE_LSB)
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#define USBPCR_TXHSXVTUNE_DCR_15MV (0x1 << USBPCR_TXHSXVTUNE_LSB)
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#define USBPCR_TXRISETUNE_LSB 4
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#define USBPCR_TXRISETUNE_MASK GENMASK(5, USBPCR_TXRISETUNE_LSB)
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@ -56,14 +69,40 @@
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#define USBPCR_TXVREFTUNE_LSB 0
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#define USBPCR_TXVREFTUNE_MASK GENMASK(3, USBPCR_TXVREFTUNE_LSB)
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#define USBPCR_TXVREFTUNE_INC_25PPT (0x7 << USBPCR_TXVREFTUNE_LSB)
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#define USBPCR_TXVREFTUNE_DFT (0x5 << USBPCR_TXVREFTUNE_LSB)
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/* USBRDT */
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/* bits within the USBRDTR register */
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#define USBRDT_UTMI_RST BIT(27)
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#define USBRDT_HB_MASK BIT(26)
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#define USBRDT_VBFIL_LD_EN BIT(25)
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#define USBRDT_IDDIG_EN BIT(24)
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#define USBRDT_IDDIG_REG BIT(23)
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#define USBRDT_VBFIL_EN BIT(2)
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/* bits within the USBPCR1 register */
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#define USBPCR1_BVLD_REG BIT(31)
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#define USBPCR1_DPPD BIT(29)
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#define USBPCR1_DMPD BIT(28)
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#define USBPCR1_USB_SEL BIT(28)
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#define USBPCR1_WORD_IF_16BIT BIT(19)
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enum ingenic_usb_phy_version {
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ID_JZ4770,
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ID_JZ4780,
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ID_X1000,
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ID_X1830,
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};
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struct ingenic_soc_info {
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enum ingenic_usb_phy_version version;
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void (*usb_phy_init)(struct usb_phy *phy);
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};
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struct jz4770_phy {
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const struct ingenic_soc_info *soc_info;
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struct usb_phy phy;
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struct usb_otg otg;
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struct device *dev;
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@ -82,12 +121,18 @@ static inline struct jz4770_phy *phy_to_jz4770_phy(struct usb_phy *phy)
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return container_of(phy, struct jz4770_phy, phy);
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}
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static int jz4770_phy_set_peripheral(struct usb_otg *otg,
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static int ingenic_usb_phy_set_peripheral(struct usb_otg *otg,
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struct usb_gadget *gadget)
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{
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struct jz4770_phy *priv = otg_to_jz4770_phy(otg);
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u32 reg;
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if (priv->soc_info->version >= ID_X1000) {
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reg = readl(priv->base + REG_USBPCR1_OFFSET);
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reg |= USBPCR1_BVLD_REG;
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writel(reg, priv->base + REG_USBPCR1_OFFSET);
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}
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reg = readl(priv->base + REG_USBPCR_OFFSET);
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reg &= ~USBPCR_USB_MODE;
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reg |= USBPCR_VBUSVLDEXT | USBPCR_VBUSVLDEXTSEL | USBPCR_OTG_DISABLE;
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@ -96,7 +141,7 @@ static int jz4770_phy_set_peripheral(struct usb_otg *otg,
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return 0;
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}
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static int jz4770_phy_set_host(struct usb_otg *otg, struct usb_bus *host)
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static int ingenic_usb_phy_set_host(struct usb_otg *otg, struct usb_bus *host)
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{
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struct jz4770_phy *priv = otg_to_jz4770_phy(otg);
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u32 reg;
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@ -109,7 +154,7 @@ static int jz4770_phy_set_host(struct usb_otg *otg, struct usb_bus *host)
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return 0;
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}
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static int jz4770_phy_init(struct usb_phy *phy)
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static int ingenic_usb_phy_init(struct usb_phy *phy)
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{
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struct jz4770_phy *priv = phy_to_jz4770_phy(phy);
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int err;
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@ -127,11 +172,7 @@ static int jz4770_phy_init(struct usb_phy *phy)
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return err;
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}
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reg = USBPCR_AVLD_REG | USBPCR_COMMONONN | USBPCR_IDPULLUP_ALWAYS |
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USBPCR_COMPDISTUNE_DFT | USBPCR_OTGTUNE_DFT | USBPCR_SQRXTUNE_DFT |
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USBPCR_TXFSLSTUNE_DFT | USBPCR_TXRISETUNE_DFT | USBPCR_TXVREFTUNE_DFT |
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USBPCR_POR;
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writel(reg, priv->base + REG_USBPCR_OFFSET);
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priv->soc_info->usb_phy_init(phy);
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/* Wait for PHY to reset */
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usleep_range(30, 300);
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@ -141,7 +182,7 @@ static int jz4770_phy_init(struct usb_phy *phy)
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return 0;
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}
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static void jz4770_phy_shutdown(struct usb_phy *phy)
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static void ingenic_usb_phy_shutdown(struct usb_phy *phy)
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{
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struct jz4770_phy *priv = phy_to_jz4770_phy(phy);
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@ -149,11 +190,100 @@ static void jz4770_phy_shutdown(struct usb_phy *phy)
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regulator_disable(priv->vcc_supply);
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}
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static void jz4770_phy_remove(void *phy)
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static void ingenic_usb_phy_remove(void *phy)
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{
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usb_remove_phy(phy);
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}
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static void jz4770_usb_phy_init(struct usb_phy *phy)
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{
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struct jz4770_phy *priv = phy_to_jz4770_phy(phy);
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u32 reg;
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reg = USBPCR_AVLD_REG | USBPCR_COMMONONN | USBPCR_IDPULLUP_ALWAYS |
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USBPCR_COMPDISTUNE_DFT | USBPCR_OTGTUNE_DFT | USBPCR_SQRXTUNE_DFT |
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USBPCR_TXFSLSTUNE_DFT | USBPCR_TXRISETUNE_DFT | USBPCR_TXVREFTUNE_DFT |
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USBPCR_POR;
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writel(reg, priv->base + REG_USBPCR_OFFSET);
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}
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static void jz4780_usb_phy_init(struct usb_phy *phy)
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{
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struct jz4770_phy *priv = phy_to_jz4770_phy(phy);
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u32 reg;
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reg = readl(priv->base + REG_USBPCR1_OFFSET) | USBPCR1_USB_SEL |
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USBPCR1_WORD_IF_16BIT;
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writel(reg, priv->base + REG_USBPCR1_OFFSET);
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reg = USBPCR_TXPREEMPHTUNE | USBPCR_COMMONONN | USBPCR_POR;
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writel(reg, priv->base + REG_USBPCR_OFFSET);
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}
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static void x1000_usb_phy_init(struct usb_phy *phy)
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{
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struct jz4770_phy *priv = phy_to_jz4770_phy(phy);
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u32 reg;
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reg = readl(priv->base + REG_USBPCR1_OFFSET) | USBPCR1_WORD_IF_16BIT;
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writel(reg, priv->base + REG_USBPCR1_OFFSET);
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reg = USBPCR_SQRXTUNE_DCR_20PCT | USBPCR_TXPREEMPHTUNE |
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USBPCR_TXHSXVTUNE_DCR_15MV | USBPCR_TXVREFTUNE_INC_25PPT |
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USBPCR_COMMONONN | USBPCR_POR;
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writel(reg, priv->base + REG_USBPCR_OFFSET);
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}
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static void x1830_usb_phy_init(struct usb_phy *phy)
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{
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struct jz4770_phy *priv = phy_to_jz4770_phy(phy);
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u32 reg;
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/* rdt */
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writel(USBRDT_VBFIL_EN | USBRDT_UTMI_RST, priv->base + REG_USBRDT_OFFSET);
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reg = readl(priv->base + REG_USBPCR1_OFFSET) | USBPCR1_WORD_IF_16BIT |
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USBPCR1_DMPD | USBPCR1_DPPD;
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writel(reg, priv->base + REG_USBPCR1_OFFSET);
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reg = USBPCR_IDPULLUP_OTG | USBPCR_VBUSVLDEXT | USBPCR_TXPREEMPHTUNE |
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USBPCR_COMMONONN | USBPCR_POR;
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writel(reg, priv->base + REG_USBPCR_OFFSET);
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}
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static const struct ingenic_soc_info jz4770_soc_info = {
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.version = ID_JZ4770,
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.usb_phy_init = jz4770_usb_phy_init,
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};
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static const struct ingenic_soc_info jz4780_soc_info = {
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.version = ID_JZ4780,
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.usb_phy_init = jz4780_usb_phy_init,
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};
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static const struct ingenic_soc_info x1000_soc_info = {
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.version = ID_X1000,
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.usb_phy_init = x1000_usb_phy_init,
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};
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static const struct ingenic_soc_info x1830_soc_info = {
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.version = ID_X1830,
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.usb_phy_init = x1830_usb_phy_init,
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};
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static const struct of_device_id ingenic_usb_phy_of_matches[] = {
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{ .compatible = "ingenic,jz4770-phy", .data = &jz4770_soc_info },
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{ .compatible = "ingenic,jz4780-phy", .data = &jz4780_soc_info },
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{ .compatible = "ingenic,x1000-phy", .data = &x1000_soc_info },
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{ .compatible = "ingenic,x1830-phy", .data = &x1830_soc_info },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, ingenic_usb_phy_of_matches);
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static int jz4770_phy_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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@ -164,18 +294,24 @@ static int jz4770_phy_probe(struct platform_device *pdev)
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if (!priv)
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return -ENOMEM;
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priv->soc_info = device_get_match_data(&pdev->dev);
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if (!priv->soc_info) {
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dev_err(&pdev->dev, "Error: No device match found\n");
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return -ENODEV;
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}
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platform_set_drvdata(pdev, priv);
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priv->dev = dev;
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priv->phy.dev = dev;
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priv->phy.otg = &priv->otg;
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priv->phy.label = "jz4770-phy";
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priv->phy.init = jz4770_phy_init;
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priv->phy.shutdown = jz4770_phy_shutdown;
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priv->phy.label = "ingenic-usb-phy";
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priv->phy.init = ingenic_usb_phy_init;
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priv->phy.shutdown = ingenic_usb_phy_shutdown;
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priv->otg.state = OTG_STATE_UNDEFINED;
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priv->otg.usb_phy = &priv->phy;
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priv->otg.set_host = jz4770_phy_set_host;
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priv->otg.set_peripheral = jz4770_phy_set_peripheral;
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priv->otg.set_host = ingenic_usb_phy_set_host;
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priv->otg.set_peripheral = ingenic_usb_phy_set_peripheral;
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priv->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(priv->base)) {
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@ -206,26 +342,20 @@ static int jz4770_phy_probe(struct platform_device *pdev)
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return err;
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}
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return devm_add_action_or_reset(dev, jz4770_phy_remove, &priv->phy);
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return devm_add_action_or_reset(dev, ingenic_usb_phy_remove, &priv->phy);
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}
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#ifdef CONFIG_OF
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static const struct of_device_id jz4770_phy_of_matches[] = {
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{ .compatible = "ingenic,jz4770-phy" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, jz4770_phy_of_matches);
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#endif
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static struct platform_driver jz4770_phy_driver = {
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static struct platform_driver ingenic_phy_driver = {
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.probe = jz4770_phy_probe,
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.driver = {
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.name = "jz4770-phy",
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.of_match_table = of_match_ptr(jz4770_phy_of_matches),
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.of_match_table = of_match_ptr(ingenic_usb_phy_of_matches),
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},
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};
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module_platform_driver(jz4770_phy_driver);
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module_platform_driver(ingenic_phy_driver);
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MODULE_AUTHOR("周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>");
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MODULE_AUTHOR("漆鹏振 (Qi Pengzhen) <aric.pzqi@ingenic.com>");
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MODULE_AUTHOR("Paul Cercueil <paul@crapouillou.net>");
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MODULE_DESCRIPTION("Ingenic JZ4770 USB PHY driver");
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MODULE_DESCRIPTION("Ingenic SoCs USB PHY driver");
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MODULE_LICENSE("GPL");
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