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UHCI: Add macros for computing DMA values
This patch (as855) adds some convenience macros to uhci-hcd, to help simplify the code for computing hardware DMA pointers. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -196,7 +196,7 @@ static int uhci_show_qh(struct uhci_qh *qh, char *buf, int len, int space)
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struct uhci_td *td = list_entry(urbp->td_list.next,
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struct uhci_td, list);
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if (cpu_to_le32(td->dma_handle) != (element & ~UHCI_PTR_BITS))
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if (element != LINK_TO_TD(td))
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out += sprintf(out, "%*s Element != First TD\n",
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space, "");
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i = nurbs = 0;
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@ -393,7 +393,7 @@ static int uhci_sprint_schedule(struct uhci_hcd *uhci, char *buf, int len)
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do {
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td = list_entry(tmp, struct uhci_td, fl_list);
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tmp = tmp->next;
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if (cpu_to_le32(td->dma_handle) != link) {
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if (link != LINK_TO_TD(td)) {
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if (nframes > 0)
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out += sprintf(out, " link does "
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"not match list entry!\n");
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@ -440,7 +440,7 @@ check_link:
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if (qh->link != UHCI_PTR_TERM)
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out += sprintf(out, " bandwidth reclamation on!\n");
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if (qh_element(qh) != cpu_to_le32(uhci->term_td->dma_handle))
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if (qh_element(qh) != LINK_TO_TD(uhci->term_td))
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out += sprintf(out, " skel_term_qh element is not set to term_td!\n");
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continue;
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@ -461,8 +461,7 @@ check_link:
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out += sprintf(out, " Skipped %d QHs\n", cnt);
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if (i > 1 && i < UHCI_NUM_SKELQH - 1) {
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if (qh->link !=
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(cpu_to_le32(uhci->skelqh[j]->dma_handle) | UHCI_PTR_QH))
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if (qh->link != LINK_TO_QH(uhci->skelqh[j]))
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out += sprintf(out, " last QH not linked to next skeleton!\n");
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}
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}
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@ -116,7 +116,7 @@ static __le32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame)
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skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES);
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if (skelnum <= 1)
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skelnum = 9;
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return UHCI_PTR_QH | cpu_to_le32(uhci->skelqh[skelnum]->dma_handle);
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return LINK_TO_QH(uhci->skelqh[skelnum]);
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}
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#include "uhci-debug.c"
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@ -635,25 +635,21 @@ static int uhci_start(struct usb_hcd *hcd)
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uhci->skel_int16_qh->link =
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uhci->skel_int8_qh->link =
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uhci->skel_int4_qh->link =
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uhci->skel_int2_qh->link = UHCI_PTR_QH |
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cpu_to_le32(uhci->skel_int1_qh->dma_handle);
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uhci->skel_int2_qh->link = LINK_TO_QH(
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uhci->skel_int1_qh);
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uhci->skel_int1_qh->link = UHCI_PTR_QH |
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cpu_to_le32(uhci->skel_ls_control_qh->dma_handle);
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uhci->skel_ls_control_qh->link = UHCI_PTR_QH |
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cpu_to_le32(uhci->skel_fs_control_qh->dma_handle);
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uhci->skel_fs_control_qh->link = UHCI_PTR_QH |
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cpu_to_le32(uhci->skel_bulk_qh->dma_handle);
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uhci->skel_bulk_qh->link = UHCI_PTR_QH |
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cpu_to_le32(uhci->skel_term_qh->dma_handle);
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uhci->skel_int1_qh->link = LINK_TO_QH(uhci->skel_ls_control_qh);
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uhci->skel_ls_control_qh->link = LINK_TO_QH(uhci->skel_fs_control_qh);
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uhci->skel_fs_control_qh->link = LINK_TO_QH(uhci->skel_bulk_qh);
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uhci->skel_bulk_qh->link = LINK_TO_QH(uhci->skel_term_qh);
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/* This dummy TD is to work around a bug in Intel PIIX controllers */
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uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
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(0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
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uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle);
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uhci->term_td->link = LINK_TO_TD(uhci->term_td);
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uhci->skel_term_qh->link = UHCI_PTR_TERM;
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uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle);
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uhci->skel_term_qh->element = LINK_TO_TD(uhci->term_td);
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/*
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* Fill the frame list: make all entries point to the proper
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@ -129,6 +129,8 @@ struct uhci_qh {
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__le32 element; /* Queue element (TD) pointer */
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/* Software fields */
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dma_addr_t dma_handle;
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struct list_head node; /* Node in the list of QHs */
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struct usb_host_endpoint *hep; /* Endpoint information */
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struct usb_device *udev;
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@ -150,8 +152,6 @@ struct uhci_qh {
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int state; /* QH_STATE_xxx; see above */
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int type; /* Queue type (control, bulk, etc) */
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dma_addr_t dma_handle;
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unsigned int initial_toggle:1; /* Endpoint's current toggle value */
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unsigned int needs_fixup:1; /* Must fix the TD toggle values */
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unsigned int is_stopped:1; /* Queue was stopped by error/unlink */
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@ -171,6 +171,8 @@ static inline __le32 qh_element(struct uhci_qh *qh) {
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return element;
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}
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#define LINK_TO_QH(qh) (UHCI_PTR_QH | cpu_to_le32((qh)->dma_handle))
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/*
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* Transfer Descriptors
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@ -264,6 +266,8 @@ static inline u32 td_status(struct uhci_td *td) {
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return le32_to_cpu(status);
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}
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#define LINK_TO_TD(td) (cpu_to_le32((td)->dma_handle))
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/*
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* Skeleton Queue Headers
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@ -46,8 +46,7 @@ static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci)
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static void uhci_fsbr_on(struct uhci_hcd *uhci)
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{
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uhci->fsbr_is_on = 1;
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uhci->skel_term_qh->link = cpu_to_le32(
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uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH;
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uhci->skel_term_qh->link = LINK_TO_QH(uhci->skel_fs_control_qh);
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}
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static void uhci_fsbr_off(struct uhci_hcd *uhci)
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@ -158,11 +157,11 @@ static inline void uhci_insert_td_in_frame_list(struct uhci_hcd *uhci,
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td->link = ltd->link;
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wmb();
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ltd->link = cpu_to_le32(td->dma_handle);
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ltd->link = LINK_TO_TD(td);
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} else {
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td->link = uhci->frame[framenum];
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wmb();
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uhci->frame[framenum] = cpu_to_le32(td->dma_handle);
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uhci->frame[framenum] = LINK_TO_TD(td);
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uhci->frame_cpu[framenum] = td;
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}
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}
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@ -184,7 +183,7 @@ static inline void uhci_remove_td_from_frame_list(struct uhci_hcd *uhci,
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struct uhci_td *ntd;
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ntd = list_entry(td->fl_list.next, struct uhci_td, fl_list);
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uhci->frame[td->frame] = cpu_to_le32(ntd->dma_handle);
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uhci->frame[td->frame] = LINK_TO_TD(ntd);
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uhci->frame_cpu[td->frame] = ntd;
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}
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} else {
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@ -421,7 +420,7 @@ static void uhci_activate_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
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struct uhci_td *td = list_entry(urbp->td_list.next,
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struct uhci_td, list);
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qh->element = cpu_to_le32(td->dma_handle);
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qh->element = LINK_TO_TD(td);
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}
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/* Treat the queue as if it has just advanced */
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@ -443,7 +442,7 @@ static void uhci_activate_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
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pqh = list_entry(qh->node.prev, struct uhci_qh, node);
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qh->link = pqh->link;
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wmb();
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pqh->link = UHCI_PTR_QH | cpu_to_le32(qh->dma_handle);
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pqh->link = LINK_TO_QH(qh);
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}
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/*
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@ -737,7 +736,7 @@ static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb,
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td = uhci_alloc_td(uhci);
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if (!td)
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goto nomem;
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*plink = cpu_to_le32(td->dma_handle);
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*plink = LINK_TO_TD(td);
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/* Alternate Data0/1 (start with Data1) */
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destination ^= TD_TOKEN_TOGGLE;
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@ -757,7 +756,7 @@ static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb,
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td = uhci_alloc_td(uhci);
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if (!td)
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goto nomem;
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*plink = cpu_to_le32(td->dma_handle);
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*plink = LINK_TO_TD(td);
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/*
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* It's IN if the pipe is an output pipe or we're not expecting
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@ -784,7 +783,7 @@ static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb,
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td = uhci_alloc_td(uhci);
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if (!td)
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goto nomem;
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*plink = cpu_to_le32(td->dma_handle);
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*plink = LINK_TO_TD(td);
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uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0);
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wmb();
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@ -860,7 +859,7 @@ static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb,
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td = uhci_alloc_td(uhci);
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if (!td)
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goto nomem;
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*plink = cpu_to_le32(td->dma_handle);
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*plink = LINK_TO_TD(td);
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}
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uhci_add_td_to_urbp(td, urbp);
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uhci_fill_td(td, status,
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@ -888,7 +887,7 @@ static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb,
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td = uhci_alloc_td(uhci);
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if (!td)
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goto nomem;
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*plink = cpu_to_le32(td->dma_handle);
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*plink = LINK_TO_TD(td);
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uhci_add_td_to_urbp(td, urbp);
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uhci_fill_td(td, status,
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@ -914,7 +913,7 @@ static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb,
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td = uhci_alloc_td(uhci);
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if (!td)
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goto nomem;
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*plink = cpu_to_le32(td->dma_handle);
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*plink = LINK_TO_TD(td);
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uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0);
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wmb();
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@ -1005,7 +1004,7 @@ static int uhci_fixup_short_transfer(struct uhci_hcd *uhci,
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* the queue at the status stage transaction, which is
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* the last TD. */
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WARN_ON(list_empty(&urbp->td_list));
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qh->element = cpu_to_le32(td->dma_handle);
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qh->element = LINK_TO_TD(td);
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tmp = td->list.prev;
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ret = -EINPROGRESS;
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@ -1566,8 +1565,7 @@ static int uhci_advance_check(struct uhci_hcd *uhci, struct uhci_qh *qh)
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if (time_after(jiffies, qh->advance_jiffies + QH_WAIT_TIMEOUT)) {
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/* Detect the Intel bug and work around it */
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if (qh->post_td && qh_element(qh) ==
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cpu_to_le32(qh->post_td->dma_handle)) {
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if (qh->post_td && qh_element(qh) == LINK_TO_TD(qh->post_td)) {
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qh->element = qh->post_td->link;
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qh->advance_jiffies = jiffies;
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ret = 1;
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