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pwm: rockchip: Add APB and function both clocks support
New PWM module provides two individual clocks for APB clock and function clock. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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@ -6,7 +6,13 @@ Required properties:
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"rockchip,rk3288-pwm": found on RK3288 SoC
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"rockchip,vop-pwm": found integrated in VOP on RK3288 SoC
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- reg: physical base address and length of the controller's registers
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- clocks: phandle and clock specifier of the PWM reference clock
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- clocks: See ../clock/clock-bindings.txt
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- For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399):
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- There is one clock that's used both to derive the functional clock
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for the device and as the bus clock.
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- For newer hardware (rk3328 and future socs): specified by name
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- "pwm": This is used to derive the functional clock.
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- "pclk": This is the APB bus clock.
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- #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.txt in this directory
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for a description of the cell format.
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@ -33,6 +33,7 @@
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struct rockchip_pwm_chip {
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struct pwm_chip chip;
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struct clk *clk;
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struct clk *pclk;
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const struct rockchip_pwm_data *data;
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void __iomem *base;
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};
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@ -145,7 +146,7 @@ static void rockchip_pwm_get_state(struct pwm_chip *chip,
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u64 tmp;
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int ret;
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ret = clk_enable(pc->clk);
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ret = clk_enable(pc->pclk);
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if (ret)
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return;
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@ -161,7 +162,7 @@ static void rockchip_pwm_get_state(struct pwm_chip *chip,
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pc->data->get_state(chip, pwm, state);
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clk_disable(pc->clk);
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clk_disable(pc->pclk);
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}
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static int rockchip_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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@ -224,7 +225,7 @@ static int rockchip_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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pwm_get_state(pwm, &curstate);
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enabled = curstate.enabled;
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ret = clk_enable(pc->clk);
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ret = clk_enable(pc->pclk);
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if (ret)
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return ret;
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@ -257,7 +258,7 @@ static int rockchip_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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rockchip_pwm_get_state(chip, pwm, state);
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out:
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clk_disable(pc->clk);
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clk_disable(pc->pclk);
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return ret;
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}
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@ -328,7 +329,7 @@ static int rockchip_pwm_probe(struct platform_device *pdev)
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const struct of_device_id *id;
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struct rockchip_pwm_chip *pc;
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struct resource *r;
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int ret;
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int ret, count;
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id = of_match_device(rockchip_pwm_dt_ids, &pdev->dev);
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if (!id)
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@ -343,13 +344,43 @@ static int rockchip_pwm_probe(struct platform_device *pdev)
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if (IS_ERR(pc->base))
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return PTR_ERR(pc->base);
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pc->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(pc->clk))
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return PTR_ERR(pc->clk);
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pc->clk = devm_clk_get(&pdev->dev, "pwm");
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if (IS_ERR(pc->clk)) {
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pc->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(pc->clk)) {
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ret = PTR_ERR(pc->clk);
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if (ret != -EPROBE_DEFER)
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dev_err(&pdev->dev, "Can't get bus clk: %d\n",
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ret);
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return ret;
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}
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}
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count = of_count_phandle_with_args(pdev->dev.of_node,
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"clocks", "#clock-cells");
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if (count == 2)
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pc->pclk = devm_clk_get(&pdev->dev, "pclk");
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else
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pc->pclk = pc->clk;
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if (IS_ERR(pc->pclk)) {
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ret = PTR_ERR(pc->pclk);
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if (ret != -EPROBE_DEFER)
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dev_err(&pdev->dev, "Can't get APB clk: %d\n", ret);
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return ret;
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}
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ret = clk_prepare_enable(pc->clk);
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if (ret)
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if (ret) {
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dev_err(&pdev->dev, "Can't prepare enable bus clk: %d\n", ret);
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return ret;
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}
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ret = clk_prepare(pc->pclk);
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if (ret) {
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dev_err(&pdev->dev, "Can't prepare APB clk: %d\n", ret);
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goto err_clk;
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}
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platform_set_drvdata(pdev, pc);
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@ -368,12 +399,20 @@ static int rockchip_pwm_probe(struct platform_device *pdev)
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if (ret < 0) {
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clk_unprepare(pc->clk);
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dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
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goto err_pclk;
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}
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/* Keep the PWM clk enabled if the PWM appears to be up and running. */
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if (!pwm_is_enabled(pc->chip.pwms))
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clk_disable(pc->clk);
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return 0;
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err_pclk:
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clk_unprepare(pc->pclk);
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err_clk:
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clk_disable_unprepare(pc->clk);
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return ret;
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}
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@ -395,6 +434,7 @@ static int rockchip_pwm_remove(struct platform_device *pdev)
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if (pwm_is_enabled(pc->chip.pwms))
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clk_disable(pc->clk);
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clk_unprepare(pc->pclk);
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clk_unprepare(pc->clk);
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return pwmchip_remove(&pc->chip);
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