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net: phy: microchip_t1: add lan87xx_config_rgmii_delay for lan87xx phy
Add a function to initialize phy rgmii delay according to phydev->interface. Signed-off-by: Yuiko Oshino <yuiko.oshino@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20211101162119.29275-1-yuiko.oshino@microchip.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -28,6 +28,11 @@
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#define LAN87XX_MASK_LINK_UP (0x0004)
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#define LAN87XX_MASK_LINK_DOWN (0x0002)
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/* MISC Control 1 Register */
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#define LAN87XX_CTRL_1 (0x11)
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#define LAN87XX_MASK_RGMII_TXC_DLY_EN (0x4000)
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#define LAN87XX_MASK_RGMII_RXC_DLY_EN (0x2000)
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/* phyaccess nested types */
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#define PHYACC_ATTR_MODE_READ 0
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#define PHYACC_ATTR_MODE_WRITE 1
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@ -112,6 +117,43 @@ static int access_ereg_modify_changed(struct phy_device *phydev,
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return rc;
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}
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static int lan87xx_config_rgmii_delay(struct phy_device *phydev)
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{
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int rc;
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if (!phy_interface_is_rgmii(phydev))
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return 0;
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rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
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PHYACC_ATTR_BANK_MISC, LAN87XX_CTRL_1, 0);
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if (rc < 0)
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return rc;
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switch (phydev->interface) {
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case PHY_INTERFACE_MODE_RGMII:
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rc &= ~LAN87XX_MASK_RGMII_TXC_DLY_EN;
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rc &= ~LAN87XX_MASK_RGMII_RXC_DLY_EN;
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break;
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case PHY_INTERFACE_MODE_RGMII_ID:
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rc |= LAN87XX_MASK_RGMII_TXC_DLY_EN;
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rc |= LAN87XX_MASK_RGMII_RXC_DLY_EN;
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break;
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case PHY_INTERFACE_MODE_RGMII_RXID:
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rc &= ~LAN87XX_MASK_RGMII_TXC_DLY_EN;
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rc |= LAN87XX_MASK_RGMII_RXC_DLY_EN;
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break;
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case PHY_INTERFACE_MODE_RGMII_TXID:
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rc |= LAN87XX_MASK_RGMII_TXC_DLY_EN;
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rc &= ~LAN87XX_MASK_RGMII_RXC_DLY_EN;
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break;
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default:
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return 0;
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}
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return access_ereg(phydev, PHYACC_ATTR_MODE_WRITE,
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PHYACC_ATTR_BANK_MISC, LAN87XX_CTRL_1, rc);
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}
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static int lan87xx_phy_init(struct phy_device *phydev)
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{
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static const struct access_ereg_val init[] = {
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@ -185,7 +227,7 @@ static int lan87xx_phy_init(struct phy_device *phydev)
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return rc;
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}
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return 0;
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return lan87xx_config_rgmii_delay(phydev);
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}
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static int lan87xx_phy_config_intr(struct phy_device *phydev)
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