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riscv: dts: starfive: add Star64 board devicetree

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The Pine64 Star64 is a development board based on the Starfive JH7110 SoC.
The board features:

- JH7110 SoC
- 4/8 GiB LPDDR4 DRAM
- AXP15060 PMIC
- 40 pin GPIO header
- 1x USB 3.0 host port
- 3x USB 2.0 host port
- 1x eMMC slot
- 1x MicroSD slot
- 1x QSPI Flash
- 2x 1Gbps Ethernet port
- 1x HDMI port
- 1x 4-lane DSI
- 1x 2-lane CSI
- 1x PCIe 2.0 x1 lane

Signed-off-by: Henry Bell <dmoo_dv@protonmail.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
Henry Bell 2024-05-23 21:55:38 +00:00 committed by Conor Dooley
parent c249e17c37
commit 2606bf583b
2 changed files with 62 additions and 0 deletions
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1
arch/riscv/boot/dts/starfive/Makefile
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@ -9,5 +9,6 @@ dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb
dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-pine64-star64.dtb
dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb

61
arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts Normal file
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@ -0,0 +1,61 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright (C) 2024 Henry Bell <dmoo_dv@protonmail.com>
*/
/dts-v1/;
#include "jh7110-common.dtsi"
/ {
model = "Pine64 Star64";
compatible = "pine64,star64", "starfive,jh7110";
aliases {
ethernet1 = &gmac1;
};
};
&gmac0 {
starfive,tx-use-rgmii-clk;
assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
};
&gmac1 {
phy-handle = <&phy1>;
phy-mode = "rgmii-id";
starfive,tx-use-rgmii-clk;
assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>;
assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
};
&phy0 {
rx-internal-delay-ps = <1900>;
tx-internal-delay-ps = <1500>;
motorcomm,rx-clk-drv-microamp = <2910>;
motorcomm,rx-data-drv-microamp = <2910>;
motorcomm,tx-clk-adj-enabled;
motorcomm,tx-clk-10-inverted;
motorcomm,tx-clk-100-inverted;
motorcomm,tx-clk-1000-inverted;
};
&phy1 {
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <300>;
motorcomm,rx-clk-drv-microamp = <2910>;
motorcomm,rx-data-drv-microamp = <2910>;
motorcomm,tx-clk-adj-enabled;
motorcomm,tx-clk-10-inverted;
motorcomm,tx-clk-100-inverted;
};