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ARM: SoC fixes
A mixed bag of fixes, some for merge window fallout (tegra, MXS), and a short series of fixes for marvell platforms that didn't make it in before 3.5. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQEfQ3AAoJEIwa5zzehBx3/+IP/05oy6/Hd1rG9JtkT/LTYlVu zZWsFdbjA/WaUtl+hqyHolUY74ZGAv0wllAUn+GSk5HPLGwMIgcZTmoNc7NXEDyh H6A8wlJFbgCL93Mj+483wrC5Uy1wtsYWS/VNbba6+LVmjX0mkjAi4Y+hjHz+dIO+ IiMacpUpmpiL8S8RtOghMVdTPySdQJYIG9/6z6fbvDdG3uu8RlgPdVfXbmCjx9c6 uicH7CtsG2if02YlyaRrYFQpl42aVPSZkwTVxpuZoCoEQxsPRMV8IKb7JLVh5yN0 4LeDPaUGaLqCwgtDCTin5tzC0/K1cQX+f+cpYIX0zic4P+4mSoMb5k6gtwHas6+4 6siGxFN9tGqKma9nx4PDiuGcLOmbg8vS8x9gOsZMg0ywtOjhTYZHmcI791LBW34P QQ01jub5gy5DyxYUbXMyLcidUrjEk6IKJc2tOgYniRDeFLj0PYPmCd1wTX228SnV TL5YLcakSx6xDD7Nsf5yvM3G5qwCMGQ3fCV30Vq+m2O3iAe+lmUfmBgl19rIF4wF uPRXbjOWo84mqF/tVVTW4h683AocQRNL2jTcCgg8LIu6zvGDQ07ex+7d662vo81Z vtUYWnbrl1DSKNEaNw1H/aRGQCaSMYYXt+LIi0n+Qy7LSMaFVdxvLYOeJqz6yA+W DTLD08qu4UpoQY2N+Kj5 =HZB3 -----END PGP SIGNATURE----- Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "A mixed bag of fixes, some for merge window fallout (tegra, MXS), and a short series of fixes for marvell platforms that didn't make it in before 3.5." * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: mxs: fix compile error caused by prom_update_property change ARM: dt: tegra trimslice: enable USB2 port ARM: dt: tegra trimslice: add vbus-gpio property ARM: vt8500: Add maintainer for VT8500 architecture ARM: Kirkwood: Replace mrvl with marvell ARM: Orion: fix driver probe error handling with respect to clk ARM: Dove: Fixup ge00 initialisation ARM: Kirkwood: Fix PHY disable clk problems ARM: Kirkwood: Ensure runit clock always ticks. ARM: versatile: Don't use platform clock for Integrator & VE ARM: tegra: harmony: add regulator supply name and its input supply
This commit is contained in:
commit
25918f9811
@ -1,7 +1,7 @@
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NAND support for Marvell Orion SoC platforms
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Required properties:
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- compatible : "mrvl,orion-nand".
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- compatible : "marvell,orion-nand".
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- reg : Base physical address of the NAND and length of memory mapped
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region
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@ -24,7 +24,7 @@ nand@f4000000 {
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ale = <1>;
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bank-width = <1>;
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chip-delay = <25>;
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compatible = "mrvl,orion-nand";
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compatible = "marvell,orion-nand";
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reg = <0xf4000000 0x400>;
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partition@0 {
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|
11
MAINTAINERS
11
MAINTAINERS
@ -1186,6 +1186,17 @@ S: Maintained
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F: arch/arm/mach-pxa/vpac270.c
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F: arch/arm/mach-pxa/include/mach/vpac270.h
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ARM/VT8500 ARM ARCHITECTURE
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M: Tony Prisk <linux@prisktech.co.nz>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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F: arch/arm/mach-vt8500/
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F: drivers/video/vt8500lcdfb.*
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F: drivers/video/wm8505fb*
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F: drivers/video/wmt_ge_rops.*
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F: drivers/tty/serial/vt8500_serial.c
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F: drivers/rtc/rtc-vt8500-c
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ARM/ZIPIT Z2 SUPPORT
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M: Marek Vasut <marek.vasut@gmail.com>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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@ -279,7 +279,6 @@ config ARCH_INTEGRATOR
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select ICST
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select GENERIC_CLOCKEVENTS
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select PLAT_VERSATILE
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select PLAT_VERSATILE_CLOCK
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select PLAT_VERSATILE_FPGA_IRQ
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select NEED_MACH_IO_H
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select NEED_MACH_MEMORY_H
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@ -336,7 +335,6 @@ config ARCH_VEXPRESS
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select ICST
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select NO_IOPORT
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select PLAT_VERSATILE
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select PLAT_VERSATILE_CLOCK
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select PLAT_VERSATILE_CLCD
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select REGULATOR_FIXED_VOLTAGE if REGULATOR
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help
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@ -4,7 +4,7 @@
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/ {
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model = "D-Link DNS-320 NAS (Rev A1)";
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compatible = "dlink,dns-320-a1", "dlink,dns-320", "dlink,dns-kirkwood", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
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compatible = "dlink,dns-320-a1", "dlink,dns-320", "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood";
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memory {
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device_type = "memory";
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@ -4,7 +4,7 @@
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/ {
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model = "D-Link DNS-325 NAS (Rev A1)";
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compatible = "dlink,dns-325-a1", "dlink,dns-325", "dlink,dns-kirkwood", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
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compatible = "dlink,dns-325-a1", "dlink,dns-325", "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood";
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memory {
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device_type = "memory";
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@ -4,7 +4,7 @@
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/ {
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model = "Globalscale Technologies Dreamplug";
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compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
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compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
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memory {
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device_type = "memory";
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|
@ -4,7 +4,7 @@
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/ {
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model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)";
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compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
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compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood";
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memory {
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device_type = "memory";
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|
@ -4,7 +4,7 @@
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/ {
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model = "Iomega Iconnect";
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compatible = "iom,iconnect-1.1", "iom,iconnect", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
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compatible = "iom,iconnect-1.1", "iom,iconnect", "marvell,kirkwood-88f6281", "marvell,kirkwood";
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memory {
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device_type = "memory";
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|
@ -1,7 +1,7 @@
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/include/ "skeleton.dtsi"
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/ {
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compatible = "mrvl,kirkwood";
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compatible = "marvell,kirkwood";
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ocp@f1000000 {
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compatible = "simple-bus";
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@ -28,7 +28,7 @@
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};
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rtc@10300 {
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compatible = "mrvl,kirkwood-rtc", "mrvl,orion-rtc";
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compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
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reg = <0x10300 0x20>;
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interrupts = <53>;
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};
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@ -39,7 +39,7 @@
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cle = <0>;
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ale = <1>;
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bank-width = <1>;
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compatible = "mrvl,orion-nand";
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compatible = "marvell,orion-nand";
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reg = <0x3000000 0x400>;
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chip-delay = <25>;
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/* set partition map and/or chip-delay in board dts */
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|
@ -276,9 +276,11 @@
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usb@c5000000 {
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status = "okay";
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nvidia,vbus-gpio = <&gpio 170 0>; /* gpio PV2 */
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};
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usb@c5004000 {
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status = "okay";
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nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
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};
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|
@ -101,8 +101,8 @@ void __init dove_ehci1_init(void)
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****************************************************************************/
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void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
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{
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orion_ge00_init(eth_data,
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DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM, 0);
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orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE,
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IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR);
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}
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/*****************************************************************************
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|
@ -67,6 +67,14 @@ void __init kirkwood_map_io(void)
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* CLK tree
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****************************************************************************/
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static void enable_sata0(void)
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{
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/* Enable PLL and IVREF */
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writel(readl(SATA0_PHY_MODE_2) | 0xf, SATA0_PHY_MODE_2);
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/* Enable PHY */
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writel(readl(SATA0_IF_CTRL) & ~0x200, SATA0_IF_CTRL);
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}
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static void disable_sata0(void)
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{
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/* Disable PLL and IVREF */
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@ -75,6 +83,14 @@ static void disable_sata0(void)
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writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
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}
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static void enable_sata1(void)
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{
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/* Enable PLL and IVREF */
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writel(readl(SATA1_PHY_MODE_2) | 0xf, SATA1_PHY_MODE_2);
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/* Enable PHY */
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writel(readl(SATA1_IF_CTRL) & ~0x200, SATA1_IF_CTRL);
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}
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static void disable_sata1(void)
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{
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/* Disable PLL and IVREF */
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@ -107,23 +123,38 @@ static void disable_pcie1(void)
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}
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}
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/* An extended version of the gated clk. This calls fn() before
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* disabling the clock. We use this to turn off PHYs etc. */
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/* An extended version of the gated clk. This calls fn_en()/fn_dis
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* before enabling/disabling the clock. We use this to turn on/off
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* PHYs etc. */
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struct clk_gate_fn {
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struct clk_gate gate;
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void (*fn)(void);
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void (*fn_en)(void);
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void (*fn_dis)(void);
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};
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#define to_clk_gate_fn(_gate) container_of(_gate, struct clk_gate_fn, gate)
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#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
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static int clk_gate_fn_enable(struct clk_hw *hw)
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{
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struct clk_gate *gate = to_clk_gate(hw);
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struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate);
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int ret;
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ret = clk_gate_ops.enable(hw);
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if (!ret && gate_fn->fn_en)
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gate_fn->fn_en();
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return ret;
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}
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static void clk_gate_fn_disable(struct clk_hw *hw)
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{
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struct clk_gate *gate = to_clk_gate(hw);
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struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate);
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if (gate_fn->fn)
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gate_fn->fn();
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if (gate_fn->fn_dis)
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gate_fn->fn_dis();
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clk_gate_ops.disable(hw);
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}
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@ -135,7 +166,7 @@ static struct clk __init *clk_register_gate_fn(struct device *dev,
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const char *parent_name, unsigned long flags,
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void __iomem *reg, u8 bit_idx,
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u8 clk_gate_flags, spinlock_t *lock,
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void (*fn)(void))
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void (*fn_en)(void), void (*fn_dis)(void))
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{
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struct clk_gate_fn *gate_fn;
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struct clk *clk;
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@ -159,11 +190,14 @@ static struct clk __init *clk_register_gate_fn(struct device *dev,
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gate_fn->gate.flags = clk_gate_flags;
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gate_fn->gate.lock = lock;
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gate_fn->gate.hw.init = &init;
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gate_fn->fn = fn;
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gate_fn->fn_en = fn_en;
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gate_fn->fn_dis = fn_dis;
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/* ops is the gate ops, but with our disable function */
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if (clk_gate_fn_ops.disable != clk_gate_fn_disable) {
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/* ops is the gate ops, but with our enable/disable functions */
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if (clk_gate_fn_ops.enable != clk_gate_fn_enable ||
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clk_gate_fn_ops.disable != clk_gate_fn_disable) {
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clk_gate_fn_ops = clk_gate_ops;
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clk_gate_fn_ops.enable = clk_gate_fn_enable;
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clk_gate_fn_ops.disable = clk_gate_fn_disable;
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}
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@ -187,11 +221,12 @@ static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx)
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static struct clk __init *kirkwood_register_gate_fn(const char *name,
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u8 bit_idx,
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void (*fn)(void))
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void (*fn_en)(void),
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void (*fn_dis)(void))
|
||||
{
|
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return clk_register_gate_fn(NULL, name, "tclk", 0,
|
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(void __iomem *)CLOCK_GATING_CTRL,
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||||
bit_idx, 0, &gating_lock, fn);
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||||
bit_idx, 0, &gating_lock, fn_en, fn_dis);
|
||||
}
|
||||
|
||||
static struct clk *ge0, *ge1;
|
||||
@ -208,18 +243,18 @@ void __init kirkwood_clk_init(void)
|
||||
ge0 = kirkwood_register_gate("ge0", CGC_BIT_GE0);
|
||||
ge1 = kirkwood_register_gate("ge1", CGC_BIT_GE1);
|
||||
sata0 = kirkwood_register_gate_fn("sata0", CGC_BIT_SATA0,
|
||||
disable_sata0);
|
||||
enable_sata0, disable_sata0);
|
||||
sata1 = kirkwood_register_gate_fn("sata1", CGC_BIT_SATA1,
|
||||
disable_sata1);
|
||||
enable_sata1, disable_sata1);
|
||||
usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0);
|
||||
sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO);
|
||||
crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);
|
||||
xor0 = kirkwood_register_gate("xor0", CGC_BIT_XOR0);
|
||||
xor1 = kirkwood_register_gate("xor1", CGC_BIT_XOR1);
|
||||
pex0 = kirkwood_register_gate_fn("pex0", CGC_BIT_PEX0,
|
||||
disable_pcie0);
|
||||
NULL, disable_pcie0);
|
||||
pex1 = kirkwood_register_gate_fn("pex1", CGC_BIT_PEX1,
|
||||
disable_pcie1);
|
||||
NULL, disable_pcie1);
|
||||
audio = kirkwood_register_gate("audio", CGC_BIT_AUDIO);
|
||||
kirkwood_register_gate("tdm", CGC_BIT_TDM);
|
||||
kirkwood_register_gate("tsu", CGC_BIT_TSU);
|
||||
@ -241,6 +276,11 @@ void __init kirkwood_clk_init(void)
|
||||
orion_clkdev_add("0", "pcie", pex0);
|
||||
orion_clkdev_add("1", "pcie", pex1);
|
||||
orion_clkdev_add(NULL, "kirkwood-i2s", audio);
|
||||
|
||||
/* Marvell says runit is used by SPI, UART, NAND, TWSI, ...,
|
||||
* so should never be gated.
|
||||
*/
|
||||
clk_prepare_enable(runit);
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
|
@ -162,7 +162,7 @@ enum mac_oui {
|
||||
static void __init update_fec_mac_prop(enum mac_oui oui)
|
||||
{
|
||||
struct device_node *np, *from = NULL;
|
||||
struct property *oldmac, *newmac;
|
||||
struct property *newmac;
|
||||
const u32 *ocotp = mxs_get_ocotp();
|
||||
u8 *macaddr;
|
||||
u32 val;
|
||||
@ -208,11 +208,7 @@ static void __init update_fec_mac_prop(enum mac_oui oui)
|
||||
macaddr[4] = (val >> 8) & 0xff;
|
||||
macaddr[5] = (val >> 0) & 0xff;
|
||||
|
||||
oldmac = of_find_property(np, newmac->name, NULL);
|
||||
if (oldmac)
|
||||
prom_update_property(np, newmac, oldmac);
|
||||
else
|
||||
prom_add_property(np, newmac);
|
||||
prom_update_property(np, newmac);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -19,6 +19,7 @@
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
#include <linux/mfd/tps6586x.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_i2c.h>
|
||||
@ -34,7 +35,9 @@ static struct regulator_consumer_supply tps658621_ldo0_supply[] = {
|
||||
};
|
||||
|
||||
static struct regulator_init_data ldo0_data = {
|
||||
.supply_regulator = "vdd_sm2",
|
||||
.constraints = {
|
||||
.name = "vdd_ldo0",
|
||||
.min_uV = 3300 * 1000,
|
||||
.max_uV = 3300 * 1000,
|
||||
.valid_modes_mask = (REGULATOR_MODE_NORMAL |
|
||||
@ -48,9 +51,11 @@ static struct regulator_init_data ldo0_data = {
|
||||
.consumer_supplies = tps658621_ldo0_supply,
|
||||
};
|
||||
|
||||
#define HARMONY_REGULATOR_INIT(_id, _minmv, _maxmv) \
|
||||
#define HARMONY_REGULATOR_INIT(_id, _name, _supply, _minmv, _maxmv) \
|
||||
static struct regulator_init_data _id##_data = { \
|
||||
.supply_regulator = _supply, \
|
||||
.constraints = { \
|
||||
.name = _name, \
|
||||
.min_uV = (_minmv)*1000, \
|
||||
.max_uV = (_maxmv)*1000, \
|
||||
.valid_modes_mask = (REGULATOR_MODE_NORMAL | \
|
||||
@ -61,18 +66,18 @@ static struct regulator_init_data ldo0_data = {
|
||||
}, \
|
||||
}
|
||||
|
||||
HARMONY_REGULATOR_INIT(sm0, 725, 1500);
|
||||
HARMONY_REGULATOR_INIT(sm1, 725, 1500);
|
||||
HARMONY_REGULATOR_INIT(sm2, 3000, 4550);
|
||||
HARMONY_REGULATOR_INIT(ldo1, 725, 1500);
|
||||
HARMONY_REGULATOR_INIT(ldo2, 725, 1500);
|
||||
HARMONY_REGULATOR_INIT(ldo3, 1250, 3300);
|
||||
HARMONY_REGULATOR_INIT(ldo4, 1700, 2475);
|
||||
HARMONY_REGULATOR_INIT(ldo5, 1250, 3300);
|
||||
HARMONY_REGULATOR_INIT(ldo6, 1250, 3300);
|
||||
HARMONY_REGULATOR_INIT(ldo7, 1250, 3300);
|
||||
HARMONY_REGULATOR_INIT(ldo8, 1250, 3300);
|
||||
HARMONY_REGULATOR_INIT(ldo9, 1250, 3300);
|
||||
HARMONY_REGULATOR_INIT(sm0, "vdd_sm0", "vdd_sys", 725, 1500);
|
||||
HARMONY_REGULATOR_INIT(sm1, "vdd_sm1", "vdd_sys", 725, 1500);
|
||||
HARMONY_REGULATOR_INIT(sm2, "vdd_sm2", "vdd_sys", 3000, 4550);
|
||||
HARMONY_REGULATOR_INIT(ldo1, "vdd_ldo1", "vdd_sm2", 725, 1500);
|
||||
HARMONY_REGULATOR_INIT(ldo2, "vdd_ldo2", "vdd_sm2", 725, 1500);
|
||||
HARMONY_REGULATOR_INIT(ldo3, "vdd_ldo3", "vdd_sm2", 1250, 3300);
|
||||
HARMONY_REGULATOR_INIT(ldo4, "vdd_ldo4", "vdd_sm2", 1700, 2475);
|
||||
HARMONY_REGULATOR_INIT(ldo5, "vdd_ldo5", NULL, 1250, 3300);
|
||||
HARMONY_REGULATOR_INIT(ldo6, "vdd_ldo6", "vdd_sm2", 1250, 3300);
|
||||
HARMONY_REGULATOR_INIT(ldo7, "vdd_ldo7", "vdd_sm2", 1250, 3300);
|
||||
HARMONY_REGULATOR_INIT(ldo8, "vdd_ldo8", "vdd_sm2", 1250, 3300);
|
||||
HARMONY_REGULATOR_INIT(ldo9, "vdd_ldo9", "vdd_sm2", 1250, 3300);
|
||||
|
||||
#define TPS_REG(_id, _data) \
|
||||
{ \
|
||||
@ -115,6 +120,8 @@ static struct i2c_board_info __initdata harmony_regulators[] = {
|
||||
int __init harmony_regulator_init(void)
|
||||
{
|
||||
if (machine_is_harmony()) {
|
||||
regulator_register_always_on(0, "vdd_sys",
|
||||
NULL, 0, 5000000);
|
||||
i2c_register_board_info(3, harmony_regulators, 1);
|
||||
} else { /* Harmony, booted using device tree */
|
||||
struct device_node *np;
|
||||
|
@ -1127,6 +1127,10 @@ err_unreg_ecb:
|
||||
crypto_unregister_alg(&mv_aes_alg_ecb);
|
||||
err_irq:
|
||||
free_irq(irq, cp);
|
||||
if (!IS_ERR(cp->clk)) {
|
||||
clk_disable_unprepare(cp->clk);
|
||||
clk_put(cp->clk);
|
||||
}
|
||||
err_thread:
|
||||
kthread_stop(cp->queue_th);
|
||||
err_unmap_sram:
|
||||
|
@ -839,6 +839,10 @@ out:
|
||||
if (r)
|
||||
release_resource(r);
|
||||
if (mmc)
|
||||
if (!IS_ERR_OR_NULL(host->clk)) {
|
||||
clk_disable_unprepare(host->clk);
|
||||
clk_put(host->clk);
|
||||
}
|
||||
mmc_free_host(mmc);
|
||||
|
||||
return ret;
|
||||
|
@ -183,6 +183,10 @@ static int __init orion_nand_probe(struct platform_device *pdev)
|
||||
return 0;
|
||||
|
||||
no_dev:
|
||||
if (!IS_ERR(clk)) {
|
||||
clk_disable_unprepare(clk);
|
||||
clk_put(clk);
|
||||
}
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
iounmap(io_base);
|
||||
no_res:
|
||||
@ -214,7 +218,7 @@ static int __devexit orion_nand_remove(struct platform_device *pdev)
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
static struct of_device_id orion_nand_of_match_table[] = {
|
||||
{ .compatible = "mrvl,orion-nand", },
|
||||
{ .compatible = "marvell,orion-nand", },
|
||||
{},
|
||||
};
|
||||
#endif
|
||||
|
@ -2983,6 +2983,12 @@ static int mv643xx_eth_probe(struct platform_device *pdev)
|
||||
return 0;
|
||||
|
||||
out:
|
||||
#if defined(CONFIG_HAVE_CLK)
|
||||
if (!IS_ERR(mp->clk)) {
|
||||
clk_disable_unprepare(mp->clk);
|
||||
clk_put(mp->clk);
|
||||
}
|
||||
#endif
|
||||
free_netdev(dev);
|
||||
|
||||
return err;
|
||||
|
@ -297,7 +297,7 @@ static int __exit mv_rtc_remove(struct platform_device *pdev)
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
static struct of_device_id rtc_mv_of_match_table[] = {
|
||||
{ .compatible = "mrvl,orion-rtc", },
|
||||
{ .compatible = "marvell,orion-rtc", },
|
||||
{}
|
||||
};
|
||||
#endif
|
||||
|
@ -283,6 +283,10 @@ static int __devinit ehci_orion_drv_probe(struct platform_device *pdev)
|
||||
err4:
|
||||
usb_put_hcd(hcd);
|
||||
err3:
|
||||
if (!IS_ERR(clk)) {
|
||||
clk_disable_unprepare(clk);
|
||||
clk_put(clk);
|
||||
}
|
||||
iounmap(regs);
|
||||
err2:
|
||||
release_mem_region(res->start, resource_size(res));
|
||||
|
@ -458,7 +458,13 @@ static __devinit int kirkwood_i2s_dev_probe(struct platform_device *pdev)
|
||||
}
|
||||
clk_prepare_enable(priv->clk);
|
||||
|
||||
return snd_soc_register_dai(&pdev->dev, &kirkwood_i2s_dai);
|
||||
err = snd_soc_register_dai(&pdev->dev, &kirkwood_i2s_dai);
|
||||
if (!err)
|
||||
return 0;
|
||||
dev_err(&pdev->dev, "snd_soc_register_dai failed\n");
|
||||
|
||||
clk_disable_unprepare(priv->clk);
|
||||
clk_put(priv->clk);
|
||||
|
||||
err_ioremap:
|
||||
iounmap(priv->io);
|
||||
|
Loading…
Reference in New Issue
Block a user