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ARM: OMAP2+: Incorrect Register Offsets in OMAP Mailbox

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Looks like the register offsets are incorrect in the OMAP mailbox code
(arch/arm/mach-omap2/mailbox.c) for the OMAP4_MAILBOX_IRQ* macros. The
discrepancy is with p.224 of TI document SPRUGX9 and p3891 of SWPU231K.

Acked-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Henry Chan <enli.chan@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tony Lindgren 2012-05-08 16:31:13 -07:00
parent 28ee793e7a
commit 256a4bd796
1 changed files with 3 additions and 3 deletions
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6
arch/arm/mach-omap2/mailbox.c
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@ -26,9 +26,9 @@
#define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u))
#define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u))
#define OMAP4_MAILBOX_IRQSTATUS(u) (0x104 + 10 * (u))
#define OMAP4_MAILBOX_IRQENABLE(u) (0x108 + 10 * (u))
#define OMAP4_MAILBOX_IRQENABLE_CLR(u) (0x10c + 10 * (u))
#define OMAP4_MAILBOX_IRQSTATUS(u) (0x104 + 0x10 * (u))
#define OMAP4_MAILBOX_IRQENABLE(u) (0x108 + 0x10 * (u))
#define OMAP4_MAILBOX_IRQENABLE_CLR(u) (0x10c + 0x10 * (u))
#define MAILBOX_IRQ_NEWMSG(m) (1 << (2 * (m)))
#define MAILBOX_IRQ_NOTFULL(m) (1 << (2 * (m) + 1))