From 0135c03df914f0481c61f097c78d37cece84f330 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Mon, 20 Feb 2017 11:50:09 +0100 Subject: [PATCH 01/16] spi/bcm63xx: make spi subsystem aware of message size limits The bcm63xx SPI controller does not allow manual control of the CS lines and will toggle it automatically before and after sending data, so we are limited to messages that fit in the FIFO buffer. Since the CS lines aren't available as GPIOs either, we will need to make slave drivers aware of this limitation so they can handle them accordingly. Signed-off-by: Jonas Gorski Signed-off-by: Mark Brown --- drivers/spi/spi-bcm63xx.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/spi/spi-bcm63xx.c b/drivers/spi/spi-bcm63xx.c index fee747030ee6..caa733ec405c 100644 --- a/drivers/spi/spi-bcm63xx.c +++ b/drivers/spi/spi-bcm63xx.c @@ -428,6 +428,13 @@ static irqreturn_t bcm63xx_spi_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } +static size_t bcm63xx_spi_max_length(struct spi_device *dev) +{ + struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); + + return bs->fifo_size; +} + static const unsigned long bcm6348_spi_reg_offsets[] = { [SPI_CMD] = SPI_6348_CMD, [SPI_INT_STATUS] = SPI_6348_INT_STATUS, @@ -541,6 +548,8 @@ static int bcm63xx_spi_probe(struct platform_device *pdev) master->transfer_one_message = bcm63xx_spi_transfer_one; master->mode_bits = MODEBITS; master->bits_per_word_mask = SPI_BPW_MASK(8); + master->max_transfer_size = bcm63xx_spi_max_length; + master->max_message_size = bcm63xx_spi_max_length; master->auto_runtime_pm = true; bs->msg_type_shift = bs->reg_offsets[SPI_MSG_TYPE_SHIFT]; bs->msg_ctl_width = bs->reg_offsets[SPI_MSG_CTL_WIDTH]; From c29f08890ae337e398becf5ba586114553e99771 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Tue, 21 Feb 2017 11:58:22 +0100 Subject: [PATCH 02/16] spi/bcm63xx: allow for probing through devicetree Add required binding support to probe through device tree. Use the compatible instead of the resource size for identifiying the block type, and allow reducing the number of cs lines through OF. Signed-off-by: Jonas Gorski Signed-off-by: Mark Brown --- drivers/spi/spi-bcm63xx.c | 42 +++++++++++++++++++++++++++++++++------ 1 file changed, 36 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-bcm63xx.c b/drivers/spi/spi-bcm63xx.c index caa733ec405c..325131370941 100644 --- a/drivers/spi/spi-bcm63xx.c +++ b/drivers/spi/spi-bcm63xx.c @@ -26,6 +26,7 @@ #include #include #include +#include /* BCM 6338/6348 SPI core */ #define SPI_6348_RSET_SIZE 64 @@ -484,21 +485,48 @@ static const struct platform_device_id bcm63xx_spi_dev_match[] = { }, }; +static const struct of_device_id bcm63xx_spi_of_match[] = { + { .compatible = "brcm,bcm6348-spi", .data = &bcm6348_spi_reg_offsets }, + { .compatible = "brcm,bcm6358-spi", .data = &bcm6358_spi_reg_offsets }, + { }, +}; + static int bcm63xx_spi_probe(struct platform_device *pdev) { struct resource *r; const unsigned long *bcm63xx_spireg; struct device *dev = &pdev->dev; - int irq; + int irq, bus_num; struct spi_master *master; struct clk *clk; struct bcm63xx_spi *bs; int ret; + u32 num_cs = BCM63XX_SPI_MAX_CS; - if (!pdev->id_entry->driver_data) + if (dev->of_node) { + const struct of_device_id *match; + + match = of_match_node(bcm63xx_spi_of_match, dev->of_node); + if (!match) + return -EINVAL; + bcm63xx_spireg = match->data; + + of_property_read_u32(dev->of_node, "num-cs", &num_cs); + if (num_cs > BCM63XX_SPI_MAX_CS) { + dev_warn(dev, "unsupported number of cs (%i), reducing to 8\n", + num_cs); + num_cs = BCM63XX_SPI_MAX_CS; + } + + bus_num = -1; + } else if (pdev->id_entry->driver_data) { + const struct platform_device_id *match = pdev->id_entry; + + bcm63xx_spireg = (const unsigned long *)match->driver_data; + bus_num = BCM63XX_SPI_BUS_NUM; + } else { return -EINVAL; - - bcm63xx_spireg = (const unsigned long *)pdev->id_entry->driver_data; + } irq = platform_get_irq(pdev, 0); if (irq < 0) { @@ -543,8 +571,9 @@ static int bcm63xx_spi_probe(struct platform_device *pdev) goto out_err; } - master->bus_num = BCM63XX_SPI_BUS_NUM; - master->num_chipselect = BCM63XX_SPI_MAX_CS; + master->dev.of_node = dev->of_node; + master->bus_num = bus_num; + master->num_chipselect = num_cs; master->transfer_one_message = bcm63xx_spi_transfer_one; master->mode_bits = MODEBITS; master->bits_per_word_mask = SPI_BPW_MASK(8); @@ -633,6 +662,7 @@ static struct platform_driver bcm63xx_spi_driver = { .driver = { .name = "bcm63xx-spi", .pm = &bcm63xx_spi_pm_ops, + .of_match_table = bcm63xx_spi_of_match, }, .id_table = bcm63xx_spi_dev_match, .probe = bcm63xx_spi_probe, From 54e43b6085f12bec3718806d0bf6ba4a3e4b2078 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Tue, 21 Feb 2017 11:58:21 +0100 Subject: [PATCH 03/16] spi/bcm63xx: document bcm63xx SPI devicetree bindings Add documentation for the bindings of the low speed SPI controller found on most bcm63xx SoCs. Signed-off-by: Jonas Gorski Signed-off-by: Mark Brown --- .../devicetree/bindings/spi/spi-bcm63xx.txt | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-bcm63xx.txt diff --git a/Documentation/devicetree/bindings/spi/spi-bcm63xx.txt b/Documentation/devicetree/bindings/spi/spi-bcm63xx.txt new file mode 100644 index 000000000000..1c16f6692613 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-bcm63xx.txt @@ -0,0 +1,33 @@ +Binding for Broadcom BCM6348/BCM6358 SPI controller + +Required properties: +- compatible: must contain one of "brcm,bcm6348-spi", "brcm,bcm6358-spi". +- reg: Base address and size of the controllers memory area. +- interrupts: Interrupt for the SPI block. +- clocks: phandle of the SPI clock. +- clock-names: has to be "spi". +- #address-cells: <1>, as required by generic SPI binding. +- #size-cells: <0>, also as required by generic SPI binding. + +Optional properties: +- num-cs: some controllers have less than 8 cs signals. Defaults to 8 + if absent. + +Child nodes as per the generic SPI binding. + +Example: + + spi@10000800 { + compatible = "brcm,bcm6368-spi", "brcm,bcm6358-spi"; + reg = <0x10000800 0x70c>; + + interrupts = <1>; + + clocks = <&clkctl 9>; + clock-names = "spi"; + + num-cs = <5>; + + #address-cells = <1>; + #size-cells = <0>; + }; From ccd0657c33b2c3701c5b14725284b7e671d3fb93 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Wed, 22 Feb 2017 00:30:40 +0100 Subject: [PATCH 04/16] spi/bcm63xx: fix typo in bcm63xx_spi_max_length breaking compilation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix compilation by renaming argument dev to spi as expected by the code. Fixes the following error: drivers/spi/spi-bcm63xx.c: In function ‘bcm63xx_spi_max_length’: drivers/spi/spi-bcm63xx.c:434:50: error: ‘spi’ undeclared (first use in this function) struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); ^~~ Fixes: 0135c03df914 ("spi/bcm63xx: make spi subsystem aware of message size limits") Signed-off-by: Jonas Gorski Signed-off-by: Mark Brown --- drivers/spi/spi-bcm63xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-bcm63xx.c b/drivers/spi/spi-bcm63xx.c index 325131370941..247f71b02235 100644 --- a/drivers/spi/spi-bcm63xx.c +++ b/drivers/spi/spi-bcm63xx.c @@ -429,7 +429,7 @@ static irqreturn_t bcm63xx_spi_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static size_t bcm63xx_spi_max_length(struct spi_device *dev) +static size_t bcm63xx_spi_max_length(struct spi_device *spi) { struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); From 8aedbf580d21121d2a032e4c8ea12d8d2d85e275 Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Thu, 23 Feb 2017 19:01:56 +0100 Subject: [PATCH 05/16] spi: davinci: Use SPI framework to handle DMA mapping Uppers layers like MTD can pass vmalloc'd buffers to the SPI driver, and the current implementation will fail to map these kind of buffers. The SPI framework is able to detect the best way to handle and map buffers. This commit updates the davinci SPI driver in order to use the SPI framework to handle the DMA mapping of buffers coming from an upper layer. Signed-off-by: Fabien Parent Signed-off-by: Frode Isaksen Signed-off-by: Mark Brown --- drivers/spi/spi-davinci.c | 69 ++++++++++----------------------------- 1 file changed, 18 insertions(+), 51 deletions(-) diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index 02fb96797ac8..164cc719be54 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -467,6 +467,19 @@ static void davinci_spi_cleanup(struct spi_device *spi) kfree(spicfg); } +static bool davinci_spi_can_dma(struct spi_master *master, + struct spi_device *spi, + struct spi_transfer *xfer) +{ + struct davinci_spi_config *spicfg = spi->controller_data; + bool can_dma = false; + + if (spicfg) + can_dma = spicfg->io_type == SPI_IO_TYPE_DMA; + + return can_dma; +} + static int davinci_spi_check_error(struct davinci_spi *dspi, int int_status) { struct device *sdev = dspi->bitbang.master->dev.parent; @@ -581,8 +594,6 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) struct davinci_spi_config *spicfg; struct davinci_spi_platform_data *pdata; unsigned uninitialized_var(rx_buf_count); - void *dummy_buf = NULL; - struct scatterlist sg_rx, sg_tx; dspi = spi_master_get_devdata(spi->master); pdata = &dspi->pdata; @@ -630,51 +641,18 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) }; struct dma_async_tx_descriptor *rxdesc; struct dma_async_tx_descriptor *txdesc; - void *buf; - - dummy_buf = kzalloc(t->len, GFP_KERNEL); - if (!dummy_buf) - goto err_alloc_dummy_buf; dmaengine_slave_config(dspi->dma_rx, &dma_rx_conf); dmaengine_slave_config(dspi->dma_tx, &dma_tx_conf); - sg_init_table(&sg_rx, 1); - if (!t->rx_buf) - buf = dummy_buf; - else - buf = t->rx_buf; - t->rx_dma = dma_map_single(&spi->dev, buf, - t->len, DMA_FROM_DEVICE); - if (dma_mapping_error(&spi->dev, !t->rx_dma)) { - ret = -EFAULT; - goto err_rx_map; - } - sg_dma_address(&sg_rx) = t->rx_dma; - sg_dma_len(&sg_rx) = t->len; - - sg_init_table(&sg_tx, 1); - if (!t->tx_buf) - buf = dummy_buf; - else - buf = (void *)t->tx_buf; - t->tx_dma = dma_map_single(&spi->dev, buf, - t->len, DMA_TO_DEVICE); - if (dma_mapping_error(&spi->dev, t->tx_dma)) { - ret = -EFAULT; - goto err_tx_map; - } - sg_dma_address(&sg_tx) = t->tx_dma; - sg_dma_len(&sg_tx) = t->len; - rxdesc = dmaengine_prep_slave_sg(dspi->dma_rx, - &sg_rx, 1, DMA_DEV_TO_MEM, + t->rx_sg.sgl, t->rx_sg.nents, DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); if (!rxdesc) goto err_desc; txdesc = dmaengine_prep_slave_sg(dspi->dma_tx, - &sg_tx, 1, DMA_MEM_TO_DEV, + t->tx_sg.sgl, t->tx_sg.nents, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); if (!txdesc) goto err_desc; @@ -710,16 +688,9 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) } clear_io_bits(dspi->base + SPIINT, SPIINT_MASKALL); - if (spicfg->io_type == SPI_IO_TYPE_DMA) { + if (spicfg->io_type == SPI_IO_TYPE_DMA) clear_io_bits(dspi->base + SPIINT, SPIINT_DMA_REQ_EN); - dma_unmap_single(&spi->dev, t->rx_dma, - t->len, DMA_FROM_DEVICE); - dma_unmap_single(&spi->dev, t->tx_dma, - t->len, DMA_TO_DEVICE); - kfree(dummy_buf); - } - clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); set_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); @@ -742,12 +713,6 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) return t->len; err_desc: - dma_unmap_single(&spi->dev, t->tx_dma, t->len, DMA_TO_DEVICE); -err_tx_map: - dma_unmap_single(&spi->dev, t->rx_dma, t->len, DMA_FROM_DEVICE); -err_rx_map: - kfree(dummy_buf); -err_alloc_dummy_buf: return ret; } @@ -988,8 +953,10 @@ static int davinci_spi_probe(struct platform_device *pdev) master->bus_num = pdev->id; master->num_chipselect = pdata->num_chipselect; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16); + master->flags = (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX); master->setup = davinci_spi_setup; master->cleanup = davinci_spi_cleanup; + master->can_dma = davinci_spi_can_dma; dspi->bitbang.chipselect = davinci_spi_chipselect; dspi->bitbang.setup_transfer = davinci_spi_setup_transfer; From 3e2e1258443ea97e40dfb4a3cf15108d17939066 Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Thu, 23 Feb 2017 19:01:57 +0100 Subject: [PATCH 06/16] spi: davinci: enable DMA when channels are defined in DT When booting with DT the SPI driver is always using the SPI_IO_TYPE_INTR mode to transfer data even if DMA channels are defined in the DT. This commit changes the behaviour to select the SPI_IO_TYPE_DMA mode if DMA channels are defined in the DT and will keep SPI_IO_TYPE_INTR if the channels are not defined in it. Signed-off-by: Fabien Parent Signed-off-by: Frode Isaksen Signed-off-by: Mark Brown --- drivers/spi/spi-davinci.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index 164cc719be54..1e24395a04f2 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -389,6 +389,7 @@ static int davinci_spi_of_setup(struct spi_device *spi) { struct davinci_spi_config *spicfg = spi->controller_data; struct device_node *np = spi->dev.of_node; + struct davinci_spi *dspi = spi_master_get_devdata(spi->master); u32 prop; if (spicfg == NULL && np) { @@ -400,6 +401,9 @@ static int davinci_spi_of_setup(struct spi_device *spi) if (!of_property_read_u32(np, "ti,spi-wdelay", &prop)) spicfg->wdelay = (u8)prop; spi->controller_data = spicfg; + + if (dspi->dma_rx && dspi->dma_tx) + spicfg->io_type = SPI_IO_TYPE_DMA; } return 0; From ff18e1ef04e2073889569b07a5ddd54a6527917f Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Wed, 1 Mar 2017 10:08:12 +0100 Subject: [PATCH 07/16] spi/bcm63xx-hsspi: allow providing clock rate through a second clock The HSSPI block actually has two clock inputs, one for gating the block, and one for the PLL rate. To allow these to be represented as two clocks, add support for retrieving the rate from a separate "pll" clock, if the "hsspi" clock does not provide one. Signed-off-by: Jonas Gorski Acked-by: Florian Fainelli Signed-off-by: Mark Brown --- drivers/spi/spi-bcm63xx-hsspi.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-bcm63xx-hsspi.c b/drivers/spi/spi-bcm63xx-hsspi.c index 55789f7cda92..79096d17ebde 100644 --- a/drivers/spi/spi-bcm63xx-hsspi.c +++ b/drivers/spi/spi-bcm63xx-hsspi.c @@ -351,8 +351,16 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev) return PTR_ERR(clk); rate = clk_get_rate(clk); - if (!rate) - return -EINVAL; + if (!rate) { + struct clk *pll_clk = devm_clk_get(dev, "pll"); + + if (IS_ERR(pll_clk)) + return PTR_ERR(pll_clk); + + rate = clk_get_rate(pll_clk); + if (!rate) + return -EINVAL; + } ret = clk_prepare_enable(clk); if (ret) From 8c0951afd8a7585a4281980b9a21dcc8a419cad9 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Wed, 1 Mar 2017 10:08:13 +0100 Subject: [PATCH 08/16] spi/bcm63xx-hsspi: document bcm63xx HS SPI devicetree bindings Add documentation for the bindings of the high speed SPI controller found on newer bcm63xx SoCs. Signed-off-by: Jonas Gorski Acked-by: Rob Herring Signed-off-by: Mark Brown --- .../bindings/spi/spi-bcm63xx-hsspi.txt | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt diff --git a/Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt b/Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt new file mode 100644 index 000000000000..37b29ee13860 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt @@ -0,0 +1,33 @@ +Binding for Broadcom BCM6328 High Speed SPI controller + +Required properties: +- compatible: must contain of "brcm,bcm6328-hsspi". +- reg: Base address and size of the controllers memory area. +- interrupts: Interrupt for the SPI block. +- clocks: phandles of the SPI clock and the PLL clock. +- clock-names: must be "hsspi", "pll". +- #address-cells: <1>, as required by generic SPI binding. +- #size-cells: <0>, also as required by generic SPI binding. + +Optional properties: +- num-cs: some controllers have less than 8 cs signals. Defaults to 8 + if absent. + +Child nodes as per the generic SPI binding. + +Example: + + spi@10001000 { + compatible = "brcm,bcm6328-hsspi"; + reg = <0x10001000 0x600>; + + interrupts = <29>; + + clocks = <&clkctl 9>, <&hsspi_pll>; + clock-names = "hsspi", "pll"; + + num-cs = <2>; + + #address-cells = <1>; + #size-cells = <0>; + }; From 7ab2463550e2a3a5b97dfa82e5bf8038b986f007 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Wed, 1 Mar 2017 10:08:14 +0100 Subject: [PATCH 09/16] spi/bcm63xx-hsspi: allow for probing through devicetree Add required binding support to probe through device tree. Signed-off-by: Jonas Gorski Acked-by: Florian Fainelli Signed-off-by: Mark Brown --- drivers/spi/spi-bcm63xx-hsspi.c | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-bcm63xx-hsspi.c b/drivers/spi/spi-bcm63xx-hsspi.c index 79096d17ebde..5514cd02e93a 100644 --- a/drivers/spi/spi-bcm63xx-hsspi.c +++ b/drivers/spi/spi-bcm63xx-hsspi.c @@ -19,6 +19,7 @@ #include #include #include +#include #define HSSPI_GLOBAL_CTRL_REG 0x0 #define GLOBAL_CTRL_CS_POLARITY_SHIFT 0 @@ -91,6 +92,7 @@ #define HSSPI_MAX_SYNC_CLOCK 30000000 +#define HSSPI_SPI_MAX_CS 8 #define HSSPI_BUS_NUM 1 /* 0 is legacy SPI */ struct bcm63xx_hsspi { @@ -332,7 +334,7 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct clk *clk; int irq, ret; - u32 reg, rate; + u32 reg, rate, num_cs = HSSPI_SPI_MAX_CS; irq = platform_get_irq(pdev, 0); if (irq < 0) { @@ -382,8 +384,17 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev) mutex_init(&bs->bus_mutex); init_completion(&bs->done); - master->bus_num = HSSPI_BUS_NUM; - master->num_chipselect = 8; + master->dev.of_node = dev->of_node; + if (!dev->of_node) + master->bus_num = HSSPI_BUS_NUM; + + of_property_read_u32(dev->of_node, "num-cs", &num_cs); + if (num_cs > 8) { + dev_warn(dev, "unsupported number of cs (%i), reducing to 8\n", + num_cs); + num_cs = HSSPI_SPI_MAX_CS; + } + master->num_chipselect = num_cs; master->setup = bcm63xx_hsspi_setup; master->transfer_one_message = bcm63xx_hsspi_transfer_one; master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | @@ -469,10 +480,16 @@ static int bcm63xx_hsspi_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(bcm63xx_hsspi_pm_ops, bcm63xx_hsspi_suspend, bcm63xx_hsspi_resume); +static const struct of_device_id bcm63xx_hsspi_of_match[] = { + { .compatible = "brcm,bcm6328-hsspi", }, + { }, +}; + static struct platform_driver bcm63xx_hsspi_driver = { .driver = { .name = "bcm63xx-hsspi", .pm = &bcm63xx_hsspi_pm_ops, + .of_match_table = bcm63xx_hsspi_of_match, }, .probe = bcm63xx_hsspi_probe, .remove = bcm63xx_hsspi_remove, From 6b3a631e7f8eca75a987ed760898d28fb3628143 Mon Sep 17 00:00:00 2001 From: Frode Isaksen Date: Thu, 23 Feb 2017 19:01:58 +0100 Subject: [PATCH 10/16] spi: davinci: use rx buffer as dummy tx buffer When doing rx-only transfer, the transfer will fail if the number of SG entries exceeds 20. This happens because the eDMA DMA engine is limited to 20 SG entries in one transaction, and when the DMA transcation is resumed (which takes > 150us), rx errors occurs because the slave is still transmitting. Fix this by using the rx buffer as the dummy tx buffer, so that resuming the rx transcation happens at the same time as resuming the tx transcation. Signed-off-by: Frode Isaksen Signed-off-by: Mark Brown --- drivers/spi/spi-davinci.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index 1e24395a04f2..ca122165a3c6 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -655,6 +655,12 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) if (!rxdesc) goto err_desc; + if (!t->tx_buf) { + /* use rx buffer as dummy tx buffer */ + t->tx_sg.sgl = t->rx_sg.sgl; + t->tx_sg.nents = t->rx_sg.nents; + } + txdesc = dmaengine_prep_slave_sg(dspi->dma_tx, t->tx_sg.sgl, t->tx_sg.nents, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); @@ -957,7 +963,7 @@ static int davinci_spi_probe(struct platform_device *pdev) master->bus_num = pdev->id; master->num_chipselect = pdata->num_chipselect; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16); - master->flags = (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX); + master->flags = SPI_MASTER_MUST_RX; master->setup = davinci_spi_setup; master->cleanup = davinci_spi_cleanup; master->can_dma = davinci_spi_can_dma; From 0718b764880434ac7a5b7c0f5cb2c805c589a807 Mon Sep 17 00:00:00 2001 From: Frode Isaksen Date: Thu, 23 Feb 2017 19:01:59 +0100 Subject: [PATCH 11/16] spi: davinci: do not use DMA if transfer length is less than 16 Higher bitrate and lower CPU load if using PIO in this case. Signed-off-by: Frode Isaksen Signed-off-by: Mark Brown --- drivers/spi/spi-davinci.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index ca122165a3c6..75c658e4e487 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -109,6 +109,8 @@ #define SPIDEF 0x4c #define SPIFMT0 0x50 +#define DMA_MIN_BYTES 16 + /* SPI Controller driver's private data. */ struct davinci_spi { struct spi_bitbang bitbang; @@ -479,7 +481,8 @@ static bool davinci_spi_can_dma(struct spi_master *master, bool can_dma = false; if (spicfg) - can_dma = spicfg->io_type == SPI_IO_TYPE_DMA; + can_dma = (spicfg->io_type == SPI_IO_TYPE_DMA) && + (xfer->len >= DMA_MIN_BYTES); return can_dma; } @@ -620,10 +623,9 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) reinit_completion(&dspi->done); - if (spicfg->io_type == SPI_IO_TYPE_INTR) - set_io_bits(dspi->base + SPIINT, SPIINT_MASKINT); - - if (spicfg->io_type != SPI_IO_TYPE_DMA) { + if (!davinci_spi_can_dma(spi->master, spi, t)) { + if (spicfg->io_type != SPI_IO_TYPE_POLL) + set_io_bits(dspi->base + SPIINT, SPIINT_MASKINT); /* start the transfer */ dspi->wcount--; tx_data = dspi->get_tx(dspi); @@ -698,7 +700,7 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) } clear_io_bits(dspi->base + SPIINT, SPIINT_MASKALL); - if (spicfg->io_type == SPI_IO_TYPE_DMA) + if (davinci_spi_can_dma(spi->master, spi, t)) clear_io_bits(dspi->base + SPIINT, SPIINT_DMA_REQ_EN); clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); From 4dd9becbce4f10009322c3e2297f9db3ace94a10 Mon Sep 17 00:00:00 2001 From: Frode Isaksen Date: Thu, 23 Feb 2017 19:02:00 +0100 Subject: [PATCH 12/16] spi: davinci: do not use DMA for vmalloc'ed buffers Using vmalloc'ed buffers will fail since daVinci has VIVT cache and only the kernel lowmem virtual address is invalidated/flushed when performing DMA. The virtual address returned from vmalloc() is not invalidated/flushed and may contain stale data when returning from spi_sync(). Fixes errors when running UBIFS over SPI NOR. Revert this when all upper layer users of vmalloc'ed buffers sent to SPI handles cache flushing/invalidating. Signed-off-by: Frode Isaksen Signed-off-by: Mark Brown --- drivers/spi/spi-davinci.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index 75c658e4e487..f37bbdd18d61 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -482,7 +482,9 @@ static bool davinci_spi_can_dma(struct spi_master *master, if (spicfg) can_dma = (spicfg->io_type == SPI_IO_TYPE_DMA) && - (xfer->len >= DMA_MIN_BYTES); + (xfer->len >= DMA_MIN_BYTES) && + !is_vmalloc_addr(xfer->rx_buf) && + !is_vmalloc_addr(xfer->tx_buf); return can_dma; } From 1234e8398fe03267bf2e353e36825dbd0abc2fc6 Mon Sep 17 00:00:00 2001 From: Frode Isaksen Date: Fri, 17 Mar 2017 16:41:10 +0100 Subject: [PATCH 13/16] spi: davinci: add comment about dummy tx buffer usage Add explanation about using the the rx buffer as the dummy tx buffer. Signed-off-by: Frode Isaksen Signed-off-by: Mark Brown --- drivers/spi/spi-davinci.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index f37bbdd18d61..595acdcfc7d0 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -660,7 +660,11 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) goto err_desc; if (!t->tx_buf) { - /* use rx buffer as dummy tx buffer */ + /* To avoid errors when doing rx-only transfers with + * many SG entries (> 20), use the rx buffer as the + * dummy tx buffer so that dma reloads are done at the + * same time for rx and tx. + */ t->tx_sg.sgl = t->rx_sg.sgl; t->tx_sg.nents = t->rx_sg.nents; } From 05514c86965f98f9b0e57f73700771fa267050a7 Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Wed, 12 Apr 2017 09:05:19 +0200 Subject: [PATCH 14/16] spi: atmel: factorize reusable code for SPI controller init The SPI controller configuration during the init can be reused, for the resume function for example. Let's move this configuration to a separate function. Signed-off-by: Quentin Schulz Acked-by: Nicolas Ferre Signed-off-by: Mark Brown --- drivers/spi/spi-atmel.c | 35 +++++++++++++++++++++-------------- 1 file changed, 21 insertions(+), 14 deletions(-) diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 0e7712bac3b6..247d920a512f 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -1464,6 +1464,25 @@ static int atmel_spi_gpio_cs(struct platform_device *pdev) return 0; } +static void atmel_spi_init(struct atmel_spi *as) +{ + spi_writel(as, CR, SPI_BIT(SWRST)); + spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ + if (as->caps.has_wdrbt) { + spi_writel(as, MR, SPI_BIT(WDRBT) | SPI_BIT(MODFDIS) + | SPI_BIT(MSTR)); + } else { + spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS)); + } + + if (as->use_pdc) + spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS)); + spi_writel(as, CR, SPI_BIT(SPIEN)); + + if (as->fifo_size) + spi_writel(as, CR, SPI_BIT(FIFOEN)); +} + static int atmel_spi_probe(struct platform_device *pdev) { struct resource *regs; @@ -1572,26 +1591,14 @@ static int atmel_spi_probe(struct platform_device *pdev) as->spi_clk = clk_get_rate(clk); - spi_writel(as, CR, SPI_BIT(SWRST)); - spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ - if (as->caps.has_wdrbt) { - spi_writel(as, MR, SPI_BIT(WDRBT) | SPI_BIT(MODFDIS) - | SPI_BIT(MSTR)); - } else { - spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS)); - } - - if (as->use_pdc) - spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS)); - spi_writel(as, CR, SPI_BIT(SPIEN)); - as->fifo_size = 0; if (!of_property_read_u32(pdev->dev.of_node, "atmel,fifo-size", &as->fifo_size)) { dev_info(&pdev->dev, "Using FIFO (%u data)\n", as->fifo_size); - spi_writel(as, CR, SPI_BIT(FIFOEN)); } + atmel_spi_init(as); + pm_runtime_set_autosuspend_delay(&pdev->dev, AUTOSUSPEND_TIMEOUT); pm_runtime_use_autosuspend(&pdev->dev); pm_runtime_set_active(&pdev->dev); From e53800787a251d67e532fadf72886be0661aba12 Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Fri, 14 Apr 2017 10:22:43 +0200 Subject: [PATCH 15/16] spi: atmel: add deepest PM support to SAMA5D2 This adds deepest (Backup+Self-Refresh) PM support to the ATMEL SAMA5D2 SoC's SPI controller. When resuming from deepest state, it is required to restore MR register as the registers are lost since VDD core has been shut down when entering deepest state on the SAMA5D2. Signed-off-by: Quentin Schulz Acked-by: Alexandre Belloni Acked-by: Nicolas Ferre Signed-off-by: Mark Brown --- drivers/spi/spi-atmel.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 247d920a512f..1eb83c9613d5 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -1702,8 +1702,17 @@ static int atmel_spi_suspend(struct device *dev) static int atmel_spi_resume(struct device *dev) { struct spi_master *master = dev_get_drvdata(dev); + struct atmel_spi *as = spi_master_get_devdata(master); int ret; + ret = clk_prepare_enable(as->clk); + if (ret) + return ret; + + atmel_spi_init(as); + + clk_disable_unprepare(as->clk); + if (!pm_runtime_suspended(dev)) { ret = atmel_spi_runtime_resume(dev); if (ret) From b42a33bd93fe0b2438511b1c7c00cfd47e17841b Mon Sep 17 00:00:00 2001 From: Moritz Fischer Date: Tue, 25 Apr 2017 11:30:14 -0700 Subject: [PATCH 16/16] spi: cadence: Allow for GPIO pins to be used as chipselects This adds support for using GPIOs for chipselects as described by the default dt-bindings. Signed-off-by: Moritz Fischer Signed-off-by: Mark Brown --- drivers/spi/spi-cadence.c | 65 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c index 1c57ce64abba..f0b5c7b91f37 100644 --- a/drivers/spi/spi-cadence.c +++ b/drivers/spi/spi-cadence.c @@ -13,6 +13,7 @@ #include #include +#include #include #include #include @@ -127,6 +128,10 @@ struct cdns_spi { u32 is_decoded_cs; }; +struct cdns_spi_device_data { + bool gpio_requested; +}; + /* Macros for the SPI controller read/write */ static inline u32 cdns_spi_read(struct cdns_spi *xspi, u32 offset) { @@ -456,6 +461,64 @@ static int cdns_unprepare_transfer_hardware(struct spi_master *master) return 0; } +static int cdns_spi_setup(struct spi_device *spi) +{ + + int ret = -EINVAL; + struct cdns_spi_device_data *cdns_spi_data = spi_get_ctldata(spi); + + /* this is a pin managed by the controller, leave it alone */ + if (spi->cs_gpio == -ENOENT) + return 0; + + /* this seems to be the first time we're here */ + if (!cdns_spi_data) { + cdns_spi_data = kzalloc(sizeof(*cdns_spi_data), GFP_KERNEL); + if (!cdns_spi_data) + return -ENOMEM; + cdns_spi_data->gpio_requested = false; + spi_set_ctldata(spi, cdns_spi_data); + } + + /* if we haven't done so, grab the gpio */ + if (!cdns_spi_data->gpio_requested && gpio_is_valid(spi->cs_gpio)) { + ret = gpio_request_one(spi->cs_gpio, + (spi->mode & SPI_CS_HIGH) ? + GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH, + dev_name(&spi->dev)); + if (ret) + dev_err(&spi->dev, "can't request chipselect gpio %d\n", + spi->cs_gpio); + else + cdns_spi_data->gpio_requested = true; + } else { + if (gpio_is_valid(spi->cs_gpio)) { + int mode = ((spi->mode & SPI_CS_HIGH) ? + GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH); + + ret = gpio_direction_output(spi->cs_gpio, mode); + if (ret) + dev_err(&spi->dev, "chipselect gpio %d setup failed (%d)\n", + spi->cs_gpio, ret); + } + } + + return ret; +} + +static void cdns_spi_cleanup(struct spi_device *spi) +{ + struct cdns_spi_device_data *cdns_spi_data = spi_get_ctldata(spi); + + if (cdns_spi_data) { + if (cdns_spi_data->gpio_requested) + gpio_free(spi->cs_gpio); + kfree(cdns_spi_data); + spi_set_ctldata(spi, NULL); + } + +} + /** * cdns_spi_probe - Probe method for the SPI driver * @pdev: Pointer to the platform_device structure @@ -555,6 +618,8 @@ static int cdns_spi_probe(struct platform_device *pdev) master->transfer_one = cdns_transfer_one; master->unprepare_transfer_hardware = cdns_unprepare_transfer_hardware; master->set_cs = cdns_spi_chipselect; + master->setup = cdns_spi_setup; + master->cleanup = cdns_spi_cleanup; master->auto_runtime_pm = true; master->mode_bits = SPI_CPOL | SPI_CPHA;