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drm/amd/display: Set max VTotal cap for dcn401
[WHY&HOW] Set max VTotal cap for dcn401 because VTotal register is only 16 bits wide on dcn401. Reviewed-by: Chris Park <chris.park@amd.com> Signed-off-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1822,6 +1822,7 @@ static bool dcn401_resource_construct(
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dc->caps.edp_dsc_support = true;
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dc->caps.extended_aux_timeout_support = true;
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dc->caps.dmcub_support = true;
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dc->caps.max_v_total = (1 << 15) - 1;
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if (ASICREV_IS_GC_12_0_1_A0(dc->ctx->asic_id.hw_internal_rev))
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dc->caps.dcc_plane_width_limit = 7680;
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