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drm/amd/display: fix s2idle entry for DCN3.5+
To be able to get to the lowest power state when suspending systems with DCN3.5+, we must be in IPS before the display hardware is put into D3cold. So, to ensure that the system always reaches the lowest power state while suspending, force systems that support IPS to enter idle optimizations before entering D3cold. Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2904,6 +2904,9 @@ static int dm_suspend(void *handle)
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hpd_rx_irq_work_suspend(dm);
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if (adev->dm.dc->caps.ips_support)
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dc_allow_idle_optimizations(adev->dm.dc, true);
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dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D3);
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dc_dmub_srv_set_power_state(dm->dc->ctx->dmub_srv, DC_ACPI_CM_POWER_STATE_D3);
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