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nvmem: Add Vybrid OCOTP support
The patch adds support for the On Chip One Time Programmable Peripheral (OCOTP) on the Vybrid platform. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Sanchayan Maity
Greg Kroah-Hartman
parent
6230699469
commit
22dbdb7cbf
@ -36,4 +36,14 @@ config NVMEM_SUNXI_SID
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This driver can also be built as a module. If so, the module
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will be called nvmem_sunxi_sid.
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config NVMEM_VF610_OCOTP
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tristate "VF610 SoC OCOTP support"
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depends on SOC_VF610 || COMPILE_TEST
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help
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This is a driver for the 'OCOTP' peripheral available on Vybrid
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devices like VF5xx and VF6xx.
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This driver can also be build as a module. If so, the module will
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be called nvmem-vf610-ocotp.
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endif
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@ -10,3 +10,5 @@ obj-$(CONFIG_QCOM_QFPROM) += nvmem_qfprom.o
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nvmem_qfprom-y := qfprom.o
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obj-$(CONFIG_NVMEM_SUNXI_SID) += nvmem_sunxi_sid.o
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nvmem_sunxi_sid-y := sunxi_sid.o
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obj-$(CONFIG_NVMEM_VF610_OCOTP) += nvmem-vf610-ocotp.o
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nvmem-vf610-ocotp-y := vf610-ocotp.o
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302
drivers/nvmem/vf610-ocotp.c
Normal file
302
drivers/nvmem/vf610-ocotp.c
Normal file
@ -0,0 +1,302 @@
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/*
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* Copyright (C) 2015 Toradex AG.
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*
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* Author: Sanchayan Maity <sanchayan.maity@toradex.com>
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*
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* Based on the barebox ocotp driver,
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* Copyright (c) 2010 Baruch Siach <baruch@tkos.co.il>
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* Orex Computed Radiography
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/nvmem-provider.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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/* OCOTP Register Offsets */
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#define OCOTP_CTRL_REG 0x00
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#define OCOTP_CTRL_SET 0x04
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#define OCOTP_CTRL_CLR 0x08
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#define OCOTP_TIMING 0x10
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#define OCOTP_DATA 0x20
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#define OCOTP_READ_CTRL_REG 0x30
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#define OCOTP_READ_FUSE_DATA 0x40
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/* OCOTP Register bits and masks */
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#define OCOTP_CTRL_WR_UNLOCK 16
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#define OCOTP_CTRL_WR_UNLOCK_KEY 0x3E77
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#define OCOTP_CTRL_WR_UNLOCK_MASK GENMASK(31, 16)
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#define OCOTP_CTRL_ADDR 0
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#define OCOTP_CTRL_ADDR_MASK GENMASK(6, 0)
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#define OCOTP_CTRL_RELOAD_SHADOWS BIT(10)
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#define OCOTP_CTRL_ERR BIT(9)
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#define OCOTP_CTRL_BUSY BIT(8)
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#define OCOTP_TIMING_STROBE_READ 16
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#define OCOTP_TIMING_STROBE_READ_MASK GENMASK(21, 16)
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#define OCOTP_TIMING_RELAX 12
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#define OCOTP_TIMING_RELAX_MASK GENMASK(15, 12)
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#define OCOTP_TIMING_STROBE_PROG 0
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#define OCOTP_TIMING_STROBE_PROG_MASK GENMASK(11, 0)
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#define OCOTP_READ_CTRL_READ_FUSE 0x1
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#define VF610_OCOTP_TIMEOUT 100000
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#define BF(value, field) (((value) << field) & field##_MASK)
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#define DEF_RELAX 20
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static const int base_to_fuse_addr_mappings[][2] = {
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{0x400, 0x00},
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{0x410, 0x01},
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{0x420, 0x02},
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{0x450, 0x05},
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{0x4F0, 0x0F},
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{0x600, 0x20},
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{0x610, 0x21},
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{0x620, 0x22},
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{0x630, 0x23},
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{0x640, 0x24},
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{0x650, 0x25},
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{0x660, 0x26},
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{0x670, 0x27},
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{0x6F0, 0x2F},
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{0x880, 0x38},
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{0x890, 0x39},
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{0x8A0, 0x3A},
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{0x8B0, 0x3B},
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{0x8C0, 0x3C},
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{0x8D0, 0x3D},
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{0x8E0, 0x3E},
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{0x8F0, 0x3F},
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{0xC80, 0x78},
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{0xC90, 0x79},
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{0xCA0, 0x7A},
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{0xCB0, 0x7B},
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{0xCC0, 0x7C},
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{0xCD0, 0x7D},
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{0xCE0, 0x7E},
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{0xCF0, 0x7F},
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};
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struct vf610_ocotp {
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void __iomem *base;
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struct clk *clk;
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struct device *dev;
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struct nvmem_device *nvmem;
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int timing;
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};
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static int vf610_ocotp_wait_busy(void __iomem *base)
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{
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int timeout = VF610_OCOTP_TIMEOUT;
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while ((readl(base) & OCOTP_CTRL_BUSY) && --timeout)
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udelay(10);
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if (!timeout) {
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writel(OCOTP_CTRL_ERR, base + OCOTP_CTRL_CLR);
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return -ETIMEDOUT;
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}
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udelay(10);
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return 0;
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}
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static int vf610_ocotp_calculate_timing(struct vf610_ocotp *ocotp_dev)
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{
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u32 clk_rate;
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u32 relax, strobe_read, strobe_prog;
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u32 timing;
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clk_rate = clk_get_rate(ocotp_dev->clk);
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/* Refer section OTP read/write timing parameters in TRM */
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relax = clk_rate / (1000000000 / DEF_RELAX) - 1;
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strobe_prog = clk_rate / (1000000000 / 10000) + 2 * (DEF_RELAX + 1) - 1;
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strobe_read = clk_rate / (1000000000 / 40) + 2 * (DEF_RELAX + 1) - 1;
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timing = BF(relax, OCOTP_TIMING_RELAX);
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timing |= BF(strobe_read, OCOTP_TIMING_STROBE_READ);
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timing |= BF(strobe_prog, OCOTP_TIMING_STROBE_PROG);
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return timing;
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}
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static int vf610_get_fuse_address(int base_addr_offset)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(base_to_fuse_addr_mappings); i++) {
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if (base_to_fuse_addr_mappings[i][0] == base_addr_offset)
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return base_to_fuse_addr_mappings[i][1];
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}
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return -EINVAL;
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}
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static int vf610_ocotp_write(void *context, const void *data, size_t count)
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{
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return 0;
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}
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static int vf610_ocotp_read(void *context,
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const void *off, size_t reg_size,
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void *val, size_t val_size)
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{
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struct vf610_ocotp *ocotp = context;
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void __iomem *base = ocotp->base;
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unsigned int offset = *(u32 *)off;
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u32 reg, *buf = val;
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int fuse_addr;
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int ret;
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while (val_size > 0) {
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fuse_addr = vf610_get_fuse_address(offset);
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if (fuse_addr > 0) {
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writel(ocotp->timing, base + OCOTP_TIMING);
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ret = vf610_ocotp_wait_busy(base + OCOTP_CTRL_REG);
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if (ret)
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return ret;
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reg = readl(base + OCOTP_CTRL_REG);
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reg &= ~OCOTP_CTRL_ADDR_MASK;
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reg &= ~OCOTP_CTRL_WR_UNLOCK_MASK;
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reg |= BF(fuse_addr, OCOTP_CTRL_ADDR);
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writel(reg, base + OCOTP_CTRL_REG);
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writel(OCOTP_READ_CTRL_READ_FUSE,
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base + OCOTP_READ_CTRL_REG);
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ret = vf610_ocotp_wait_busy(base + OCOTP_CTRL_REG);
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if (ret)
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return ret;
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if (readl(base) & OCOTP_CTRL_ERR) {
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dev_dbg(ocotp->dev, "Error reading from fuse address %x\n",
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fuse_addr);
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writel(OCOTP_CTRL_ERR, base + OCOTP_CTRL_CLR);
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}
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/*
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* In case of error, we do not abort and expect to read
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* 0xBADABADA as mentioned by the TRM. We just read this
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* value and return.
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*/
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*buf = readl(base + OCOTP_READ_FUSE_DATA);
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} else {
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*buf = 0;
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}
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buf++;
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val_size--;
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offset += reg_size;
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}
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return 0;
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}
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static struct regmap_bus vf610_ocotp_bus = {
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.read = vf610_ocotp_read,
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.write = vf610_ocotp_write,
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.reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
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.val_format_endian_default = REGMAP_ENDIAN_NATIVE,
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};
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static struct regmap_config ocotp_regmap_config = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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};
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static struct nvmem_config ocotp_config = {
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.name = "ocotp",
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.owner = THIS_MODULE,
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};
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static const struct of_device_id ocotp_of_match[] = {
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{ .compatible = "fsl,vf610-ocotp", },
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{/* sentinel */},
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};
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MODULE_DEVICE_TABLE(of, ocotp_of_match);
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static int vf610_ocotp_remove(struct platform_device *pdev)
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{
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struct vf610_ocotp *ocotp_dev = platform_get_drvdata(pdev);
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return nvmem_unregister(ocotp_dev->nvmem);
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}
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static int vf610_ocotp_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct resource *res;
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struct regmap *regmap;
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struct vf610_ocotp *ocotp_dev;
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ocotp_dev = devm_kzalloc(&pdev->dev,
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sizeof(struct vf610_ocotp), GFP_KERNEL);
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if (!ocotp_dev)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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ocotp_dev->base = devm_ioremap_resource(dev, res);
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if (IS_ERR(ocotp_dev->base))
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return PTR_ERR(ocotp_dev->base);
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ocotp_dev->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(ocotp_dev->clk)) {
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dev_err(dev, "failed getting clock, err = %ld\n",
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PTR_ERR(ocotp_dev->clk));
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return PTR_ERR(ocotp_dev->clk);
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}
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ocotp_regmap_config.max_register = resource_size(res);
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regmap = devm_regmap_init(dev,
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&vf610_ocotp_bus, ocotp_dev, &ocotp_regmap_config);
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if (IS_ERR(regmap)) {
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dev_err(dev, "regmap init failed\n");
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return PTR_ERR(regmap);
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}
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ocotp_config.dev = dev;
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ocotp_dev->nvmem = nvmem_register(&ocotp_config);
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if (IS_ERR(ocotp_dev->nvmem))
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return PTR_ERR(ocotp_dev->nvmem);
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ocotp_dev->dev = dev;
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platform_set_drvdata(pdev, ocotp_dev);
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ocotp_dev->timing = vf610_ocotp_calculate_timing(ocotp_dev);
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return 0;
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}
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static struct platform_driver vf610_ocotp_driver = {
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.probe = vf610_ocotp_probe,
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.remove = vf610_ocotp_remove,
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.driver = {
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.name = "vf610-ocotp",
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.of_match_table = ocotp_of_match,
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},
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};
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module_platform_driver(vf610_ocotp_driver);
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MODULE_AUTHOR("Sanchayan Maity <sanchayan.maity@toradex.com>");
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MODULE_DESCRIPTION("Vybrid OCOTP driver");
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MODULE_LICENSE("GPL v2");
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