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arm64/kvm: sysreg: fix typo'd SYS_ICC_IGRPEN*_EL1
Per ARM DDI 0487B.a, the registers are named ICC_IGRPEN*_EL1 rather than ICC_GRPEN*_EL1. Correct our mnemonics and comments to match, before we add more GICv3 register definitions. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: kvmarm@lists.cs.columbia.edu Acked-by: Christoffer Dall <cdall@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Christoffer Dall <cdall@linaro.org>
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@ -89,7 +89,7 @@ static inline void gic_write_ctlr(u32 val)
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static inline void gic_write_grpen1(u32 val)
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{
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write_sysreg_s(val, SYS_ICC_GRPEN1_EL1);
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write_sysreg_s(val, SYS_ICC_IGRPEN1_EL1);
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isb();
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}
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@ -195,8 +195,8 @@
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#define SYS_ICC_BPR1_EL1 sys_reg(3, 0, 12, 12, 3)
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#define SYS_ICC_CTLR_EL1 sys_reg(3, 0, 12, 12, 4)
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#define SYS_ICC_SRE_EL1 sys_reg(3, 0, 12, 12, 5)
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#define SYS_ICC_GRPEN0_EL1 sys_reg(3, 0, 12, 12, 6)
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#define SYS_ICC_GRPEN1_EL1 sys_reg(3, 0, 12, 12, 7)
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#define SYS_ICC_IGRPEN0_EL1 sys_reg(3, 0, 12, 12, 6)
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#define SYS_ICC_IGRPEN1_EL1 sys_reg(3, 0, 12, 12, 7)
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#define SYS_CONTEXTIDR_EL1 sys_reg(3, 0, 13, 0, 1)
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#define SYS_TPIDR_EL1 sys_reg(3, 0, 13, 0, 4)
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@ -296,7 +296,7 @@ static const struct sys_reg_desc gic_v3_icc_reg_descs[] = {
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{ Op0(3), Op1(0), CRn(12), CRm(12), Op2(5), access_gic_sre },
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/* ICC_IGRPEN0_EL1 */
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{ Op0(3), Op1(0), CRn(12), CRm(12), Op2(6), access_gic_grpen0 },
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/* ICC_GRPEN1_EL1 */
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/* ICC_IGRPEN1_EL1 */
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{ Op0(3), Op1(0), CRn(12), CRm(12), Op2(7), access_gic_grpen1 },
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};
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@ -986,7 +986,7 @@ int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu)
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return 0;
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fn = __vgic_v3_write_eoir;
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break;
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case SYS_ICC_GRPEN1_EL1:
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case SYS_ICC_IGRPEN1_EL1:
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if (is_read)
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fn = __vgic_v3_read_igrpen1;
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else
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@ -1032,7 +1032,7 @@ int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu)
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return 0;
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fn = __vgic_v3_read_hppir;
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break;
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case SYS_ICC_GRPEN0_EL1:
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case SYS_ICC_IGRPEN0_EL1:
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if (is_read)
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fn = __vgic_v3_read_igrpen0;
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else
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