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mtd: fsl_ifc_nand: Workaround bogus WP on 16-bit NAND

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A workaround was already in place that set the WP bit in the
IFC_CSPR0 register after a STATUS command, however it used an 8-bit
write method. As a result, the WP bit was never set on 16-bit devices,
and these devices would eventually be incorrectly marked as
write-protected.

This patch checks the chip options for a 16-bit device and uses the
appropriate write method to set the WP bit after a STATUS command.

Signed-off-by: Joe Schultz <jschultz@xes-inc.com>
Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
This commit is contained in:
Joe Schultz 2014-04-07 11:58:18 -05:00 committed by Brian Norris
parent 4454406e37
commit 2170480487
1 changed files with 4 additions and 1 deletions
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5
drivers/mtd/nand/fsl_ifc_nand.c
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@ -591,7 +591,10 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command,
* The chip always seems to report that it is
* write-protected, even when it is not.
*/
setbits8(ifc_nand_ctrl->addr, NAND_STATUS_WP);
if (chip->options & NAND_BUSWIDTH_16)
setbits16(ifc_nand_ctrl->addr, NAND_STATUS_WP);
else
setbits8(ifc_nand_ctrl->addr, NAND_STATUS_WP);
return;
case NAND_CMD_RESET: