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gpio: 74x164: Add support for the daisy-chaining
The shift registers have an output pin that, when enabled, propagates the values of its internal register to the pins. If another value comes to the register while the output pin is disabled, this new value will makae the older shift into the next register in the chain. This patch adds support for daisy-chaining the registers, using the regular SPI chip select mechanism to manage the output pin, and the registers-number dt property to set the number of chained registers. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -14,14 +14,18 @@
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#include <linux/spi/spi.h>
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#include <linux/spi/74x164.h>
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#include <linux/gpio.h>
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#include <linux/of_gpio.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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#define GEN_74X164_NUMBER_GPIOS 8
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struct gen_74x164_chip {
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struct spi_device *spi;
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u8 *buffer;
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struct gpio_chip gpio_chip;
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struct mutex lock;
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u8 port_config;
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u32 registers;
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};
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static struct gen_74x164_chip *gpio_to_74x164_chip(struct gpio_chip *gc)
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@ -31,17 +35,47 @@ static struct gen_74x164_chip *gpio_to_74x164_chip(struct gpio_chip *gc)
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static int __gen_74x164_write_config(struct gen_74x164_chip *chip)
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{
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return spi_write(chip->spi,
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&chip->port_config, sizeof(chip->port_config));
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struct spi_message message;
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struct spi_transfer *msg_buf;
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int i, ret = 0;
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msg_buf = kzalloc(chip->registers * sizeof(struct spi_transfer),
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GFP_KERNEL);
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if (!msg_buf)
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return -ENOMEM;
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spi_message_init(&message);
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/*
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* Since the registers are chained, every byte sent will make
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* the previous byte shift to the next register in the
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* chain. Thus, the first byte send will end up in the last
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* register at the end of the transfer. So, to have a logical
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* numbering, send the bytes in reverse order so that the last
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* byte of the buffer will end up in the last register.
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*/
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for (i = chip->registers - 1; i >= 0; i--) {
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msg_buf[i].tx_buf = chip->buffer +i;
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msg_buf[i].len = sizeof(u8);
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spi_message_add_tail(msg_buf + i, &message);
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}
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ret = spi_sync(chip->spi, &message);
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kfree(msg_buf);
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return ret;
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}
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static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset)
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{
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struct gen_74x164_chip *chip = gpio_to_74x164_chip(gc);
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u8 bank = offset / 8;
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u8 pin = offset % 8;
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int ret;
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mutex_lock(&chip->lock);
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ret = (chip->port_config >> offset) & 0x1;
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ret = (chip->buffer[bank] >> pin) & 0x1;
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mutex_unlock(&chip->lock);
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return ret;
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@ -51,12 +85,14 @@ static void gen_74x164_set_value(struct gpio_chip *gc,
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unsigned offset, int val)
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{
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struct gen_74x164_chip *chip = gpio_to_74x164_chip(gc);
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u8 bank = offset / 8;
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u8 pin = offset % 8;
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mutex_lock(&chip->lock);
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if (val)
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chip->port_config |= (1 << offset);
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chip->buffer[bank] |= (1 << pin);
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else
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chip->port_config &= ~(1 << offset);
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chip->buffer[bank] &= ~(1 << pin);
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__gen_74x164_write_config(chip);
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mutex_unlock(&chip->lock);
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@ -75,6 +111,11 @@ static int __devinit gen_74x164_probe(struct spi_device *spi)
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struct gen_74x164_chip_platform_data *pdata;
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int ret;
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if (!spi->dev.of_node) {
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dev_err(&spi->dev, "No device tree data available.\n");
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return -EINVAL;
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}
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/*
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* bits_per_word cannot be configured in platform data
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*/
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@ -104,7 +145,20 @@ static int __devinit gen_74x164_probe(struct spi_device *spi)
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chip->gpio_chip.direction_output = gen_74x164_direction_output;
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chip->gpio_chip.get = gen_74x164_get_value;
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chip->gpio_chip.set = gen_74x164_set_value;
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chip->gpio_chip.ngpio = 8;
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if (of_property_read_u32(spi->dev.of_node, "registers-number", &chip->registers)) {
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dev_err(&spi->dev, "Missing registers-number property in the DT.\n");
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ret = -EINVAL;
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goto exit_destroy;
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}
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chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers;
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chip->buffer = devm_kzalloc(&spi->dev, chip->gpio_chip.ngpio, GFP_KERNEL);
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if (!chip->buffer) {
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ret = -ENOMEM;
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goto exit_destroy;
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}
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chip->gpio_chip.can_sleep = 1;
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chip->gpio_chip.dev = &spi->dev;
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chip->gpio_chip.owner = THIS_MODULE;
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