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dma: mmp_tdma: add multiple burst size support for 910-squ
add multiple burst size support for 910-squ. Signed-off-by: Qiao Zhou <zhouqiao@marvell.com> Acked-by: Zhangfei Gao <zhangfei.gao@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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174b537ac2
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20a90b0ebc
@ -62,6 +62,11 @@
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#define TDCR_BURSTSZ_16B (0x3 << 6)
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#define TDCR_BURSTSZ_32B (0x6 << 6)
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#define TDCR_BURSTSZ_64B (0x7 << 6)
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#define TDCR_BURSTSZ_SQU_1B (0x5 << 6)
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#define TDCR_BURSTSZ_SQU_2B (0x6 << 6)
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#define TDCR_BURSTSZ_SQU_4B (0x0 << 6)
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#define TDCR_BURSTSZ_SQU_8B (0x1 << 6)
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#define TDCR_BURSTSZ_SQU_16B (0x3 << 6)
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#define TDCR_BURSTSZ_SQU_32B (0x7 << 6)
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#define TDCR_BURSTSZ_128B (0x5 << 6)
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#define TDCR_DSTDIR_MSK (0x3 << 4) /* Dst Direction */
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@ -228,8 +233,31 @@ static int mmp_tdma_config_chan(struct mmp_tdma_chan *tdmac)
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return -EINVAL;
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}
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} else if (tdmac->type == PXA910_SQU) {
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tdcr |= TDCR_BURSTSZ_SQU_32B;
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tdcr |= TDCR_SSPMOD;
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switch (tdmac->burst_sz) {
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case 1:
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tdcr |= TDCR_BURSTSZ_SQU_1B;
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break;
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case 2:
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tdcr |= TDCR_BURSTSZ_SQU_2B;
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break;
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case 4:
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tdcr |= TDCR_BURSTSZ_SQU_4B;
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break;
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case 8:
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tdcr |= TDCR_BURSTSZ_SQU_8B;
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break;
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case 16:
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tdcr |= TDCR_BURSTSZ_SQU_16B;
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break;
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case 32:
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tdcr |= TDCR_BURSTSZ_SQU_32B;
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break;
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default:
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dev_err(tdmac->dev, "mmp_tdma: unknown burst size.\n");
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return -EINVAL;
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}
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}
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writel(tdcr, tdmac->reg_base + TDCR);
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