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tg3: Fix 57765 B0 data corruption
The PCIe max FTS limit is too aggressive on these chips. This patch loosens the limit a little to eliminate data corruption issues. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -7990,6 +7990,22 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
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tw32(GRC_MODE, grc_mode);
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}
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if (GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_57765_AX) {
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u32 grc_mode = tr32(GRC_MODE);
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/* Access the lower 1K of DL PCIE block registers. */
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val = grc_mode & ~GRC_MODE_PCIE_PORT_MASK;
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tw32(GRC_MODE, val | GRC_MODE_PCIE_DL_SEL);
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val = tr32(TG3_PCIE_TLDLPL_PORT +
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TG3_PCIE_DL_LO_FTSMAX);
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val &= ~TG3_PCIE_DL_LO_FTSMAX_MSK;
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tw32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_DL_LO_FTSMAX,
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val | TG3_PCIE_DL_LO_FTSMAX_VAL);
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tw32(GRC_MODE, grc_mode);
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}
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val = tr32(TG3_CPMU_LSPD_10MB_CLK);
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val &= ~CPMU_LSPD_10MB_MACCLK_MASK;
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val |= CPMU_LSPD_10MB_MACCLK_6_25;
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@ -180,6 +180,7 @@
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#define CHIPREV_5750_BX 0x41
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#define CHIPREV_5784_AX 0x57840
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#define CHIPREV_5761_AX 0x57610
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#define CHIPREV_57765_AX 0x577650
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#define GET_METAL_REV(CHIP_REV_ID) ((CHIP_REV_ID) & 0xff)
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#define METAL_REV_A0 0x00
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#define METAL_REV_A1 0x01
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@ -1951,6 +1952,9 @@
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/* Alternate PCIE definitions */
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#define TG3_PCIE_TLDLPL_PORT 0x00007c00
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#define TG3_PCIE_DL_LO_FTSMAX 0x0000000c
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#define TG3_PCIE_DL_LO_FTSMAX_MSK 0x000000ff
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#define TG3_PCIE_DL_LO_FTSMAX_VAL 0x0000002c
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#define TG3_PCIE_PL_LO_PHYCTL1 0x00000004
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#define TG3_PCIE_PL_LO_PHYCTL1_L1PLLPD_EN 0x00001000
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#define TG3_PCIE_PL_LO_PHYCTL5 0x00000014
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