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ASoC: mediatek: mt8195: support pcm in platform driver
This patch adds mt8195 pcm dai driver. Signed-off-by: Trevor Wu <trevor.wu@mediatek.com> Link: https://lore.kernel.org/r/20210819084144.18483-6-trevor.wu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Trevor Wu
Mark Brown
parent
3de3eba588
commit
1f95c01911
389
sound/soc/mediatek/mt8195/mt8195-dai-pcm.c
Normal file
389
sound/soc/mediatek/mt8195/mt8195-dai-pcm.c
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@ -0,0 +1,389 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* MediaTek ALSA SoC Audio DAI PCM I/F Control
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*
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* Copyright (c) 2020 MediaTek Inc.
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* Author: Bicycle Tsai <bicycle.tsai@mediatek.com>
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* Trevor Wu <trevor.wu@mediatek.com>
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*/
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#include <linux/regmap.h>
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#include <sound/pcm_params.h>
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#include "mt8195-afe-clk.h"
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#include "mt8195-afe-common.h"
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#include "mt8195-reg.h"
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enum {
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MTK_DAI_PCM_FMT_I2S,
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MTK_DAI_PCM_FMT_EIAJ,
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MTK_DAI_PCM_FMT_MODEA,
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MTK_DAI_PCM_FMT_MODEB,
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};
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enum {
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MTK_DAI_PCM_CLK_A1SYS,
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MTK_DAI_PCM_CLK_A2SYS,
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MTK_DAI_PCM_CLK_26M_48K,
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MTK_DAI_PCM_CLK_26M_441K,
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};
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struct mtk_dai_pcm_rate {
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unsigned int rate;
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unsigned int reg_value;
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};
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struct mtk_dai_pcmif_priv {
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unsigned int slave_mode;
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unsigned int lrck_inv;
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unsigned int bck_inv;
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unsigned int format;
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};
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static const struct mtk_dai_pcm_rate mtk_dai_pcm_rates[] = {
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{ .rate = 8000, .reg_value = 0, },
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{ .rate = 16000, .reg_value = 1, },
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{ .rate = 32000, .reg_value = 2, },
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{ .rate = 48000, .reg_value = 3, },
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{ .rate = 11025, .reg_value = 1, },
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{ .rate = 22050, .reg_value = 2, },
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{ .rate = 44100, .reg_value = 3, },
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};
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static int mtk_dai_pcm_mode(unsigned int rate)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(mtk_dai_pcm_rates); i++)
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if (mtk_dai_pcm_rates[i].rate == rate)
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return mtk_dai_pcm_rates[i].reg_value;
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return -EINVAL;
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}
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static const struct snd_kcontrol_new mtk_dai_pcm_o000_mix[] = {
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SOC_DAPM_SINGLE_AUTODISABLE("I000 Switch", AFE_CONN0, 0, 1, 0),
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SOC_DAPM_SINGLE_AUTODISABLE("I070 Switch", AFE_CONN0_2, 6, 1, 0),
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};
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static const struct snd_kcontrol_new mtk_dai_pcm_o001_mix[] = {
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SOC_DAPM_SINGLE_AUTODISABLE("I001 Switch", AFE_CONN1, 1, 1, 0),
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SOC_DAPM_SINGLE_AUTODISABLE("I071 Switch", AFE_CONN1_2, 7, 1, 0),
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};
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static const struct snd_soc_dapm_widget mtk_dai_pcm_widgets[] = {
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SND_SOC_DAPM_MIXER("I002", SND_SOC_NOPM, 0, 0, NULL, 0),
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SND_SOC_DAPM_MIXER("I003", SND_SOC_NOPM, 0, 0, NULL, 0),
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SND_SOC_DAPM_MIXER("O000", SND_SOC_NOPM, 0, 0,
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mtk_dai_pcm_o000_mix,
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ARRAY_SIZE(mtk_dai_pcm_o000_mix)),
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SND_SOC_DAPM_MIXER("O001", SND_SOC_NOPM, 0, 0,
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mtk_dai_pcm_o001_mix,
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ARRAY_SIZE(mtk_dai_pcm_o001_mix)),
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SND_SOC_DAPM_INPUT("PCM1_INPUT"),
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SND_SOC_DAPM_OUTPUT("PCM1_OUTPUT"),
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};
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static const struct snd_soc_dapm_route mtk_dai_pcm_routes[] = {
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{"I002", NULL, "PCM1 Capture"},
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{"I003", NULL, "PCM1 Capture"},
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{"O000", "I000 Switch", "I000"},
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{"O001", "I001 Switch", "I001"},
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{"O000", "I070 Switch", "I070"},
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{"O001", "I071 Switch", "I071"},
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{"PCM1 Playback", NULL, "O000"},
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{"PCM1 Playback", NULL, "O001"},
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{"PCM1_OUTPUT", NULL, "PCM1 Playback"},
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{"PCM1 Capture", NULL, "PCM1_INPUT"},
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};
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static void mtk_dai_pcm_enable(struct mtk_base_afe *afe)
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{
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regmap_update_bits(afe->regmap, PCM_INTF_CON1,
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PCM_INTF_CON1_PCM_EN, PCM_INTF_CON1_PCM_EN);
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}
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static void mtk_dai_pcm_disable(struct mtk_base_afe *afe)
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{
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regmap_update_bits(afe->regmap, PCM_INTF_CON1,
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PCM_INTF_CON1_PCM_EN, 0x0);
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}
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static int mtk_dai_pcm_configure(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct snd_pcm_runtime * const runtime = substream->runtime;
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struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
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struct mt8195_afe_private *afe_priv = afe->platform_priv;
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struct mtk_dai_pcmif_priv *pcmif_priv = afe_priv->dai_priv[dai->id];
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unsigned int slave_mode = pcmif_priv->slave_mode;
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unsigned int lrck_inv = pcmif_priv->lrck_inv;
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unsigned int bck_inv = pcmif_priv->bck_inv;
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unsigned int fmt = pcmif_priv->format;
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unsigned int bit_width = dai->sample_bits;
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unsigned int val = 0;
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unsigned int mask = 0;
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int fs = 0;
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int mode = 0;
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/* sync freq mode */
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fs = mt8195_afe_fs_timing(runtime->rate);
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if (fs < 0)
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return -EINVAL;
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val |= PCM_INTF_CON2_SYNC_FREQ_MODE(fs);
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mask |= PCM_INTF_CON2_SYNC_FREQ_MODE_MASK;
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/* clk domain sel */
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if (runtime->rate % 8000)
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val |= PCM_INTF_CON2_CLK_DOMAIN_SEL(MTK_DAI_PCM_CLK_26M_441K);
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else
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val |= PCM_INTF_CON2_CLK_DOMAIN_SEL(MTK_DAI_PCM_CLK_26M_48K);
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mask |= PCM_INTF_CON2_CLK_DOMAIN_SEL_MASK;
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regmap_update_bits(afe->regmap, PCM_INTF_CON2, mask, val);
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val = 0;
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mask = 0;
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/* pcm mode */
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mode = mtk_dai_pcm_mode(runtime->rate);
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if (mode < 0)
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return -EINVAL;
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val |= PCM_INTF_CON1_PCM_MODE(mode);
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mask |= PCM_INTF_CON1_PCM_MODE_MASK;
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/* pcm format */
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val |= PCM_INTF_CON1_PCM_FMT(fmt);
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mask |= PCM_INTF_CON1_PCM_FMT_MASK;
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/* pcm sync length */
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if (fmt == MTK_DAI_PCM_FMT_MODEA ||
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fmt == MTK_DAI_PCM_FMT_MODEB)
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val |= PCM_INTF_CON1_SYNC_LENGTH(1);
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else
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val |= PCM_INTF_CON1_SYNC_LENGTH(bit_width);
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mask |= PCM_INTF_CON1_SYNC_LENGTH_MASK;
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/* pcm bits, word length */
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if (bit_width > 16) {
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val |= PCM_INTF_CON1_PCM_24BIT;
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val |= PCM_INTF_CON1_PCM_WLEN_64BCK;
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} else {
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val |= PCM_INTF_CON1_PCM_16BIT;
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val |= PCM_INTF_CON1_PCM_WLEN_32BCK;
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}
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mask |= PCM_INTF_CON1_PCM_BIT_MASK;
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mask |= PCM_INTF_CON1_PCM_WLEN_MASK;
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/* master/slave */
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if (!slave_mode) {
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val |= PCM_INTF_CON1_PCM_MASTER;
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if (lrck_inv)
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val |= PCM_INTF_CON1_SYNC_OUT_INV;
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if (bck_inv)
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val |= PCM_INTF_CON1_BCLK_OUT_INV;
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mask |= PCM_INTF_CON1_CLK_OUT_INV_MASK;
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} else {
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val |= PCM_INTF_CON1_PCM_SLAVE;
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if (lrck_inv)
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val |= PCM_INTF_CON1_SYNC_IN_INV;
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if (bck_inv)
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val |= PCM_INTF_CON1_BCLK_IN_INV;
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mask |= PCM_INTF_CON1_CLK_IN_INV_MASK;
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/* TODO: add asrc setting for slave mode */
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}
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mask |= PCM_INTF_CON1_PCM_M_S_MASK;
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regmap_update_bits(afe->regmap, PCM_INTF_CON1, mask, val);
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return 0;
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}
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/* dai ops */
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static int mtk_dai_pcm_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
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struct mt8195_afe_private *afe_priv = afe->platform_priv;
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if (dai->component->active)
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return 0;
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mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_ASRC11]);
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mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_ASRC12]);
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mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_PCMIF]);
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return 0;
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}
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static void mtk_dai_pcm_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
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struct mt8195_afe_private *afe_priv = afe->platform_priv;
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if (dai->component->active)
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return;
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mtk_dai_pcm_disable(afe);
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mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_PCMIF]);
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mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_ASRC12]);
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mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_ASRC11]);
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}
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static int mtk_dai_pcm_prepare(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
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int ret = 0;
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if (snd_soc_dai_stream_active(dai, SNDRV_PCM_STREAM_PLAYBACK) &&
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snd_soc_dai_stream_active(dai, SNDRV_PCM_STREAM_CAPTURE))
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return 0;
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ret = mtk_dai_pcm_configure(substream, dai);
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if (ret)
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return ret;
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mtk_dai_pcm_enable(afe);
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return 0;
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}
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static int mtk_dai_pcm_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
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struct mt8195_afe_private *afe_priv = afe->platform_priv;
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struct mtk_dai_pcmif_priv *pcmif_priv = afe_priv->dai_priv[dai->id];
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dev_dbg(dai->dev, "%s fmt 0x%x\n", __func__, fmt);
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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pcmif_priv->format = MTK_DAI_PCM_FMT_I2S;
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break;
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case SND_SOC_DAIFMT_DSP_A:
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pcmif_priv->format = MTK_DAI_PCM_FMT_MODEA;
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break;
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case SND_SOC_DAIFMT_DSP_B:
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pcmif_priv->format = MTK_DAI_PCM_FMT_MODEB;
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break;
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default:
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return -EINVAL;
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}
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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pcmif_priv->bck_inv = 0;
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pcmif_priv->lrck_inv = 0;
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break;
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case SND_SOC_DAIFMT_NB_IF:
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pcmif_priv->bck_inv = 0;
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pcmif_priv->lrck_inv = 1;
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break;
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case SND_SOC_DAIFMT_IB_NF:
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pcmif_priv->bck_inv = 1;
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pcmif_priv->lrck_inv = 0;
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break;
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case SND_SOC_DAIFMT_IB_IF:
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pcmif_priv->bck_inv = 1;
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pcmif_priv->lrck_inv = 1;
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break;
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default:
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return -EINVAL;
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}
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM:
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pcmif_priv->slave_mode = 1;
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break;
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case SND_SOC_DAIFMT_CBS_CFS:
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pcmif_priv->slave_mode = 0;
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static const struct snd_soc_dai_ops mtk_dai_pcm_ops = {
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.startup = mtk_dai_pcm_startup,
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.shutdown = mtk_dai_pcm_shutdown,
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.prepare = mtk_dai_pcm_prepare,
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.set_fmt = mtk_dai_pcm_set_fmt,
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};
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/* dai driver */
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#define MTK_PCM_RATES (SNDRV_PCM_RATE_8000_48000)
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#define MTK_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
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SNDRV_PCM_FMTBIT_S24_LE |\
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SNDRV_PCM_FMTBIT_S32_LE)
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static struct snd_soc_dai_driver mtk_dai_pcm_driver[] = {
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{
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.name = "PCM1",
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.id = MT8195_AFE_IO_PCM,
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.playback = {
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.stream_name = "PCM1 Playback",
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.channels_min = 1,
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.channels_max = 2,
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.rates = MTK_PCM_RATES,
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.formats = MTK_PCM_FORMATS,
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},
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.capture = {
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.stream_name = "PCM1 Capture",
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.channels_min = 1,
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.channels_max = 2,
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.rates = MTK_PCM_RATES,
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.formats = MTK_PCM_FORMATS,
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},
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.ops = &mtk_dai_pcm_ops,
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.symmetric_rate = 1,
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.symmetric_sample_bits = 1,
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},
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};
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static int init_pcmif_priv_data(struct mtk_base_afe *afe)
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{
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struct mt8195_afe_private *afe_priv = afe->platform_priv;
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struct mtk_dai_pcmif_priv *pcmif_priv;
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pcmif_priv = devm_kzalloc(afe->dev, sizeof(struct mtk_dai_pcmif_priv),
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GFP_KERNEL);
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if (!pcmif_priv)
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return -ENOMEM;
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afe_priv->dai_priv[MT8195_AFE_IO_PCM] = pcmif_priv;
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return 0;
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}
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int mt8195_dai_pcm_register(struct mtk_base_afe *afe)
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{
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struct mtk_base_afe_dai *dai;
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dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
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if (!dai)
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return -ENOMEM;
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list_add(&dai->list, &afe->sub_dais);
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dai->dai_drivers = mtk_dai_pcm_driver;
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dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_pcm_driver);
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dai->dapm_widgets = mtk_dai_pcm_widgets;
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dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_pcm_widgets);
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dai->dapm_routes = mtk_dai_pcm_routes;
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dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_pcm_routes);
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return init_pcmif_priv_data(afe);
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}
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